ARM: dts: sunxi: Unify the DE2 bus clocks order
authorMaxime Ripard <maxime.ripard@bootlin.com>
Mon, 22 Jul 2019 14:08:16 +0000 (16:08 +0200)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Mon, 22 Jul 2019 14:49:22 +0000 (16:49 +0200)
The DE2 bus takes two clocks, named bus and mod according to the binding.

However, the order of these clocks change from one SoC to another. Even
though it might not be an issue in most cases, having consistency will help
if we ever need to have some code to deal with deprecated bindings, and in
general it's just better.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
arch/arm/boot/dts/sun8i-a83t.dtsi
arch/arm/boot/dts/sun8i-r40.dtsi
arch/arm/boot/dts/sun8i-v3s.dtsi
arch/arm/boot/dts/sunxi-h3-h5.dtsi
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

index ada6d08..9d5ddb2 100644 (file)
                display_clocks: clock@1000000 {
                        compatible = "allwinner,sun8i-a83t-de2-clk";
                        reg = <0x01000000 0x100000>;
-                       clocks = <&ccu CLK_PLL_DE>,
-                                <&ccu CLK_BUS_DE>;
-                       clock-names = "mod",
-                                     "bus";
+                       clocks = <&ccu CLK_BUS_DE>,
+                                <&ccu CLK_PLL_DE>;
+                       clock-names = "bus",
+                                     "mod";
                        resets = <&ccu RST_BUS_DE>;
                        #clock-cells = <1>;
                        #reset-cells = <1>;
index 6007d0c..6323941 100644 (file)
                        compatible = "allwinner,sun8i-r40-de2-clk",
                                     "allwinner,sun8i-h3-de2-clk";
                        reg = <0x01000000 0x100000>;
-                       clocks = <&ccu CLK_DE>,
-                                <&ccu CLK_BUS_DE>;
-                       clock-names = "mod",
-                                     "bus";
+                       clocks = <&ccu CLK_BUS_DE>,
+                                <&ccu CLK_DE>;
+                       clock-names = "bus",
+                                     "mod";
                        resets = <&ccu RST_BUS_DE>;
                        #clock-cells = <1>;
                        #reset-cells = <1>;
index d7aef12..20a3f11 100644 (file)
                display_clocks: clock@1000000 {
                        compatible = "allwinner,sun8i-v3s-de2-clk";
                        reg = <0x01000000 0x100000>;
-                       clocks = <&ccu CLK_DE>,
-                                <&ccu CLK_BUS_DE>;
-                       clock-names = "mod",
-                                     "bus";
+                       clocks = <&ccu CLK_BUS_DE>,
+                                <&ccu CLK_DE>;
+                       clock-names = "bus",
+                                     "mod";
                        resets = <&ccu RST_BUS_DE>;
                        #clock-cells = <1>;
                        #reset-cells = <1>;
index 84977d4..b1d8c82 100644 (file)
                display_clocks: clock@1000000 {
                        /* compatible is in per SoC .dtsi file */
                        reg = <0x01000000 0x100000>;
-                       clocks = <&ccu CLK_DE>,
-                                <&ccu CLK_BUS_DE>;
-                       clock-names = "mod",
-                                     "bus";
+                       clocks = <&ccu CLK_BUS_DE>,
+                                <&ccu CLK_DE>;
+                       clock-names = "bus",
+                                     "mod";
                        resets = <&ccu RST_BUS_DE>;
                        #clock-cells = <1>;
                        #reset-cells = <1>;
index 9cc9bdd..60afacf 100644 (file)
                        display_clocks: clock@0 {
                                compatible = "allwinner,sun50i-a64-de2-clk";
                                reg = <0x0 0x100000>;
-                               clocks = <&ccu CLK_DE>,
-                                        <&ccu CLK_BUS_DE>;
-                               clock-names = "mod",
-                                             "bus";
+                               clocks = <&ccu CLK_BUS_DE>,
+                                        <&ccu CLK_DE>;
+                               clock-names = "bus",
+                                             "mod";
                                resets = <&ccu RST_BUS_DE>;
                                #clock-cells = <1>;
                                #reset-cells = <1>;