MLK-17126-4: hdp: Fix V/Hsync polarity issue

Remove v/hsync polarity adjust function.
Add pixel link mux configuration function for imx8qm.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>

diff --git a/drivers/gpu/drm/imx/hdp/imx-hdmi.c b/drivers/gpu/drm/imx/hdp/imx-hdmi.c
index 2b15bc0..ecba30c 100644 (file)
--- a/drivers/gpu/drm/imx/hdp/imx-hdmi.c
+++ b/drivers/gpu/drm/imx/hdp/imx-hdmi.c
@@ -90,7 +90,6 @@ int hdmi_phy_init(state_struct *state, int vic, int format, int color_depth)
 
 void hdmi_mode_set(state_struct *state, int vic, int format, int color_depth, int temp)
 {
-       GENERAL_Read_Register_response regresp;
        int ret;
 
        /* B/W Balance Type: 0 no data, 1 IT601, 2 ITU709 */
@@ -114,13 +113,6 @@ void hdmi_mode_set(state_struct *state, int vic, int format, int color_depth, in
        ret =  CDN_API_HDMITX_SetVic_blocking(state, vic, color_depth, format);
        pr_info("CDN_API_HDMITX_SetVic_blocking ret = %d\n", ret);
 
-       /* adjust the vsync/hsync polarity */
-       CDN_API_General_Read_Register_blocking(
-                                       state, ADDR_SOURCE_VIF + (HSYNC2VSYNC_POL_CTRL << 2), &regresp);
-       pr_info("Initial HSYNC2VSYNC_POL_CTRL: 0x%x\n", regresp.val);
-       if ((regresp.val & 0x6) != 0) {
-               __raw_writel(0x4, state->mem.ss_base);
-       }
        msleep(50);
 }
 

diff --git a/drivers/gpu/drm/imx/hdp/imx-hdp.c b/drivers/gpu/drm/imx/hdp/imx-hdp.c
index 69d0eca..da37f6f 100644 (file)
--- a/drivers/gpu/drm/imx/hdp/imx-hdp.c
+++ b/drivers/gpu/drm/imx/hdp/imx-hdp.c
@@ -174,8 +174,21 @@ u32 imx_hdp_audio(AUDIO_TYPE type, u32 sample_rate, u32 channels, u32 width)
        return 0;
 }
 
-static void imx_hdp_plmux_config(struct imx_hdp *hdp, struct drm_display_mode *mode)
+static void imx_hdp_state_init(struct imx_hdp *hdp)
 {
+       state_struct *state = &hdp->state;
+
+       memset(state, 0, sizeof(state_struct));
+       mutex_init(&state->mutex);
+
+       state->mem.regs_base = hdp->regs_base;
+       state->mem.ss_base = hdp->ss_base;
+       state->rw = hdp->rw;
+}
+
+static void imx8qm_pixel_link_mux(state_struct *state, struct drm_display_mode *mode)
+{
+       struct imx_hdp *hdp = state_to_imx_hdp(state);
        u32 val;
 
        val = 4; /* RGB */
@@ -189,18 +202,6 @@ static void imx_hdp_plmux_config(struct imx_hdp *hdp, struct drm_display_mode *m
        writel(val, hdp->ss_base + CSR_PIXEL_LINK_MUX_CTL);
 }
 
-static void imx_hdp_state_init(struct imx_hdp *hdp)
-{
-       state_struct *state = &hdp->state;
-
-       memset(state, 0, sizeof(state_struct));
-       mutex_init(&state->mutex);
-
-       state->mem.regs_base = hdp->regs_base;
-       state->mem.ss_base = hdp->ss_base;
-       state->rw = hdp->rw;
-}
-
 int imx8qm_pixel_link_init(state_struct *state)
 {
        struct imx_hdp *hdp = state_to_imx_hdp(state);
@@ -602,8 +603,10 @@ static void imx_hdp_mode_setup(struct imx_hdp *hdp, struct drm_display_mode *mod
 
        imx_hdp_call(hdp, pixel_clock_enable, &hdp->clks);
 
-       imx_hdp_plmux_config(hdp, mode);
+       /* Config pixel link mux */
+       imx_hdp_call(hdp, pixel_link_mux, &hdp->state, mode);
 
+       /* mode set */
        ret = imx_hdp_call(hdp, phy_init, &hdp->state, dp_vic, 1, 8);
        if (ret < 0) {
                DRM_ERROR("Failed to initialise HDP PHY\n");
@@ -887,6 +890,7 @@ static struct hdp_ops imx8qm_dp_ops = {
        .phy_reset = imx8qm_phy_reset,
        .pixel_link_init = imx8qm_pixel_link_init,
        .pixel_link_deinit = imx8qm_pixel_link_deinit,
+       .pixel_link_mux = imx8qm_pixel_link_mux,
 
        .clock_init = imx8qm_clock_init,
        .ipg_clock_set_rate = imx8qm_ipg_clock_set_rate,
@@ -908,6 +912,7 @@ static struct hdp_ops imx8qm_hdmi_ops = {
        .phy_reset = imx8qm_phy_reset,
        .pixel_link_init = imx8qm_pixel_link_init,
        .pixel_link_deinit = imx8qm_pixel_link_deinit,
+       .pixel_link_mux = imx8qm_pixel_link_mux,
 
        .clock_init = imx8qm_clock_init,
        .set_clock_root = imx8qm_hdmi_set_clock_root,

diff --git a/drivers/gpu/drm/imx/hdp/imx-hdp.h b/drivers/gpu/drm/imx/hdp/imx-hdp.h
index 9451110..1323bae 100644 (file)
--- a/drivers/gpu/drm/imx/hdp/imx-hdp.h
+++ b/drivers/gpu/drm/imx/hdp/imx-hdp.h
@@ -90,6 +90,7 @@ struct hdp_ops {
        void (*phy_reset)(sc_ipc_t ipcHndl, u8 reset);
        int (*pixel_link_init)(state_struct *state);
        void (*pixel_link_deinit)(state_struct *state);
+       void (*pixel_link_mux)(state_struct *state, struct drm_display_mode *mode);
 
        int (*clock_init)(struct hdp_clks *clks);
        void (*set_clock_root)(sc_ipc_t ipcHndl);