MLK-15991 arm64: dts: imx8qm: add mlb support

add mlb support for imx8qm

Signed-off-by: Gao Pan <pandy.gao@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
index 135db3d..03907d6 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
@@ -242,6 +242,14 @@
                        >;
                };
 
+               pinctrl_mlb: mlbgrp {
+                       fsl,pins = <
+                               SC_P_MLB_SIG_CONN_MLB_SIG               0x21
+                               SC_P_MLB_CLK_CONN_MLB_CLK               0x21
+                               SC_P_MLB_DATA_CONN_MLB_DATA             0x21
+                       >;
+               };
+
                pinctrl_isl29023: isl29023grp {
                        fsl,pins = <
                                SC_P_ADC_IN2_LSIO_GPIO3_IO20            0x00000021
@@ -717,6 +725,13 @@
        };
 };
 
+&mlb {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_mlb>;
+       pinctrl-assert-gpios = <&pca9557_d 2 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
 &isi_0 {
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
index 9cd7a76..4becc6e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
@@ -2034,6 +2034,24 @@
                status = "disabled";
        };
 
+       mlb: mlb@5B060000 {
+               compatible = "fsl,imx6q-mlb150";
+               reg = <0x0 0x5B060000 0x0 0x10000>;
+               interrupt-parent = <&gic>;
+               interrupts = <0 265 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 266 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&clk IMX8QM_MLB_CLK>,
+                        <&clk IMX8QM_MLB_HCLK>,
+                        <&clk IMX8QM_MLB_IPG_CLK>;
+               clock-names = "mlb", "hclk", "ipg";
+               assigned-clocks = <&clk IMX8QM_MLB_CLK>,
+                                 <&clk IMX8QM_MLB_HCLK>,
+                                 <&clk IMX8QM_MLB_IPG_CLK>;
+               assigned-clock-rates = <333333333>, <333333333>, <83333333>;
+               power-domains = <&pd_conn_mlb0>;
+               status = "disabled";
+       };
+
        usdhc1: usdhc@5b010000 {
                compatible = "fsl,imx8qm-usdhc", "fsl,imx6sl-usdhc";
                interrupt-parent = <&gic>;