MLK-10447-01: dts: imx7d sdb: Add 74LV595 driver
authorFugang Duan <b38611@freescale.com>
Tue, 28 Jul 2015 03:09:20 +0000 (11:09 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 19:46:52 +0000 (14:46 -0500)
-74LV595 function compatible with 74HC595, add 74HC595
driver into imx7d sdb dts.
-74LV595 register as a GPIO device and access 74LV595 chip
by SPI GPIO, so add spi_gpio driver into imx7 sdb dts.

Signed-off-by: Sandor Yu <R01008@freescale.com>
igned-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: 61fe7af7e47dd8bf6acc91ceabd9e660d28de28a)

arch/arm/boot/dts/imx7d-sdb.dts

index 340f816..43c264d 100644 (file)
                        regulator-max-microvolt = <1800000>;
                };
        };
+
+       spi4 {
+               compatible = "spi-gpio";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_spi1>;
+               status = "okay";
+               gpio-sck = <&gpio1 13 0>;
+               gpio-mosi = <&gpio1 9 0>;
+               cs-gpios = <&gpio1 12 0>;
+               num-chipselects = <1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpio_spi: gpio_spi@0 {
+                       compatible = "fairchild,74hc595";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       reg = <0>;
+                       registers-number = <1>;
+                       registers-default = /bits/ 8 <0x74>; /* Enable PERI_3V3, SENSOR_RST_B and HDMI_RST*/
+                       spi-max-frequency = <100000>;
+               };
+       };
 };
 
 &adc1 {
 &fec1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet1>;
+       pinctrl-assert-gpios = <&gpio_spi 5 GPIO_ACTIVE_HIGH>;
        assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
                          <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
        assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
                        >;
                };
 
+               pinctrl_spi1: spi1grp {
+                       fsl,pins = <
+                               MX7D_PAD_GPIO1_IO09__GPIO1_IO9  0x59
+                               MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59
+                               MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59
+                       >;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX    0x79