LF-3755 PCI: imx: move the compliance tests mode enable to command line

To avoid the kernel rebuild after change the menuconfig, move the i.MX
PCIe compliance tests mode enable to kernel command line.
Use the "pcie_cz_enabled=yes" to enable the compliance tests mode.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>

diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
index b6037bb..ecdaabb 100644 (file)
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -101,14 +101,6 @@ config PCI_IMX6_HOST
          Enables support for the PCIe controller host mode in the
          iMX6/7/8 SoCs to work in endpoint mode.
 
-config PCI_IMX6_COMPLIANCE_TEST
-       bool "Enable pcie compliance tests on imx6"
-       depends on PCI_IMX6_HOST
-       default n
-       help
-         Say Y here if you want do the compliance tests on imx6 pcie rc found
-         on FSL iMX SoCs.
-
 config PCI_IMX6_EP
        bool "Freescale i.MX6/7/8 PCIe controller endpoint mode"
        depends on ARCH_MXC || COMPILE_TEST

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 37d9880..9026b1c 100644 (file)
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -277,6 +277,7 @@ struct imx6_pcie {
 #define IMX8MM_GPR_PCIE_POWER_OFF              BIT(17)
 #define IMX8MM_GPR_PCIE_SSC_EN                 BIT(16)
 
+static int imx6_pcie_cz_enabled;
 static void imx6_pcie_ltssm_disable(struct device *dev);
 
 static bool imx6_pcie_readable_reg(struct device *dev, unsigned int reg)
@@ -1806,7 +1807,7 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
         * started in Gen2 mode, there is a possibility the devices on the
         * bus will not be detected at all.  This happens with PCIe switches.
         */
-       if (!IS_ENABLED(CONFIG_PCI_IMX6_COMPLIANCE_TEST)) {
+       if (!imx6_pcie_cz_enabled) {
                tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
                tmp &= ~PCI_EXP_LNKCAP_SLS;
                tmp |= PCI_EXP_LNKCAP_SLS_2_5GB;
@@ -1883,7 +1884,7 @@ err_reset_phy:
                dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
                dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
        imx6_pcie_reset_phy(imx6_pcie);
-       if (!IS_ENABLED(CONFIG_PCI_IMX6_COMPLIANCE_TEST)) {
+       if (!imx6_pcie_cz_enabled) {
                imx6_pcie_clk_disable(imx6_pcie);
                if (imx6_pcie->vpcie != NULL)
                        regulator_disable(imx6_pcie->vpcie);
@@ -2369,6 +2370,17 @@ static const struct dev_pm_ops imx6_pcie_pm_ops = {
                                      imx6_pcie_resume_noirq)
 };
 
+static int __init imx6_pcie_compliance_test_enable(char *str)
+{
+       if (!strcmp(str, "yes")) {
+               pr_info("Enable the i.MX PCIe compliance tests mode.\n");
+               imx6_pcie_cz_enabled = 1;
+       }
+       return 1;
+}
+
+__setup("pcie_cz_enabled=", imx6_pcie_compliance_test_enable);
+
 static int imx6_pcie_probe(struct platform_device *pdev)
 {
        struct device *dev = &pdev->dev;
@@ -2714,7 +2726,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
 
                ret = imx6_add_pcie_port(imx6_pcie, pdev);
                if (ret < 0) {
-                       if (IS_ENABLED(CONFIG_PCI_IMX6_COMPLIANCE_TEST)) {
+                       if (imx6_pcie_cz_enabled) {
                                /* The PCIE clocks wouldn't be turned off */
                                dev_info(dev, "To do the compliance tests.\n");
                                ret = 0;