MLK-15288-2 imx8m: Fix build warning in clock
authorYe Li <ye.li@nxp.com>
Tue, 27 Jun 2017 02:29:48 +0000 (21:29 -0500)
committerJason Liu <jason.hui.liu@nxp.com>
Thu, 2 Nov 2017 18:36:57 +0000 (02:36 +0800)
Fix the build warning below:

arch/arm/cpu/armv8/imx8m/clock.c: In function ‘decode_frac_pll’:
arch/arm/cpu/armv8/imx8m/clock.c:37:36: warning: variable ‘pll_newdiv’
set but not used [-Wunused-but-set-variable]
 u32 divr_val, divq_val, divf_val, pll_newdiv, divff, divfi;

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
arch/arm/cpu/armv8/imx8m/clock.c

index fd86cd7..17debd6 100644 (file)
@@ -34,7 +34,7 @@ u32 decode_frac_pll(enum clk_root_src frac_pll)
 {
        u32 pll_cfg0, pll_cfg1, pllout;
        u32 pll_refclk_sel, pll_refclk;
-       u32 divr_val, divq_val, divf_val, pll_newdiv, divff, divfi;
+       u32 divr_val, divq_val, divf_val, divff, divfi;
        u32 pllout_div_shift, pllout_div_mask, pllout_div;
 
        switch (frac_pll) {
@@ -77,7 +77,6 @@ u32 decode_frac_pll(enum clk_root_src frac_pll)
        divr_val = (pll_cfg0 & FRAC_PLL_REFCLK_DIV_VAL_MASK) >>
                FRAC_PLL_REFCLK_DIV_VAL_SHIFT;
        divq_val = pll_cfg0 & FRAC_PLL_OUTPUT_DIV_VAL_MASK;
-       pll_newdiv = pll_cfg0 & FRAC_PLL_NEWDIV_VAL_MASK;
 
        divff = (pll_cfg1 & FRAC_PLL_FRAC_DIV_CTL_MASK) >>
                FRAC_PLL_FRAC_DIV_CTL_SHIFT;