We've earlier added support to split the register address space into TM
and SROT regions. Split up the regmap address space into two for msm8974
that has a similar register layout.
Since tsens-common.c/init_common() currently only registers one address
space, the order is important (TM before SROT). This is OK since the
code doesn't really use the SROT functionality yet.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
};
};
- tsens: thermal-sensor@fc4a8000 {
+ tsens: thermal-sensor@fc4a9000 {
compatible = "qcom,msm8974-tsens";
- reg = <0xfc4a8000 0x2000>;
+ reg = <0xfc4a9000 0x1000>, /* TM */
+ <0xfc4a8000 0x1000>; /* SROT */
nvmem-cells = <&tsens_calib>, <&tsens_backup>;
nvmem-cell-names = "calib", "calib_backup";
#thermal-sensor-cells = <1>;