enum dcss_hdr10_gamut opipe_g;
enum dcss_hdr10_pixel_range opipe_pr;
u32 opipe_pix_format;
+
+ bool fist_vblank_after_en;
};
static void dcss_crtc_reset(struct drm_crtc *crtc)
dcss_dtg_enable(dcss, true, NULL);
dcss_ctxld_enable(dcss);
+ dcss_crtc->fist_vblank_after_en = true;
+
crtc->enabled = true;
}
}
spin_unlock_irq(&crtc->dev->event_lock);
- drm_crtc_vblank_off(crtc);
-
dcss_ss_enable(dcss, false);
dcss_dtg_enable(dcss, false, &dcss_crtc->disable_completion);
dcss_ctxld_enable(dcss);
wait_for_completion_timeout(&dcss_crtc->disable_completion,
msecs_to_jiffies(100));
+ drm_crtc_vblank_off(crtc);
+
pm_runtime_put_sync(dcss_crtc->dev->parent);
}
dcss_trace_module(TRACE_DRM_CRTC, TRACE_VBLANK);
- if (dcss_ctxld_is_flushed(dcss))
+ if (dcss_ctxld_is_flushed(dcss) || dcss_crtc->fist_vblank_after_en) {
drm_crtc_handle_vblank(&dcss_crtc->base);
+ dcss_crtc->fist_vblank_after_en = false;
+ }
dcss_vblank_irq_clear(dcss);