MLK-19460-1: drm: imx: dcss: lower CTXLD trigger IRQ threshold

Currently, the CTXLD IRQ trigger interrupt is set to 98% of the total
vertical frame lines.  This leaves little room for interrupt handling
since the DB trigger point is set to 99%.

This patch moves the CTXLD IRQ trigger to 95%. Hence, if PM_QoS is
disabled, and A-53 cores are allowed to go to idle (hence slightly
bigger interrupt servicing time), we have enough time to handle the
interrupt and arm the CTLXD, before DB trigger point.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>

diff --git a/drivers/gpu/imx/dcss/dcss-dtg.c b/drivers/gpu/imx/dcss/dcss-dtg.c
index 157f153..1bd686d 100644 (file)
--- a/drivers/gpu/imx/dcss/dcss-dtg.c
+++ b/drivers/gpu/imx/dcss/dcss-dtg.c
@@ -308,7 +308,7 @@ void dcss_dtg_sync_set(struct dcss_soc *dcss, struct videomode *vm)
        dcss_dtg_write(dtg, 0, DCSS_DTG_LINE0_INT);
 
        /* CTXLD trigger */
-       dcss_dtg_write(dtg, ((98 * dis_lrc_y) / 100) << 16, DCSS_DTG_LINE1_INT);
+       dcss_dtg_write(dtg, ((95 * dis_lrc_y) / 100) << 16, DCSS_DTG_LINE0_INT);
 }
 EXPORT_SYMBOL(dcss_dtg_sync_set);