MLK-11016 arm: clk: enable m4 root clk when m4 core is running

M4 root clk shouldn't be turn off when M4 core is running

Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
(cherry picked from commit 7a3734bd4d4a249d5d3e081fd6b6255da756a841)

diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index af29117..7441354 100644 (file)
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -34,6 +34,7 @@
 #define SRC_GPR1_V2                    0x074
 #define SRC_A7RCR0                     0x004
 #define SRC_A7RCR1                     0x008
+#define SRC_M4RCR                      0x00C
 
 #define BP_SRC_A7RCR0_A7_CORE_RESET0   0
 #define BP_SRC_A7RCR1_A7_CORE1_ENABLE  1
@@ -167,8 +168,14 @@ void __init imx_src_init(void)
        src_base = of_iomap(np, 0);
        WARN_ON(!src_base);
 
-       if (cpu_is_imx7d())
+       if (cpu_is_imx7d()) {
+               val = readl_relaxed(src_base + SRC_M4RCR);
+               if ((val & BIT(3)) == BIT(3))
+                       m4_is_enabled = true;
+               else
+                       m4_is_enabled = false;
                return;
+       }
 
        imx_reset_controller.of_node = np;
        if (IS_ENABLED(CONFIG_RESET_CONTROLLER))

diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index a582f82..1d7bc02 100644 (file)
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -693,7 +693,7 @@ static int __init imx_amp_power_init(void)
        int i;
        void __iomem *shared_mem_base;
 
-       if (!imx_src_is_m4_enabled())
+       if (!(imx_src_is_m4_enabled()))
                return 0;
 
        amp_power_mutex = imx_sema4_mutex_create(0, MCC_POWER_SHMEM_NUMBER);

diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
index 3c70b51..362ae49 100644 (file)
--- a/drivers/clk/imx/clk-imx7d.c
+++ b/drivers/clk/imx/clk-imx7d.c
@@ -19,6 +19,7 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/types.h>
+#include <soc/imx/src.h>
 
 #include "clk.h"
 
@@ -892,6 +893,11 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
        for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
                clk_prepare_enable(clks[clks_init_on[i]]);
 
+       if (imx_src_is_m4_enabled()) {
+               imx_clk_set_parent(clks[IMX7D_ARM_M4_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]);
+               imx_clk_prepare_enable(clks[IMX7D_ARM_M4_ROOT_CLK]);
+       }
+
        imx_clk_set_parent(clks[IMX7D_PLL_ARM_MAIN_BYPASS], clks[IMX7D_PLL_ARM_MAIN]);
        imx_clk_set_parent(clks[IMX7D_PLL_DRAM_MAIN_BYPASS], clks[IMX7D_PLL_DRAM_MAIN]);
        imx_clk_set_parent(clks[IMX7D_PLL_SYS_MAIN_BYPASS], clks[IMX7D_PLL_SYS_MAIN]);