gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ reg_audio_board: regulator-audio-board {
+ compatible = "regulator-fixed";
+ regulator-name = "EXT_PWREN";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ startup-delay-us = <300000>;
+ gpio = <&pca6416 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ wm8524: audio-codec {
+ #sound-dai-cells = <0>;
+ compatible = "wlf,wm8524";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_wlf>;
+ wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
+ clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
+ clock-names = "mclk";
+ };
+
+ sound-wm8524 {
+ compatible = "fsl,imx-audio-wm8524";
+ model = "wm8524-audio";
+ audio-cpu = <&sai3>;
+ audio-codec = <&wm8524>;
+ audio-routing =
+ "Line Out Jack", "LINEVOUTL",
+ "Line Out Jack", "LINEVOUTR";
+ audio-asrc = <&easrc>;
+ };
+
+ sound-micfil {
+ compatible = "fsl,imx-audio-micfil";
+ model = "imx-audio-micfil";
+ cpu-dai = <&micfil>;
+ };
+
+ sound-spdif {
+ compatible = "fsl,imx-audio-spdif";
+ model = "imx-spdif";
+ spdif-controller = <&spdif1>;
+ spdif-out;
+ spdif-in;
+ };
+
+ sound-ak5558 {
+ compatible = "fsl,imx-audio-ak5558";
+ model = "ak5558-audio";
+ audio-cpu = <&sai5>;
+ audio-codec = <&ak5558>;
+ status = "disabled";
+ };
+};
+
+&clk {
+ assigned-clocks = <&clk IMX8MN_AUDIO_PLL1>, <&clk IMX8MN_AUDIO_PLL2>;
+ assigned-clock-rates = <393216000>, <361267200>;
+};
+
+&easrc {
+ fsl,asrc-rate = <48000>;
+ status = "okay";
};
&fec1 {
};
};
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ pinctrl-1 = <&pinctrl_i2c3_gpio>;
+ scl-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ pca6416: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ ak4458_1: ak4458@10 {
+ compatible = "asahi-kasei,ak4458";
+ reg = <0x10>;
+ AVDD-supply = <®_audio_board>;
+ DVDD-supply = <®_audio_board>;
+ };
+
+ ak4458_2: ak4458@12 {
+ compatible = "asahi-kasei,ak4458";
+ reg = <0x12>;
+ AVDD-supply = <®_audio_board>;
+ DVDD-supply = <®_audio_board>;
+ };
+
+ ak5558: ak5558@13 {
+ compatible = "asahi-kasei,ak5558";
+ reg = <0x13>;
+ ak5558,pdn-gpio = <&pca6416 3 GPIO_ACTIVE_HIGH>;
+ AVDD-supply = <®_audio_board>;
+ DVDD-supply = <®_audio_board>;
+ };
+
+ ak4497: ak4497@11 {
+ compatible = "asahi-kasei,ak4497";
+ reg = <0x11>;
+ ak4497,pdn-gpio = <&pca6416 5 GPIO_ACTIVE_HIGH>;
+ AVDD-supply = <®_audio_board>;
+ DVDD-supply = <®_audio_board>;
+ };
+};
+
+&micfil {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pdm>;
+ assigned-clocks = <&clk IMX8MN_CLK_PDM>;
+ assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <196608000>;
+ status = "okay";
+};
+
+&sai3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai3>;
+ assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
+ assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <24576000>;
+ status = "okay";
+};
+
+&sai5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai5>;
+ assigned-clocks = <&clk IMX8MN_CLK_SAI5>;
+ assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <49152000>;
+ clocks = <&clk IMX8MN_CLK_SAI5_IPG>, <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI5_ROOT>, <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_AUDIO_PLL1_OUT>,
+ <&clk IMX8MN_AUDIO_PLL2_OUT>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
+ fsl,sai-asynchronous;
+ status = "disabled";
+};
+
+&spdif1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spdif1>;
+ assigned-clocks = <&clk IMX8MN_CLK_SPDIF1>;
+ assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <24576000>;
+ clocks = <&clk IMX8MN_CLK_AUDIO_AHB>, <&clk IMX8MN_CLK_24M>,
+ <&clk IMX8MN_CLK_SPDIF1>, <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_AUDIO_AHB>, <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_AUDIO_PLL1_OUT>, <&clk IMX8MN_AUDIO_PLL2_OUT>;
+ clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3",
+ "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k";
+ status = "okay";
+};
+
&snvs_pwrkey {
status = "okay";
};
>;
};
+ pinctrl_gpio_wlf: gpiowlfgrp {
+ fsl,pins = <
+ MX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6
+ >;
+ };
+
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
>;
};
+ pinctrl_i2c3_gpio: i2c3grp-gpio {
+ fsl,pins = <
+ MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1c3
+ MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1c3
+ >;
+ };
+
pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
>;
};
+ pinctrl_pdm: pdmgrp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SAI5_MCLK_SAI5_MCLK 0xd6
+ MX8MN_IOMUXC_SAI5_RXC_PDM_CLK 0xd6
+ MX8MN_IOMUXC_SAI5_RXFS_SAI5_RX_SYNC 0xd6
+ MX8MN_IOMUXC_SAI5_RXD0_PDM_BIT_STREAM0 0xd6
+ MX8MN_IOMUXC_SAI5_RXD1_PDM_BIT_STREAM1 0xd6
+ MX8MN_IOMUXC_SAI5_RXD2_PDM_BIT_STREAM2 0xd6
+ MX8MN_IOMUXC_SAI5_RXD3_PDM_BIT_STREAM3 0xd6
+ >;
+ };
+
+ pinctrl_sai3: sai3grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
+ MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
+ MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
+ MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
+ >;
+ };
+
+ pinctrl_sai5: sai5grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SAI5_MCLK_SAI5_MCLK 0xd6
+ MX8MN_IOMUXC_SAI5_RXC_SAI5_RX_BCLK 0xd6
+ MX8MN_IOMUXC_SAI5_RXFS_SAI5_RX_SYNC 0xd6
+ MX8MN_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0xd6
+ MX8MN_IOMUXC_SAI5_RXD1_SAI5_RX_DATA1 0xd6
+ MX8MN_IOMUXC_SAI5_RXD2_SAI5_RX_DATA2 0xd6
+ MX8MN_IOMUXC_SAI5_RXD3_SAI5_RX_DATA3 0xd6
+ >;
+ };
+
+ pinctrl_spdif1: spdif1grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6
+ MX8MN_IOMUXC_SPDIF_RX_SPDIF1_IN 0xd6
+ >;
+ };
+
+
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
fsl,pins = <
MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
#size-cells = <1>;
ranges;
+ spba-bus@30000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30000000 0x100000>;
+ ranges;
+
+ easrc: easrc@300C0000 {
+ compatible = "fsl,imx8mn-easrc";
+ reg = <0x300C0000 0x10000>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
+ clock-names = "mem";
+ dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
+ <&sdma2 18 23 0> , <&sdma2 19 23 0>,
+ <&sdma2 20 23 0> , <&sdma2 21 23 0>,
+ <&sdma2 22 23 0> , <&sdma2 23 23 0>;
+ dma-names = "ctx0_rx", "ctx0_tx",
+ "ctx1_rx", "ctx1_tx",
+ "ctx2_rx", "ctx2_tx",
+ "ctx3_rx", "ctx3_tx";
+ fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
+ fsl,asrc-rate = <8000>;
+ fsl,asrc-width = <16>;
+ status = "disabled";
+ };
+
+ sai2: sai@30020000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30020000 0x10000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI2_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai3: sai@30030000 {
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai", "fsl,imx6sx-sai";
+ reg = <0x30030000 0x10000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI3_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai5: sai@30050000 {
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai", "fsl,imx6sx-sai";
+ reg = <0x30050000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI5_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI5_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
+ dma-names = "rx", "tx";
+ fsl,shared-interrupt;
+ fsl,dataline = <0 0xf 0xf>;
+ status = "disabled";
+ };
+
+ sai6: sai@30060000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30060000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI6_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI6_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai7: sai@300b0000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x300b0000 0x10000>;
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI7_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI7_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 12 2 0>, <&sdma2 13 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ micfil: micfil@30080000 {
+ compatible = "fsl,imx8mm-micfil";
+ reg = <0x30080000 0x10000>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_PDM_IPG>,
+ <&clk IMX8MN_CLK_PDM_ROOT>,
+ <&clk IMX8MN_AUDIO_PLL1_OUT>,
+ <&clk IMX8MN_AUDIO_PLL2_OUT>,
+ <&clk IMX8MN_CLK_EXT3>;
+ clock-names = "ipg_clk", "ipg_clk_app",
+ "pll8k", "pll11k", "clkext3";
+ dmas = <&sdma2 24 25 0x80000000>;
+ dma-names = "rx";
+ status = "disabled";
+ };
+
+ spdif1: spdif@30090000 {
+ compatible = "fsl,imx8mm-spdif";
+ reg = <0x30090000 0x10000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_AUDIO_AHB>, /* core */
+ <&clk IMX8MN_CLK_24M>, /* rxtx0 */
+ <&clk IMX8MN_CLK_SPDIF1>, /* rxtx1 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx2 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx3 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx4 */
+ <&clk IMX8MN_CLK_AUDIO_AHB>, /* rxtx5 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx6 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx7 */
+ <&clk IMX8MN_CLK_DUMMY>; /* spba */
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7", "spba";
+ dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+ };
+
gpio1: gpio@30200000 {
compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
reg = <0x30200000 0x10000>;
};
sdma3: dma-controller@302b0000 {
- compatible = "fsl,imx8mn-sdma", "fsl,imx8mq-sdma";
+ compatible = "fsl,imx8mn-sdma", "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
reg = <0x302b0000 0x10000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_SDMA3_ROOT>,
};
sdma2: dma-controller@302c0000 {
- compatible = "fsl,imx8mn-sdma", "fsl,imx8mq-sdma";
+ compatible = "fsl,imx8mn-sdma", "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
reg = <0x302c0000 0x10000>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_SDMA2_ROOT>,
};
sdma1: dma-controller@30bd0000 {
- compatible = "fsl,imx8mn-sdma", "fsl,imx8mq-sdma";
+ compatible = "fsl,imx8mn-sdma", "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
reg = <0x30bd0000 0x10000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_SDMA1_ROOT>,
projects / linux.git / commitdiff