MLK-16475-02 arm64: dts: imx8qm/qxp: pull up uart pins in default

Pull up uart pins in default.

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
index ab46835..70d58f0 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
@@ -287,26 +287,26 @@
 
                pinctrl_lpuart0: lpuart0grp {
                        fsl,pins = <
-                               SC_P_UART0_RX_DMA_UART0_RX              0x0600004c
-                               SC_P_UART0_TX_DMA_UART0_TX              0x0600004c
-                               SC_P_UART0_RTS_B_DMA_UART0_RTS_B        0x0600004c
-                               SC_P_UART0_CTS_B_DMA_UART0_CTS_B        0x0600004c
+                               SC_P_UART0_RX_DMA_UART0_RX              0x06000020
+                               SC_P_UART0_TX_DMA_UART0_TX              0x06000020
+                               SC_P_UART0_RTS_B_DMA_UART0_RTS_B        0x06000020
+                               SC_P_UART0_CTS_B_DMA_UART0_CTS_B        0x06000020
                        >;
                };
 
                pinctrl_lpuart1: lpuart1grp {
                        fsl,pins = <
-                               SC_P_UART1_RX_DMA_UART1_RX              0x0600004c
-                               SC_P_UART1_TX_DMA_UART1_TX              0x0600004c
-                               SC_P_UART1_CTS_B_DMA_UART1_CTS_B        0x0600004c
-                               SC_P_UART1_RTS_B_DMA_UART1_RTS_B        0x0600004c
+                               SC_P_UART1_RX_DMA_UART1_RX              0x06000020
+                               SC_P_UART1_TX_DMA_UART1_TX              0x06000020
+                               SC_P_UART1_CTS_B_DMA_UART1_CTS_B        0x06000020
+                               SC_P_UART1_RTS_B_DMA_UART1_RTS_B        0x06000020
                        >;
                };
 
                pinctrl_lpuart3: lpuart3grp {
                        fsl,pins = <
-                               SC_P_M41_GPIO0_00_DMA_UART3_RX          0x0600004c
-                               SC_P_M41_GPIO0_01_DMA_UART3_TX          0x0600004c
+                               SC_P_M41_GPIO0_00_DMA_UART3_RX          0x06000020
+                               SC_P_M41_GPIO0_01_DMA_UART3_TX          0x06000020
                        >;
                };
 

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts
index 96ef773..d97a118 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts
@@ -303,24 +303,24 @@
 
                pinctrl_lpuart0: lpuart0grp {
                        fsl,pins = <
-                               SC_P_UART0_RX_ADMA_UART0_RX     0x0600004c
-                               SC_P_UART0_TX_ADMA_UART0_TX     0x0600004c
+                               SC_P_UART0_RX_ADMA_UART0_RX     0x0600002c
+                               SC_P_UART0_TX_ADMA_UART0_TX     0x0600002c
                        >;
                };
 
                pinctrl_lpuart1: lpuart1grp {
                        fsl,pins = <
-                               SC_P_UART1_TX_ADMA_UART1_TX             0x0600004c
-                               SC_P_UART1_RX_ADMA_UART1_RX             0x0600004c
-                               SC_P_UART1_RTS_B_ADMA_UART1_RTS_B       0x0600004c
-                               SC_P_UART1_CTS_B_ADMA_UART1_CTS_B       0x0600004c
+                               SC_P_UART1_TX_ADMA_UART1_TX             0x0600002c
+                               SC_P_UART1_RX_ADMA_UART1_RX             0x0600002c
+                               SC_P_UART1_RTS_B_ADMA_UART1_RTS_B       0x0600002c
+                               SC_P_UART1_CTS_B_ADMA_UART1_CTS_B       0x0600002c
                        >;
                };
 
                pinctrl_lpuart3: lpuart3grp {
                        fsl,pins = <
-                               SC_P_FLEXCAN2_RX_ADMA_UART3_RX  0x0600004c
-                               SC_P_FLEXCAN2_TX_ADMA_UART3_TX  0x0600004c
+                               SC_P_FLEXCAN2_RX_ADMA_UART3_RX  0x0600002c
+                               SC_P_FLEXCAN2_TX_ADMA_UART3_TX  0x0600002c
                        >;
                };
 

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts
index 8a44319..7540a62 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts
@@ -146,17 +146,17 @@
 
                pinctrl_lpuart0: lpuart0grp {
                        fsl,pins = <
-                               SC_P_UART0_RX_ADMA_UART0_RX     0x0600004c
-                               SC_P_UART0_TX_ADMA_UART0_TX     0x0600004c
+                               SC_P_UART0_RX_ADMA_UART0_RX     0x0600002c
+                               SC_P_UART0_TX_ADMA_UART0_TX     0x0600002c
                        >;
                };
 
                pinctrl_lpuart1: lpuart1grp {
                        fsl,pins = <
-                               SC_P_UART1_TX_ADMA_UART1_TX             0x0600004c
-                               SC_P_UART1_RX_ADMA_UART1_RX             0x0600004c
-                               SC_P_UART1_RTS_B_ADMA_UART1_RTS_B       0x0600004c
-                               SC_P_UART1_CTS_B_ADMA_UART1_CTS_B       0x0600004c
+                               SC_P_UART1_TX_ADMA_UART1_TX             0x0600002c
+                               SC_P_UART1_RX_ADMA_UART1_RX             0x0600002c
+                               SC_P_UART1_RTS_B_ADMA_UART1_RTS_B       0x0600002c
+                               SC_P_UART1_CTS_B_ADMA_UART1_CTS_B       0x0600002c
                        >;
                };