ARM: imx6: Align ssi nodes between mx6 variants
authorFabio Estevam <fabio.estevam@freescale.com>
Mon, 7 Jul 2014 13:04:52 +0000 (10:04 -0300)
committerShawn Guo <shawn.guo@freescale.com>
Fri, 18 Jul 2014 08:49:44 +0000 (16:49 +0800)
Since commit 98ea6ad2edd2 (ARM: dts: imx6: use imx51-ssi) the mx6 ssi is
compatible with imx51, so align all the mx6 variant ssi compatible strings as:

compatible = "fsl,<imx6-soc>-ssi", "fsl,imx51-ssi";

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/imx6sl.dtsi
arch/arm/boot/dts/imx6sx.dtsi

index d7c97d9..c701af9 100644 (file)
 
                                ssi1: ssi@02028000 {
                                        compatible = "fsl,imx6q-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x02028000 0x4000>;
                                        interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6QDL_CLK_SSI1_IPG>;
 
                                ssi2: ssi@0202c000 {
                                        compatible = "fsl,imx6q-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x0202c000 0x4000>;
                                        interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6QDL_CLK_SSI2_IPG>;
 
                                ssi3: ssi@02030000 {
                                        compatible = "fsl,imx6q-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x02030000 0x4000>;
                                        interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6QDL_CLK_SSI3_IPG>;
index 0467ac0..c75800c 100644 (file)
 
                                ssi1: ssi@02028000 {
                                        compatible = "fsl,imx6sl-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x02028000 0x4000>;
                                        interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_SSI1>;
 
                                ssi2: ssi@0202c000 {
                                        compatible = "fsl,imx6sl-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x0202c000 0x4000>;
                                        interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_SSI2>;
 
                                ssi3: ssi@02030000 {
                                        compatible = "fsl,imx6sl-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x02030000 0x4000>;
                                        interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_SSI3>;
index 0c5094a..f4b9da6 100644 (file)
                                };
 
                                ssi1: ssi@02028000 {
-                                       compatible = "fsl,imx6sx-ssi", "fsl,imx21-ssi";
+                                       compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
                                        reg = <0x02028000 0x4000>;
                                        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SX_CLK_SSI1_IPG>,
                                };
 
                                ssi2: ssi@0202c000 {
-                                       compatible = "fsl,imx6sx-ssi", "fsl,imx21-ssi";
+                                       compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
                                        reg = <0x0202c000 0x4000>;
                                        interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SX_CLK_SSI2_IPG>,
                                };
 
                                ssi3: ssi@02030000 {
-                                       compatible = "fsl,imx6sx-ssi", "fsl,imx21-ssi";
+                                       compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
                                        reg = <0x02030000 0x4000>;
                                        interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SX_CLK_SSI3_IPG>,