/******************************************************************************
*
- * Copyright (C) 2016-2017 Cadence Design Systems, Inc.
+ * Copyright (C) 2016-2018 Cadence Design Systems, Inc.
* All rights reserved worldwide.
*
* Redistribution and use in source and binary forms, with or without modification,
(state, numOfBytes, addr, resp, bus_type));
}
+CDN_API_STATUS CDN_API_DPTX_I2C_Read(state_struct *state,
+ u32 numOfBytes, u8 addr, u8 mot, DPTX_I2C_Read_response *resp)
+{
+ CDN_API_STATUS ret;
+ if(!state->running)
+ {
+ internal_tx_mkfullmsg(state, MB_MODULE_ID_DP_TX, DPTX_I2C_READ, 3,
+ 2, numOfBytes,
+ 1, addr,
+ 1, mot);
+ state->bus_type = CDN_BUS_TYPE_APB;
+ state->rxEnable = 1;
+ return CDN_STARTED;
+ }
+ internal_process_messages(state);
+ if((ret = internal_test_rx_head(state, MB_MODULE_ID_DP_TX, DPTX_I2C_READ_RESP)) != CDN_OK)
+ {
+ state->running = 0;
+ return ret;
+ }
+ /* Clean most significant bytes in members of structure used for response. */
+ resp->size = 0;
+ resp->addr = 0;
+ internal_readmsg(state, 3,
+ 2, &resp->size,
+ 1, &resp->addr,
+ 0, &resp->buff);
+ state->running = 0;
+ return CDN_OK;
+}
+
+CDN_API_STATUS CDN_API_DPTX_I2C_Read_blocking(state_struct *state, u32 numOfBytes, u8 addr, u8 mot, DPTX_I2C_Read_response *resp)
+{
+ internal_block_function(&state->mutex, CDN_API_DPTX_I2C_Read(state, numOfBytes, addr, mot, resp));
+}
+
+CDN_API_STATUS CDN_API_DPTX_I2C_Write(state_struct *state, u32 numOfBytes, u8 addr, u8 mot, u8 *buff, DPTX_I2C_Write_response *resp)
+{
+ CDN_API_STATUS ret;
+ if(!state->running)
+ {
+ if(!internal_apb_available(state))
+ return CDN_BSY;
+ internal_tx_mkfullmsg(state,
+ MB_MODULE_ID_DP_TX, DPTX_I2C_WRITE, 4,
+ 2, numOfBytes,
+ 1, addr,
+ 1, mot,
+ -numOfBytes, buff);
+ state->rxEnable = 1;
+ state->bus_type = CDN_BUS_TYPE_APB;
+ return CDN_STARTED;
+ }
+ internal_process_messages(state);
+ if((ret = internal_test_rx_head(state, MB_MODULE_ID_DP_TX, DPTX_I2C_WRITE_RESP)) != CDN_OK)
+ return ret;
+ internal_readmsg(state, 2,
+ 2, &resp->size,
+ 1, &resp->addr);
+ return CDN_OK;
+}
+
+CDN_API_STATUS CDN_API_DPTX_I2C_Write_blocking(state_struct *state, u32 numOfBytes, u8 addr, u8 mot, u8 *buff, DPTX_I2C_Write_response *resp)
+{
+ internal_block_function(&state->mutex, CDN_API_DPTX_I2C_Write(state, numOfBytes, addr, mot, buff, resp));
+}
+
CDN_API_STATUS CDN_API_DPTX_Read_EDID(state_struct *state, u8 segment,
u8 extension,
DPTX_Read_EDID_response *resp)
if (ret != CDN_OK)
return ret;
internal_readmsg(state, 3,
- 1, &resp->size, 1, &resp->blockNo, 0, &resp->buff);
+ 1, &resp->size,
+ 1, &resp->blockNo,
+ 0, &resp->buff);
return CDN_OK;
}
internal_block_function(&state->mutex, CDN_API_DPTX_GetLastAuxStatus(state, resp));
}
+CDN_API_STATUS CDN_API_DPTX_GetLastI2cStatus(state_struct *state, u8 *resp)
+{
+ internal_macro_command_txrx(state, MB_MODULE_ID_DP_TX, DPTX_GET_LAST_I2C_STATUS, CDN_BUS_TYPE_APB, 0);
+ internal_readmsg(state, 1, 1, resp);
+ return CDN_OK;
+}
+
+CDN_API_STATUS CDN_API_DPTX_GetLastI2cStatus_blocking(state_struct *state, u8 *resp)
+{
+ internal_block_function(&state->mutex, CDN_API_DPTX_GetLastI2cStatus(state, resp));
+}
+
CDN_API_STATUS CDN_API_DPTX_GetHpdStatus(state_struct *state, u8 *resp)
{
internal_macro_command_txrx(state, MB_MODULE_ID_DP_TX, DPTX_HPD_STATE,
/******************************************************************************
*
- * Copyright (C) 2016-2017 Cadence Design Systems, Inc.
+ * Copyright (C) 2016-2018 Cadence Design Systems, Inc.
* All rights reserved worldwide.
*
* Redistribution and use in source and binary forms, with or without modification,
typedef u8 CDN_API_PWR_MODE;
typedef u32 CDN_EVENT;
+/**
+ * reply data struct for #CDN_API_DPTX_I2C_Read
+ */
+typedef struct
+{
+ /** buffer where data will be stored, will become invalid after next call to API */
+ u8 *buff;
+ int addr;
+ int size;
+} DPTX_I2C_Read_response;
+/**
+ * \brief Cadence API for DP TX to read bytes using I2C-over-AUX
+ *
+ * \param [in] numOfBytes - number of bytes to read
+ * \param [in] addr - I2C slave address to read from, placed at bits 0-6 (without direction bit).
+ * \param [in] mot - Whether (1) or not (0) to set MoT (Middle-of-Transaction) flag during the last I2C-over-AUX transaction handling this operation.
+ * \param [out] resp - pointer to store response
+ * \return status
+ *
+ */
+CDN_API_STATUS CDN_API_DPTX_I2C_Read(state_struct *state, u32 numOfBytes,
+ u8 addr, u8 mot, DPTX_I2C_Read_response *resp);
+/**
+ * blocking version of #CDN_API_DPTX_I2C_Read
+ */
+CDN_API_STATUS CDN_API_DPTX_I2C_Read_blocking(state_struct *state, u32 numOfBytes,
+ u8 addr, u8 mot, DPTX_I2C_Read_response *resp);
+
+/**
+ * reply data struct for #CDN_API_DPTX_I2C_Write
+ */
+typedef struct
+{
+ int addr;
+ int size;
+} DPTX_I2C_Write_response;
+/**
+ * \brief Cadence API for DP TX to write bytes using I2C-over-AUX
+ *
+ * \param [in] numOfBytes - number of bytes to write
+ * \param [in] addr - I2C slave address to write to, placed at bits 0-6 (without direction bit).
+ * \param [in] mot - Whether (1) or not (0) to set MoT (Middle-of-Transaction) flag during the last I2C-over-AUX transaction handling this operation.
+ * \param [in] buff - buffer with the data to write
+ * \param [out] resp - pointer to store response
+ * \return status
+ *
+ */
+CDN_API_STATUS CDN_API_DPTX_I2C_Write(state_struct *state, u32 numOfBytes,
+ u8 addr, u8 mot, u8 *buff, DPTX_I2C_Write_response *resp);
+/**
+ * blocking version of #CDN_API_DPTX_I2C_Write
+ */
+CDN_API_STATUS CDN_API_DPTX_I2C_Write_blocking(state_struct *state, u32 numOfBytes,
+ u8 addr, u8 mot, u8 *buff, DPTX_I2C_Write_response *resp);
+
/**
* reply data struct for CDN_API_DPTX_READ_EDID
* please note, buff will point to internal api buffer, user must copy it for later use
CDN_API_STATUS CDN_API_DPTX_GetLastAuxStatus_blocking(state_struct *state,
u8 *resp);
+/**
+ * \brief Get status of latest I2C-over-AUX transaction.
+ *
+ * \param [out] resp - pointer to store response. 0 - I2C_ACK, 1 - I2C_NACK, 2 - I2C_DEFER.
+ */
+CDN_API_STATUS CDN_API_DPTX_GetLastI2cStatus(state_struct *state, u8 *resp);
+/**
+ * \brief blocking version of #CDN_API_DPTX_GetLastI2cStatus
+ */
+CDN_API_STATUS CDN_API_DPTX_GetLastI2cStatus_blocking(state_struct *state, u8 *resp);
+
/**
* \brief get current hpd status
*/
/******************************************************************************
*
- * Copyright (C) 2016-2017 Cadence Design Systems, Inc.
+ * Copyright (C) 2016-2018 Cadence Design Systems, Inc.
* All rights reserved worldwide.
*
* Redistribution and use in source and binary forms, with or without modification,
#ifndef GENERAL_HANDLER_H
#define GENERAL_HANDLER_H
-/**
- * \file
- * \brief general handler, checks available messages, receives it from mailbox, handles requests and sends response to the host
- */
-#define DP_TX_MAIL_HANDLER_REQUEST_BUFFER_LEN 256
-
/**
* \brief opcode defines host->controller
*/
/******************************************************************************
*
- * Copyright (C) 2016-2017 Cadence Design Systems, Inc.
+ * Copyright (C) 2016-2018 Cadence Design Systems, Inc.
* All rights reserved worldwide.
*
* Redistribution and use in source and binary forms, with or without modification,
#define OPCODES_H_
#define DP_TX_MAIL_HANDLER_H
-#define DP_TX_MAIL_HANDLER_REQUEST_BUFFER_LEN 256
+#define DP_TX_MAIL_HANDLER_REQUEST_BUFFER_LEN 1024
#define DPTX_SET_POWER_MNG 0x00
#define DPTX_SET_HOST_CAPABILITIES 0x01
#define DPTX_GET_EDID 0x02
#define DPTX_WRITE_FIELD 0x08
#define DPTX_TRAINING_CONTROL 0x09
#define DPTX_READ_EVENT 0x0A
-#define DPTX_READ_LINK_STAT 0x0B
-#define DPTX_SET_VIDEO 0x0C
-#define DPTX_SET_AUDIO 0x0D
-#define DPTX_GET_LAST_AUX_STAUS 0x0E
-#define DPTX_SET_LINK_BREAK_POINT 0x0F
+#define DPTX_READ_LINK_STAT 0x0B
+#define DPTX_SET_VIDEO 0x0C
+#define DPTX_SET_AUDIO 0x0D
+#define DPTX_GET_LAST_AUX_STAUS 0x0E
+#define DPTX_SET_LINK_BREAK_POINT 0x0F
#define DPTX_FORCE_LANES 0x10
-#define DPTX_HPD_STATE 0x11
+#define DPTX_HPD_STATE 0x11
#define DPTX_EDP_RATE_TRAINING 0x12
#define DPTX_SET_PHY_COEFFICIENTS 0x13
+#define DPTX_I2C_READ 0x15
+#define DPTX_I2C_WRITE 0x16
+#define DPTX_GET_LAST_I2C_STATUS 0x17
#define DPTX_DBG_SET 0xF0
-#define DP_TX_OPCODE_READ_I2C_REQUEST 0xA5
-#define DP_TX_OPCODE_WRITE_I2C_REQUEST 0xA6
-#define DP_TX_OPCODE_MESSAGE_FILTER 0xA7
#define DPTX_EDID_RESP 0x02
#define DPTX_DPCD_READ_RESP 0x03
#define DPTX_DPCD_WRITE_RESP 0x04
#define DPTX_READ_EVENT_RESP 0x0A
#define DPTX_READ_REGISTER_RESP 0x07
-#define DP_TX_OPCODE_MESSAGE 0x10
-#define DP_TX_OPCODE_READ_I2C_RESPONSE 0x50
-#define DP_TX_OPCODE_WRITE_I2C_RESPONSE 0x60
+#define DPTX_MESSAGE 0x10
+#define DPTX_I2C_READ_RESP 0x15
+#define DPTX_I2C_WRITE_RESP 0x16
#define DP_TX_OPCODE_LOOPBACK_TEST 0xFE
#define DP_TX_OPCODE_BIT_TEST 0xFF
#define DP_TX_EVENT_ENABLE_HPD_BIT 0x00
projects / linux.git / commitdiff