LF-3753 arm64: dts: imx8mp-ddr4-evk: change hsio to be 400M
authorLi Jun <jun.li@nxp.com>
Mon, 19 Apr 2021 06:58:44 +0000 (14:58 +0800)
committerLi Jun <jun.li@nxp.com>
Tue, 27 Apr 2021 05:45:49 +0000 (13:45 +0800)
Change hsio clock to be 400M(Nominal mode) for ddr4 board.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
arch/arm64/boot/dts/freescale/imx8mp-ddr4-evk.dts

index 25988f0..f3eab70 100644 (file)
        assigned-clock-rates = <800000000>, <800000000>, <300000000>;
 };
 
+&pcie{
+       assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
+                         <&clk IMX8MP_CLK_PCIE_AUX>;
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
+                                <&clk IMX8MP_SYS_PLL2_50M>;
+       assigned-clock-rates = <400000000>, <10000000>;
+};
+
+&pcie_ep{
+       assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
+                         <&clk IMX8MP_CLK_PCIE_AUX>;
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
+                                <&clk IMX8MP_SYS_PLL2_50M>;
+       assigned-clock-rates = <400000000>, <10000000>;
+};
+
+&usb_dwc3_0 {
+       assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
+       assigned-clock-rates = <400000000>;
+};
+
+&usb_dwc3_1 {
+       assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
+       assigned-clock-rates = <400000000>;
+};
+
 &usdhc3 {
        status = "disabled";
 };