MLK-13711-01 ARM: dts: imx7ulp-evk: add lpuart sleep pinctrl

Add lpuart sleep pinctrl.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts b/arch/arm/boot/dts/imx7ulp-evk.dts
index ee7488d..85a9f75 100644 (file)
--- a/arch/arm/boot/dts/imx7ulp-evk.dts
+++ b/arch/arm/boot/dts/imx7ulp-evk.dts
@@ -191,27 +191,27 @@
 
                pinctrl_lpuart4: lpuart4grp {
                        fsl,pins = <
-                               ULP1_PAD_PTC3__LPUART4_RX       0x400
-                               ULP1_PAD_PTC2__LPUART4_TX       0x400
+                               ULP1_PAD_PTC3__LPUART4_RX       0x403
+                               ULP1_PAD_PTC2__LPUART4_TX       0x403
                        >;
                };
 
                pinctrl_lpuart6: lpuart6grp {
                        fsl,pins = <
-                               ULP1_PAD_PTE10__LPUART6_TX      0x400
-                               ULP1_PAD_PTE11__LPUART6_RX      0x400
-                               ULP1_PAD_PTE9__LPUART6_RTS_B    0x400
-                               ULP1_PAD_PTE8__LPUART6_CTS_B    0x400
-                               ULP1_PAD_PTE7__PTE7             0x00 /* BT_REG_ON */
+                               ULP1_PAD_PTE10__LPUART6_TX      0x403
+                               ULP1_PAD_PTE11__LPUART6_RX      0x403
+                               ULP1_PAD_PTE9__LPUART6_RTS_B    0x403
+                               ULP1_PAD_PTE8__LPUART6_CTS_B    0x403
+                               ULP1_PAD_PTE7__PTE7             0x20000 /* BT_REG_ON */
                        >;
                };
 
                pinctrl_lpuart7: lpuart7grp {
                        fsl,pins = <
-                               ULP1_PAD_PTF14__LPUART7_TX      0x400
-                               ULP1_PAD_PTF15__LPUART7_RX      0x400
-                               ULP1_PAD_PTF13__LPUART7_RTS_B   0x400
-                               ULP1_PAD_PTF12__LPUART7_CTS_B   0x400
+                               ULP1_PAD_PTF14__LPUART7_TX      0x403
+                               ULP1_PAD_PTF15__LPUART7_RX      0x403
+                               ULP1_PAD_PTF13__LPUART7_RTS_B   0x403
+                               ULP1_PAD_PTF12__LPUART7_CTS_B   0x403
                        >;
                };
 
@@ -293,7 +293,7 @@
 
                pinctrl_wifi: wifigrp {
                        fsl,pins = <
-                               ULP1_PAD_PTE6__PTE6             0x43 /* WL_REG_ON */
+                               ULP1_PAD_PTE6__PTE6             0x20043 /* WL_REG_ON */
                        >;
                };
        };
@@ -383,20 +383,23 @@
 };
 
 &lpuart4 { /* console */
-       pinctrl-names = "default";
+       pinctrl-names = "default", "sleep";
        pinctrl-0 = <&pinctrl_lpuart4>;
+       pinctrl-1 = <&pinctrl_lpuart4>;
        status = "okay";
 };
 
 &lpuart6 { /* BT */
-       pinctrl-names = "default";
+       pinctrl-names = "default", "sleep";
        pinctrl-0 = <&pinctrl_lpuart6>;
+       pinctrl-1 = <&pinctrl_lpuart6>;
        status = "okay";
 };
 
 &lpuart7 { /* Uart test */
-       pinctrl-names = "default";
+       pinctrl-names = "default", "sleep";
        pinctrl-0 = <&pinctrl_lpuart7>;
+       pinctrl-1 = <&pinctrl_lpuart7>;
        status = "disabled";
 };