dsim_write(dsim, mdresol, DSIM_MDRESOL);
}
-static int sec_mipi_dsim_check_pll_out(struct sec_mipi_dsim *dsim,
- const struct drm_display_mode *mode)
+int sec_mipi_dsim_check_pll_out(void *driver_private,
+ const struct drm_display_mode *mode)
{
int bpp;
uint64_t pix_clk, bit_clk, ref_clk;
+ struct sec_mipi_dsim *dsim = driver_private;
const struct sec_mipi_dsim_plat_data *pdata = dsim->pdata;
bpp = mipi_dsi_pixel_format_to_bpp(dsim->format);
return 0;
}
+EXPORT_SYMBOL(sec_mipi_dsim_check_pll_out);
static void sec_mipi_dsim_bridge_enable(struct drm_bridge *bridge)
{
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
- int ret, private_flags;
+ int private_flags;
struct sec_mipi_dsim *dsim = bridge->driver_private;
- ret = sec_mipi_dsim_check_pll_out(dsim, mode);
- if (ret)
- return false;
-
/* Since mipi dsi cannot do color conversion,
* so the pixel format output by mipi dsi should
* be the same with the pixel format recieved by
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
- int i;
+ int i, ret;
u32 bus_format;
unsigned int num_bus_formats;
struct imx_sec_dsim_device *dsim_dev = enc_to_dsim(encoder);
+ struct drm_bridge *bridge = encoder->bridge;
struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
struct drm_display_info *display_info = &conn_state->connector->display_info;
return -EINVAL;
}
+ /* check pll out */
+ ret = sec_mipi_dsim_check_pll_out(bridge->driver_private,
+ adjusted_mode);
+ if (ret)
+ return ret;
+
/* sec dsim can only accept active hight DE */
imx_crtc_state->bus_flags |= DRM_BUS_FLAG_DE_HIGH;
struct drm_display_mode *mode);
};
+int sec_mipi_dsim_check_pll_out(void *driver_private,
+ const struct drm_display_mode *mode);
int sec_mipi_dsim_bind(struct device *dev, struct device *master, void *data,
struct drm_encoder *encoder, struct resource *res,
int irq, const struct sec_mipi_dsim_plat_data *pdata);