arm64: dts: meson: fix PHY deassert timing requirements
authorStefan Agner <stefan@agner.ch>
Mon, 7 Dec 2020 17:58:00 +0000 (18:58 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 30 Dec 2020 10:53:41 +0000 (11:53 +0100)
[ Upstream commit c183c406c4321002fe85b345b51bc1a3a04b6d33 ]

According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. This fixes an issue seen on ODROID-C2 where the Ethernet
link doesn't come up when using ip link set down/up:
  [ 6630.714855] meson8b-dwmac c9410000.ethernet eth0: Link is Down
  [ 6630.785775] meson8b-dwmac c9410000.ethernet eth0: PHY [stmmac-0:00] driver [RTL8211F Gigabit Ethernet] (irq=36)
  [ 6630.893071] meson8b-dwmac c9410000.ethernet: Failed to reset the dma
  [ 6630.893800] meson8b-dwmac c9410000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed
  [ 6630.902835] meson8b-dwmac c9410000.ethernet eth0: stmmac_open: Hw setup failed

Fixes: f29cabf240ed ("arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings")
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/4a322c198b86e4c8b3dda015560a683babea4d63.1607363522.git.stefan@agner.ch
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts

index 7be3e35..de27bea 100644 (file)
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
index 70fcfb7..50de1d0 100644 (file)
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
index 222ee80..9b0b81f 100644 (file)
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
index ad81285..a350fee 100644 (file)
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
index b08c453..b2ab05c 100644 (file)
@@ -82,7 +82,7 @@
 
                /* External PHY reset is shared with internal PHY Led signal */
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                interrupt-parent = <&gpio_intc>;
index e2bd9c7..62d3e04 100644 (file)
                reg = <0>;
 
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                interrupt-parent = <&gpio_intc>;
index 83eca3a..dfa7a37 100644 (file)
                max-speed = <1000>;
 
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
        };
 };
index ea45ae0..8edbfe0 100644 (file)
@@ -64,7 +64,7 @@
 
                /* External PHY reset is shared with internal PHY Led signal */
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                interrupt-parent = <&gpio_intc>;
index c89c9f8..dde7cfe 100644 (file)
                max-speed = <1000>;
 
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
        };
 };