Card Presence Detect Status Bit SPDP in EMV_SIM_PCSR is
synchronized by two posedge of low_ref_clk which is 32KHz.
So there should be 1.5 low_ref_clk cycles(about 90us) before
reading SPDP Bit.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
clk_div = (clk_rate + emvsim->clk_rate - 1) / emvsim->clk_rate;
__raw_writel(clk_div, emvsim->ioaddr + EMV_SIM_CLKCFG);
+ usleep_range(90, 100);
/* SPDP=0: SIM Presence Detect pin is low, default PRESENT status */
if (__raw_readl(emvsim->ioaddr + EMV_SIM_PCSR) & SPDP) {
emvsim->present = SIM_PRESENT_REMOVED;