ARM: dts: at91: sama5d2: add TCB GCLK

The sama5d2 tcbs take an extra input clock, their gclk.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200710230813.1005150-4-alexandre.belloni@bootlin.com

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index ab550d6..996143e 100644 (file)
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -499,23 +499,23 @@
                        };
 
                        tcb0: timer@f800c000 {
-                               compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+                               compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0xf800c000 0x100>;
                                interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
-                               clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&clk32k>;
-                               clock-names = "t0_clk", "slow_clk";
+                               clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>, <&clk32k>;
+                               clock-names = "t0_clk", "gclk", "slow_clk";
                        };
 
                        tcb1: timer@f8010000 {
-                               compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+                               compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0xf8010000 0x100>;
                                interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
-                               clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&clk32k>;
-                               clock-names = "t0_clk", "slow_clk";
+                               clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_GCK 36>, <&clk32k>;
+                               clock-names = "t0_clk", "gclk", "slow_clk";
                        };
 
                        hsmc: hsmc@f8014000 {