*/
/* #define DUAL_ETH */
/* #define BIG_LCD */
+/* #define MMC_SPI */
/dts-v1/;
#define DUAL_ETH
#include <dt-bindings/input/input.h>
#include "imx6ull.dtsi"
+#include <dt-bindings/leds/common.h>
/ {
model = "Freescale i.MX6 ULL µSMARC SOMDEVICES Board";
startup-delay-us = <70000>;
};
};
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_led>;
+
+ led0 {
+ label = "Heartbeat";
+ gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
};
&cpu0 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
status = "okay";
-
+#ifndef MMC_SPI
spidev0: spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <60000000>;
};
+#else
+ mmc-slot@3{
+ compatible = "mmc-spi-slot";
+ spi-max-frequency = <50000000>;
+ voltage-ranges = <3300 3300>;
+ reg = <0>;
+ };
+#endif
};
&iomuxc {
pinctrl_hog_1: hoggrp-1 {
fsl,pins = <
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
- MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */
MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */
+
+ /* SOMDEVICES GPIOs */
+ MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x1b0b0 //GPIO00
+ MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0x1b0b0 //GPIO01
+ //MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x1b0b0 //GPIO02
+ MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x1b0b0 //GPIO03
+ MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x1b0b0 //GPIO04
+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1b0b0 //GPIO05
+ MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0 //GPIO06
+ MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0 //GPIO07
+ MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0 //GPIO08
+ MX6UL_PAD_NAND_CLE__GPIO4_IO15 0x1b0b0 //GPIO09
+ MX6UL_PAD_NAND_WP_B__GPIO4_IO11 0x1b0b0 //GPIO10
+ MX6UL_PAD_NAND_READY_B__GPIO4_IO12 0x1b0b0 //GPIO11
>;
};
pinctrl_enet1: enet1grp {
fsl,pins = <
- MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x0b0b0//0x70a1
+ MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x0b0b0//0x70a1
MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
pinctrl_enet2: enet2grp {
fsl,pins = <
- MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x0b0b0//0x70a1
+ MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x0b0b0//0x70a1
MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
pinctrl_pwm3: pwm3grp {
fsl,pins = <
- MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x110b0
+ //MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x110b0
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
- MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
+ //MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
>;
};
>;
};
- pinctrl_lcdif_reset: lcdifresetgrp {
- fsl,pins = <
- /* used for lcd reset */
- MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
- >;
- };
-
pinctrl_wifi_en: pinctrlwifi {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x10071
MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10071
>;
};
+
+ pinctrl_led: ledgrp {
+ fsl,pins = <
+ MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
+ >;
+ };
};
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
- &pinctrl_lcdif_ctrl
- &pinctrl_lcdif_reset>;
+ &pinctrl_lcdif_ctrl>;
display = <&display0>;
status = "okay";