MLK-12189 imx: mx7d correct iomux error for SAI3 and ENET2_EN

pinmux settings using GPIO1_IO0[0-7] should use iomuxc_lpsr,
but not iomuxc. If use iomuxc, you will set wrong register
and may impact other functions.

Without this patch, SAI3_MCLK use GPIO1_IO03 pinmux and impacts
QSPI function.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 631f6b7..d9dcc2b 100644 (file)
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -641,7 +641,7 @@
 
 &sai3 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_sai3>;
+       pinctrl-0 = <&pinctrl_sai3 &pinctrl_sai3_mclk>;
        assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>,
                          <&clks IMX7D_SAI3_ROOT_CLK>;
        assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
@@ -688,6 +688,17 @@
                        >;
                };
 
+               pinctrl_enet2_epdc0_en: enet2_epdc0_grp {
+                       fsl,pins = <
+                               MX7D_PAD_GPIO1_IO04__GPIO1_IO4          0x80000000
+                       >;
+               };
+
+               pinctrl_sai3_mclk: sai3grp_mclk {
+                      fsl,pins = <
+                              MX7D_PAD_GPIO1_IO03__SAI3_MCLK         0x1f
+                      >;
+              };
        };
 };
 
@@ -867,12 +878,6 @@
                        >;
                };
 
-               pinctrl_enet2_epdc0_en: enet2_epdc0_grp {
-                       fsl,pins = <
-                               MX7D_PAD_GPIO1_IO04__GPIO1_IO4          0x80000000
-                       >;
-               };
-
                pinctrl_epdc0: epdcgrp0 {
                         fsl,pins = <
                                MX7D_PAD_EPDC_DATA00__EPDC_DATA0  0x2
@@ -1026,7 +1031,6 @@
 
                pinctrl_sai3: sai3grp {
                        fsl,pins = <
-                               MX7D_PAD_GPIO1_IO03__SAI3_MCLK         0x1f
                                MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK   0x1f
                                MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC     0x1f
                                MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0    0x30