MLK-16818-1 ARM64: dts: imx8: modify the dts to enable ep rc support

- Correct the comments of iMX8QM PCIEB
- Enlarge the CFG space of iMX8QXP PCIEB.
- PCIE port maybe hard-wired in the hardware design.
Use the hard-wired property to specify it on iMX8MQ.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>

diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index 811ee9d..5384a28 100644 (file)
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -14,6 +14,7 @@ Required properties:
 - clock-names: Must include the following additional entries:
        - "pcie_phy"
 - ext_osc: use the external oscillator or not.
+- hard-wired: the port is hard wired in hw design or not.
 
 Optional properties:
 - fsl,tx-deemph-gen1: Gen1 De-emphasis value. Default: 0

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-fbdev.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-fbdev.dts
index 0c85ff6..5ecaba0 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-fbdev.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-fbdev.dts
@@ -490,6 +490,8 @@
        clkreq-gpio = <&gpio5 20 GPIO_ACTIVE_LOW>;
        disable-gpio = <&gpio5 29 GPIO_ACTIVE_LOW>;
        reset-gpio = <&gpio5 28 GPIO_ACTIVE_LOW>;
+       ext_osc = <1>;
+       hard-wired = <1>;
        status = "okay";
 };
 
@@ -499,6 +501,7 @@
        clkreq-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>;
        disable-gpio = <&gpio5 10 GPIO_ACTIVE_LOW>;
        reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;
+       ext_osc = <1>;
        status = "okay";
 };
 

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
index c593825..c7e02a7 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
@@ -3061,7 +3061,7 @@
                fsl,max-link-speed = <3>;
                hsio-cfg = <PCIEAX1PCIEBX1SATA>;
                hsio = <&hsio>;
-               ctrl-id = <1>; /* pciea */
+               ctrl-id = <1>; /* pcieb */
                cpu-base-addr = <0x80000000>;
                status = "disabled";
        };

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
index 1728ea2..969049c 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
@@ -2298,7 +2298,7 @@
                 */
                compatible = "fsl,imx8qxp-pcie","snps,dw-pcie";
                reg = <0x0 0x5f010000 0x0 0x10000>, /* Controller reg*/
-                     <0x0 0x7ff00000 0x0 0x10000>; /* PCI cfg space */
+                     <0x0 0x7ff00000 0x0 0x80000>; /* PCI cfg space */
                reg-names = "dbi", "config";
                #address-cells = <3>;
                #size-cells = <2>;