arm64: dts: imx8qxp: Add MEK/VAL board with A0 chip support
authorAnson Huang <Anson.Huang@nxp.com>
Wed, 6 Nov 2019 01:43:14 +0000 (09:43 +0800)
committerDong Aisheng <aisheng.dong@nxp.com>
Mon, 14 Dec 2020 03:20:35 +0000 (11:20 +0800)
Add i.MX8QXP MEK/VAL board with A0 chip support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-a0.dts [new file with mode: 0644]
arch/arm64/boot/dts/freescale/imx8qxp-mek-a0.dts [new file with mode: 0644]

index 2ffa874..8f9068e 100644 (file)
@@ -62,7 +62,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8dxl-phantom-mek.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb imx8qxp-mek-dsp.dtb imx8qxp-mek-ov5640.dtb \
                          imx8qxp-mek-enet2.dtb imx8qxp-mek-enet2-tja1100.dtb imx8qxp-mek-sof.dtb \
-                         imx8qxp-mek-rpmsg.dtb \
+                         imx8qxp-mek-rpmsg.dtb imx8qxp-mek-a0.dtb imx8qxp-lpddr4-val-a0.dtb \
                          imx8qxp-lpddr4-val.dtb imx8qxp-lpddr4-val-mqs.dtb \
                          imx8qxp-lpddr4-val-spdif.dtb
 
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-a0.dts b/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-a0.dts
new file mode 100644 (file)
index 0000000..74695fd
--- /dev/null
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8qxp-lpddr4-val.dts"
+
+&vpu_encoder {
+       status = "disabled";
+};
+
+&vpu_decoder {
+       status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek-a0.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek-a0.dts
new file mode 100644 (file)
index 0000000..16b0261
--- /dev/null
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8qxp-mek.dts"
+
+&vpu_encoder {
+       status = "disabled";
+};
+
+&vpu_decoder {
+       status = "disabled";
+};