According to datasheet Rev.B,06/2016 of i.MX6SLL. It has below
setpoints support:
996MHz 1.2V
792MHz 1.15V
396MHz 1.05V
198MHz 0.95V
We add a 25mV margin to cover the IR drop and board tolerance.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
next-level-cache = <&L2>;
operating-points = <
/* kHz uV */
- 996000 1275000
+ 996000 1225000
792000 1175000
- 396000 975000
+ 396000 1075000
+ 198000 975000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */
996000 1225000
792000 1175000
396000 1175000
+ 198000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clks IMX6SLL_CLK_ARM>,