drm/amd/display: DPP CM ICSC AYCRCB8888 format support

[why]
Diags has POR to run the video workload using AYCRCB8888 through DCN;
capture it through DWB and send it to VCN hardware to encode

[how]
added the code to support this format so that DPP ICSC will be able to
convert it from YUV444 to internal RGB and DWB OCSC will be able to
convert from internal RGB to YUV420

Signed-off-by: vikrant mhaske <vikrant.mhaske@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index 9cfd7ea..1d1f2d5 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
@@ -192,7 +192,7 @@ enum surface_pixel_format {
        /*swaped & float*/
        SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F,
        /*grow graphics here if necessary */
-
+       SURFACE_PIXEL_FORMAT_VIDEO_AYCrCb8888,
        SURFACE_PIXEL_FORMAT_VIDEO_BEGIN,
        SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr =
                SURFACE_PIXEL_FORMAT_VIDEO_BEGIN,

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
index 332354c..2138cd3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
@@ -294,6 +294,10 @@ void hubp1_program_pixel_format(
                REG_UPDATE(DCSURF_SURFACE_CONFIG,
                                SURFACE_PIXEL_FORMAT, 66);
                break;
+       case SURFACE_PIXEL_FORMAT_VIDEO_AYCrCb8888:
+               REG_UPDATE(DCSURF_SURFACE_CONFIG,
+                               SURFACE_PIXEL_FORMAT, 12);
+               break;
        default:
                BREAK_TO_DEBUGGER();
                break;