MLK-22412-1 Revert "MLK-22337 dts: clk: remove non-exist lvds1 recources for imx8qm"
authorClark Wang <xiaoning.wang@nxp.com>
Thu, 8 Aug 2019 08:56:21 +0000 (16:56 +0800)
committerClark Wang <xiaoning.wang@nxp.com>
Thu, 8 Aug 2019 10:30:15 +0000 (18:30 +0800)
This reverts commit 9811210cb25a98b65be4e3ef35ccaf9c05e0ca83.

No need to remove PD_LVDS1_I2C0 and SC_R_LVDS_1_I2C_0.

Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dom0.dts
arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts
arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu-car.dts

index 9b71c86..f4d9852 100644 (file)
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               pd_lvds1_i2c0: PD_LVDS1_I2C0 {
+                                       reg = <SC_R_LVDS_1_I2C_0>;
+                                       #power-domain-cells = <0>;
+                                       power-domains =<&pd_lvds1>;
+                               };
 
                                pd_lvds1_pwm: PD_LVDS1_PWM {
                                        reg = <SC_R_LVDS_1_PWM_0>;
                clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX8QM_LVDS1_I2C0_CLK>;
                assigned-clock-rates = <24000000>;
-               power-domains = <&pd_lvds1>;
+               power-domains = <&pd_lvds1_i2c0>;
                status = "disabled";
        };
 
index 7c3e5ea..cb009a4 100644 (file)
@@ -62,6 +62,7 @@
                                SC_R_GPU_1_PID2
                                SC_R_GPU_1_PID3
                                SC_R_LVDS_1
+                               SC_R_LVDS_1_I2C_0
                                SC_R_LVDS_1_PWM_0
                                SC_R_DC_1
                                SC_R_DC_1_BLIT0
index c20b47c..38e92b9 100644 (file)
@@ -76,6 +76,7 @@
                                SC_R_CSI_0_PWM_0
                                SC_R_CSI_0_I2C_0
                                SC_R_LVDS_1
+                               SC_R_LVDS_1_I2C_0
                                SC_R_LVDS_1_PWM_0
                                SC_R_DC_1
                                SC_R_DC_1_BLIT0
@@ -97,6 +98,7 @@
                                SC_R_GPU_1_PID2
                                SC_R_GPU_1_PID3
                                SC_R_LVDS_1
+                               SC_R_LVDS_1_I2C_0
                                SC_R_LVDS_1_PWM_0
                                SC_R_DC_1
                                SC_R_DC_1_BLIT0
index 2da87d7..d8ff2c0 100644 (file)
                clock-names = "per", "ipg";
                assigned-clocks = <&clk_post IMX8QM_LVDS1_I2C0_CLK>;
                assigned-clock-rates = <24000000>;
-               power-domains = <&pd_lvds1>;
+               power-domains = <&pd_lvds1_i2c0>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_lvds1_lpi2c1>;
                clock-frequency = <400000>;