On imx8mm and imx8mn pll1_800m is not a parents of qspi, that mux
position connects to pll2_333m instead.
Set the assigned-clock-parent to pll1_400m instead so that we can get
80m as expected.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
clock-names = "fspi";
assigned-clock-rates = <80000000>;
assigned-clocks = <&clk IMX8MM_CLK_QSPI>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_400M>;
status = "disabled";
};
clock-names = "fspi";
assigned-clock-rates = <80000000>;
assigned-clocks = <&clk IMX8MN_CLK_QSPI>;
- assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_800M>;
+ assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_400M>;
status = "disabled";
};