MLK-14784: ASoC: fsl_esai: fix esai register setting issue in RIGHT_J mode

The ESAI_xCR_xWA is xCR's bit, not the xCCR's bit. driver set it to
wrong register, correct it in this patch.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>

diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
index 2ce29ec..9a29997 100644 (file)
--- a/sound/soc/fsl/fsl_esai.c
+++ b/sound/soc/fsl/fsl_esai.c
@@ -401,7 +401,8 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
                break;
        case SND_SOC_DAIFMT_RIGHT_J:
                /* Data on rising edge of bclk, frame high, right aligned */
-               xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCR_xWA;
+               xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP;
+               xcr  |= ESAI_xCR_xWA;
                break;
        case SND_SOC_DAIFMT_DSP_A:
                /* Data on rising edge of bclk, frame high, 1clk before data */
@@ -458,12 +459,12 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
                return -EINVAL;
        }
 
-       mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR;
+       mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR | ESAI_xCR_xWA;
        regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr);
        regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr);
 
        mask = ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCCR_xFSP |
-               ESAI_xCCR_xFSD | ESAI_xCCR_xCKD | ESAI_xCR_xWA;
+               ESAI_xCCR_xFSD | ESAI_xCCR_xCKD;
        regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, mask, xccr);
        regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, mask, xccr);