MLK-11262-5: ARM: imx: Change A7 MU ready timing

 Change when A7 signal M4 to make sure busfreq is
 always up when the M4 send high bus release.
 This prevents race condition for Low Power Demo

Signed-off-by: Teo Hall <teo.hall@nxp.com>

diff --git a/arch/arm/mach-imx/busfreq-imx.c b/arch/arm/mach-imx/busfreq-imx.c
index 5822806..737eb60 100644 (file)
--- a/arch/arm/mach-imx/busfreq-imx.c
+++ b/arch/arm/mach-imx/busfreq-imx.c
@@ -902,12 +902,16 @@ static int bus_freq_pm_notify(struct notifier_block *nb, unsigned long event,
        mutex_lock(&bus_freq_mutex);
 
        if (event == PM_SUSPEND_PREPARE) {
+               if (cpu_is_imx7d() && imx_src_is_m4_enabled())
+                       imx_mu_lpm_ready(false);
                high_bus_count++;
                set_high_bus_freq(1);
                busfreq_suspended = 1;
        } else if (event == PM_POST_SUSPEND) {
                busfreq_suspended = 0;
                high_bus_count--;
+               if (cpu_is_imx7d() && imx_src_is_m4_enabled())
+                       imx_mu_lpm_ready(true);
                schedule_delayed_work(&bus_freq_daemon,
                        usecs_to_jiffies(5000000));
        }
@@ -1157,8 +1161,10 @@ static int busfreq_probe(struct platform_device *pdev)
                        high_bus_count++;
        }
 
-       if (cpu_is_imx7d() && imx_src_is_m4_enabled())
+       if (cpu_is_imx7d() && imx_src_is_m4_enabled()) {
                high_bus_count++;
+               imx_mu_lpm_ready(true);
+       }
 
        if (err) {
                dev_err(busfreq_dev, "Busfreq init of ddr controller failed\n");

diff --git a/arch/arm/mach-imx/mu.c b/arch/arm/mach-imx/mu.c
index ae502d9..2a482be 100644 (file)
--- a/arch/arm/mach-imx/mu.c
+++ b/arch/arm/mach-imx/mu.c
@@ -388,7 +388,6 @@ static int imx_mu_probe(struct platform_device *pdev)
                /* enable the bit26(RIE1) of MU_ACR */
                writel_relaxed(readl_relaxed(mu_base + MU_ACR) |
                        BIT(26) | BIT(27), mu_base + MU_ACR);
-               imx_mu_lpm_ready(true);
        } else {
                INIT_DELAYED_WORK(&mu_work, mu_work_handler);
 

diff --git a/arch/arm/mach-imx/pm-imx7.c b/arch/arm/mach-imx/pm-imx7.c
index 4ce9e69..8057cfb 100644 (file)
--- a/arch/arm/mach-imx/pm-imx7.c
+++ b/arch/arm/mach-imx/pm-imx7.c
@@ -772,7 +772,6 @@ static int imx7_pm_enter(suspend_state_t state)
                                /* restore M4 to run mode */
                                imx_mu_set_m4_run_mode();
                                /* gpc wakeup */
-                               imx_mu_lpm_ready(true);
                        }
                }
                /* clear LPSR resume address */