MLK-17438 arm64: dts: add emvsim0 device node in register address order

Add emvsim0 device node in register address order

Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
index ddcdeb1..af75e2c 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
@@ -1416,17 +1416,6 @@
                };
        };
 
-       emvsim0: sim0@5a0d0000 {
-               compatible = "fsl,imx8-emvsim";
-               reg = <0x0 0x5a0d0000 0x0 0x10000>;
-               interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&clk IMX8QM_EMVSIM0_CLK>,
-                        <&clk IMX8QM_EMVSIM0_IPG_CLK>;
-               clock-names = "sim", "ipg";
-               power-domains = <&pd_ldo1_sim>;
-               status = "disabled";
-       };
-
        hdmi:hdmi@56268000 {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -2612,6 +2601,17 @@
                status = "disabled";
        };
 
+       emvsim0: sim0@5a0d0000 {
+               compatible = "fsl,imx8-emvsim";
+               reg = <0x0 0x5a0d0000 0x0 0x10000>;
+               interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&clk IMX8QM_EMVSIM0_CLK>,
+                        <&clk IMX8QM_EMVSIM0_IPG_CLK>;
+               clock-names = "sim", "ipg";
+               power-domains = <&pd_ldo1_sim>;
+               status = "disabled";
+       };
+
        edma0: dma-controller@5a1f0000 {
                compatible = "fsl,imx8qm-edma";
                reg = <0x0 0x5a2c0000 0x0 0x10000>, /* channel12 UART0 rx */