MLK-16942-1: hdmi-cec: Update clock rate to 133MHz

After apply HDMI FW ROM patch to mscale B0.
The HDMI core clock will run at 133MHz.
Update hdmi cec clock rate.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit 4198c8f6677eff3e6e50ca17f3d1b7f6e6f8b8c3)

diff --git a/drivers/gpu/drm/imx/hdp/imx-cec.c b/drivers/gpu/drm/imx/hdp/imx-cec.c
index 95b1efa..9d8c159 100644 (file)
--- a/drivers/gpu/drm/imx/hdp/imx-cec.c
+++ b/drivers/gpu/drm/imx/hdp/imx-cec.c
@@ -285,11 +285,8 @@ static int imx_cec_probe(struct platform_device *pdev)
        if (IS_ERR(cec->reg_base))
                return PTR_ERR(cec->reg_base);
 
-       /* hdmi core clock is 125MHz in B0 */
-       if (imx8_get_soc_revision() == B0_SILICON_ID)
-               cec->clk_div = 1250;
-       else
-               cec->clk_div = 1330;
+       /* hdmi core clock is 133MHz */
+       cec->clk_div = 1330;
 
        cec->adap = cec_allocate_adapter(&imx_cec_adap_ops, cec,
                                         CEC_NAME,