MLK-17127 DTS: imx8qm_mek: Update fec pad settings
authorYe Li <ye.li@nxp.com>
Fri, 8 Dec 2017 06:30:37 +0000 (00:30 -0600)
committerYe Li <ye.li@nxp.com>
Fri, 8 Dec 2017 07:06:48 +0000 (01:06 -0600)
Sync the FEC1 and FEC2 pad settings with latest kernel DTS
(commit a67f777dfb805fa72ffe31911a18d8c0a9683f73)

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by Fugang Duan <fugang.duan@nxp.com>

arch/arm/dts/fsl-imx8qm-mek.dts

index 59fb260..ee437ee 100644 (file)
 
                pinctrl_fec1: fec1grp {
                        fsl,pins = <
-                               SC_P_ENET0_MDC_CONN_ENET0_MDC                   0x06000048
-                               SC_P_ENET0_MDIO_CONN_ENET0_MDIO                 0x06000048
-                               SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000048
-                               SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC       0x06000048
-                               SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0     0x06000048
-                               SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1     0x06000048
-                               SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2     0x06000048
-                               SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3     0x06000048
-                               SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC       0x06000048
-                               SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000048
-                               SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0     0x06000048
-                               SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1     0x06000048
-                               SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2     0x06000048
-                               SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3     0x06000048
+                               SC_P_ENET0_MDC_CONN_ENET0_MDC                   0x06000020
+                               SC_P_ENET0_MDIO_CONN_ENET0_MDIO                 0x06000020
+                               SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020
+                               SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC       0x06000020
+                               SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0     0x06000020
+                               SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1     0x06000020
+                               SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2     0x06000020
+                               SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3     0x06000020
+                               SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC       0x06000020
+                               SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020
+                               SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0     0x06000020
+                               SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1     0x06000020
+                               SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2     0x06000020
+                               SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3     0x06000020
                        >;
                };
 
                pinctrl_fec2: fec2grp {
                        fsl,pins = <
-                               SC_P_ENET1_RGMII_TX_CTL_CONN_ENET1_RGMII_TX_CTL 0x06000048
-                               SC_P_ENET1_RGMII_TXC_CONN_ENET1_RGMII_TXC       0x06000048
-                               SC_P_ENET1_RGMII_TXD0_CONN_ENET1_RGMII_TXD0     0x06000048
-                               SC_P_ENET1_RGMII_TXD1_CONN_ENET1_RGMII_TXD1     0x06000048
-                               SC_P_ENET1_RGMII_TXD2_CONN_ENET1_RGMII_TXD2     0x06000048
-                               SC_P_ENET1_RGMII_TXD3_CONN_ENET1_RGMII_TXD3     0x06000048
-                               SC_P_ENET1_RGMII_RXC_CONN_ENET1_RGMII_RXC       0x06000048
-                               SC_P_ENET1_RGMII_RX_CTL_CONN_ENET1_RGMII_RX_CTL 0x06000048
-                               SC_P_ENET1_RGMII_RXD0_CONN_ENET1_RGMII_RXD0     0x06000048
-                               SC_P_ENET1_RGMII_RXD1_CONN_ENET1_RGMII_RXD1     0x06000048
-                               SC_P_ENET1_RGMII_RXD2_CONN_ENET1_RGMII_RXD2     0x06000048
-                               SC_P_ENET1_RGMII_RXD3_CONN_ENET1_RGMII_RXD3     0x06000048
+                               SC_P_ENET1_RGMII_TX_CTL_CONN_ENET1_RGMII_TX_CTL 0x06000020
+                               SC_P_ENET1_RGMII_TXC_CONN_ENET1_RGMII_TXC       0x06000020
+                               SC_P_ENET1_RGMII_TXD0_CONN_ENET1_RGMII_TXD0     0x06000020
+                               SC_P_ENET1_RGMII_TXD1_CONN_ENET1_RGMII_TXD1     0x06000020
+                               SC_P_ENET1_RGMII_TXD2_CONN_ENET1_RGMII_TXD2     0x06000020
+                               SC_P_ENET1_RGMII_TXD3_CONN_ENET1_RGMII_TXD3     0x06000020
+                               SC_P_ENET1_RGMII_RXC_CONN_ENET1_RGMII_RXC       0x06000020
+                               SC_P_ENET1_RGMII_RX_CTL_CONN_ENET1_RGMII_RX_CTL 0x06000020
+                               SC_P_ENET1_RGMII_RXD0_CONN_ENET1_RGMII_RXD0     0x06000020
+                               SC_P_ENET1_RGMII_RXD1_CONN_ENET1_RGMII_RXD1     0x06000020
+                               SC_P_ENET1_RGMII_RXD2_CONN_ENET1_RGMII_RXD2     0x06000020
+                               SC_P_ENET1_RGMII_RXD3_CONN_ENET1_RGMII_RXD3     0x06000020
                        >;
                };