MLK-11407-2: ARM: dts: imx6qdl/sl: add ldo bypass support
authorRobin Gong <b38343@freescale.com>
Tue, 25 Aug 2015 05:56:28 +0000 (13:56 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 19:48:36 +0000 (14:48 -0500)
add ldo bypass support on i.mx6q/dl and i.mx6sl.

Signed-off-by: Robin Gong <b38343@freescale.com>
arch/arm/boot/dts/imx6dl.dtsi
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/imx6sl-evk.dts
arch/arm/boot/dts/imx6sl.dtsi

index 97ebc7a..fe7e39e 100644 (file)
@@ -21,7 +21,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        reg = <0>;
index 3eb5bff..f5bb101 100644 (file)
                                 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 };
 
+&cpu0 {
+       arm-supply = <&sw1a_reg>;
+       soc-supply = <&sw1c_reg>;
+};
+
 &ecspi1 {
        fsl,spi-num-chipselects = <1>;
        cs-gpios = <&gpio4 9 0>;
        status = "okay";
 };
 
+&gpc {
+       fsl,ldo-bypass = <1>;
+};
+
 &hdmi_audio {
        status = "okay";
 };
index 0189171..5155239 100644 (file)
                                        anatop-min-bit-val = <1>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
+                                       regulator-allow-bypass;
                                };
 
                                reg_pu: regulator-vddpu {
                                        anatop-min-bit-val = <1>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
+                                       regulator-allow-bypass;
                                };
 
                                reg_soc: regulator-vddsoc {
                                        anatop-min-bit-val = <1>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
+                                       regulator-allow-bypass;
                                };
                        };
 
index 86377a6..7fc48fb 100644 (file)
        status = "okay";
 };
 
+&cpu0 {
+       arm-supply = <&sw1a_reg>;
+       soc-supply = <&sw1c_reg>;
+};
+
 &ecspi1 {
        fsl,spi-num-chipselects = <1>;
        cs-gpios = <&gpio4 11 0>;
        status = "okay";
 };
 
+&gpc {
+        fsl,ldo-bypass = <1>;
+};
+
 &i2c1 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
index 0db0b56..12a6391 100644 (file)
@@ -37,7 +37,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        reg = <0x0>;
                                        anatop-min-bit-val = <1>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
+                                       regulator-allow-bypass;
                                };
 
                                reg_pu: regulator-vddpu {
                                        anatop-min-bit-val = <1>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
+                                       regulator-allow-bypass;
                                };
 
                                reg_soc: regulator-vddsoc {
                                        anatop-min-bit-val = <1>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
+                                       regulator-allow-bypass;
                                };
                        };