MLK-13022-2 arm: dts: new dts for eMMC support on i.MX6UL EVK reworked board

Enable eMMC for i.MX6UL EVK rework board due to the pad conflict with NAND
and Micro-SD.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 02ac0d3..7bd000b 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -591,6 +591,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
        imx6ul-ccimx6ulsbcexpress.dtb \
        imx6ul-14x14-evk-btwifi.dtb \
        imx6ul-14x14-evk-csi.dtb \
+       imx6ul-14x14-evk-emmc.dtb \
        imx6ul-14x14-evk-gpmi-weim.dtb \
        imx6ul-14x14-evk-usb-certi.dtb \
        imx6ul-geam.dtb \

diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk-emmc.dts b/arch/arm/boot/dts/imx6ul-14x14-evk-emmc.dts
new file mode 100644 (file)
index 0000000..b56d34d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk-emmc.dts
@@ -0,0 +1,20 @@
+
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "imx6ul-14x14-evk.dts"
+
+&usdhc2 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc2_8bit>;
+       pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dts b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
index 94c1825..bee7c04 100644 (file)
--- a/arch/arm/boot/dts/imx6ul-14x14-evk.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
@@ -403,10 +403,7 @@
 &usdhc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usdhc2>;
-       no-1-8-v;
        non-removable;
-       keep-power-in-suspend;
-       wakeup-source;
        status = "okay";
 };
 
@@ -679,6 +676,51 @@
                >;
        };
 
+       pinctrl_usdhc2_8bit: usdhc2grp_8bit {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
+                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
+                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
+                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
+                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
+                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
+               >;
+       };
+
+       pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100b9
+                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170b9
+                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
+                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
+                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
+                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
+                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
+                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
+                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
+                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
+               >;
+       };
+
+       pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100f9
+                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170f9
+                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
+                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
+                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
+                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
+                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
+                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
+                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
+                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
+               >;
+       };
+
        pinctrl_wdog: wdoggrp {
                fsl,pins = <
                        MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0