arm64: dts: juno/rtsm: re-structure motherboard includes

It is a bit unorthodox to just include a file in the middle of a another
DTS file, it breaks the pattern from other device trees and also makes
it really hard to reference things across the files with phandles.

Restructure the include for the Juno/RTSM motherboards to happen at the
top of the file, reference the target nodes directly, and indent the
motherboard .dtsi files to reflect their actual depth in the hierarchy.

This is a purely syntactic change that result in the same DTB files from
the DTS/DTSI files. This is based on similar patch from Linus Walleij
for ARM Vexpress platforms.

Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index b74e462..ce56a4a 100644 (file)
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 #include "juno-clocks.dtsi"
+#include "juno-motherboard.dtsi"
 
 / {
        /*
@@ -795,8 +796,6 @@
                                <0 0 10 &gic 0 0 0 167 IRQ_TYPE_LEVEL_HIGH>,
                                <0 0 11 &gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH>,
                                <0 0 12 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>;
-
-               /include/ "juno-motherboard.dtsi"
        };
 
        site2: tlx@60000000 {

diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index 70e3409..1792b07 100644 (file)
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -7,6 +7,8 @@
  *
  */
 
+/ {
+       smb@8000000 {
                mb_clk24mhz: clk24mhz {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
@@ -287,3 +289,5 @@
                                };
                        };
                };
+       };
+};

diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
index 06c8117..602f63f 100644 (file)
--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
@@ -12,6 +12,8 @@
 
 /memreserve/ 0x80000000 0x00010000;
 
+#include "rtsm_ve-motherboard.dtsi"
+
 / {
        model = "RTSM_VE_AEMv8A";
        compatible = "arm,rtsm_ve,aemv8a", "arm,vexpress";
@@ -162,7 +164,5 @@
                                <0 0 40 &gic 0 40 4>,
                                <0 0 41 &gic 0 41 4>,
                                <0 0 42 &gic 0 42 4>;
-
-               /include/ "rtsm_ve-motherboard.dtsi"
        };
 };

diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index 1134e5d..d2dbc3f 100644 (file)
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -7,270 +7,273 @@
  *
  * VEMotherBoard.lisa
  */
-
-       motherboard {
-               arm,v2m-memory-map = "rs1";
-               compatible = "arm,vexpress,v2m-p1", "simple-bus";
-               #address-cells = <2>; /* SMB chipselect number and offset */
-               #size-cells = <1>;
-               #interrupt-cells = <1>;
-               ranges;
-
-               flash@0,00000000 {
-                       compatible = "arm,vexpress-flash", "cfi-flash";
-                       reg = <0 0x00000000 0x04000000>,
-                             <4 0x00000000 0x04000000>;
-                       bank-width = <4>;
-               };
-
-               v2m_video_ram: vram@2,00000000 {
-                       compatible = "arm,vexpress-vram";
-                       reg = <2 0x00000000 0x00800000>;
-               };
-
-               ethernet@2,02000000 {
-                       compatible = "smsc,lan91c111";
-                       reg = <2 0x02000000 0x10000>;
-                       interrupts = <15>;
-               };
-
-               v2m_clk24mhz: clk24mhz {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0>;
-                       clock-frequency = <24000000>;
-                       clock-output-names = "v2m:clk24mhz";
-               };
-
-               v2m_refclk1mhz: refclk1mhz {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0>;
-                       clock-frequency = <1000000>;
-                       clock-output-names = "v2m:refclk1mhz";
-               };
-
-               v2m_refclk32khz: refclk32khz {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0>;
-                       clock-frequency = <32768>;
-                       clock-output-names = "v2m:refclk32khz";
-               };
-
-               iofpga@3,00000000 {
-                       compatible = "simple-bus";
-                       #address-cells = <1>;
+/ {
+       smb@8000000 {
+               motherboard {
+                       arm,v2m-memory-map = "rs1";
+                       compatible = "arm,vexpress,v2m-p1", "simple-bus";
+                       #address-cells = <2>; /* SMB chipselect number and offset */
                        #size-cells = <1>;
-                       ranges = <0 3 0 0x200000>;
-
-                       v2m_sysreg: sysreg@10000 {
-                               compatible = "arm,vexpress-sysreg";
-                               reg = <0x010000 0x1000>;
-                               gpio-controller;
-                               #gpio-cells = <2>;
+                       #interrupt-cells = <1>;
+                       ranges;
+
+                       flash@0,00000000 {
+                               compatible = "arm,vexpress-flash", "cfi-flash";
+                               reg = <0 0x00000000 0x04000000>,
+                                     <4 0x00000000 0x04000000>;
+                               bank-width = <4>;
                        };
 
-                       v2m_sysctl: sysctl@20000 {
-                               compatible = "arm,sp810", "arm,primecell";
-                               reg = <0x020000 0x1000>;
-                               clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
-                               clock-names = "refclk", "timclk", "apb_pclk";
-                               #clock-cells = <1>;
-                               clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
-                               assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
-                               assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
+                       v2m_video_ram: vram@2,00000000 {
+                               compatible = "arm,vexpress-vram";
+                               reg = <2 0x00000000 0x00800000>;
                        };
 
-                       aaci@40000 {
-                               compatible = "arm,pl041", "arm,primecell";
-                               reg = <0x040000 0x1000>;
-                               interrupts = <11>;
-                               clocks = <&v2m_clk24mhz>;
-                               clock-names = "apb_pclk";
+                       ethernet@2,02000000 {
+                               compatible = "smsc,lan91c111";
+                               reg = <2 0x02000000 0x10000>;
+                               interrupts = <15>;
                        };
 
-                       mmci@50000 {
-                               compatible = "arm,pl180", "arm,primecell";
-                               reg = <0x050000 0x1000>;
-                               interrupts = <9 10>;
-                               cd-gpios = <&v2m_sysreg 0 0>;
-                               wp-gpios = <&v2m_sysreg 1 0>;
-                               max-frequency = <12000000>;
-                               vmmc-supply = <&v2m_fixed_3v3>;
-                               clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-                               clock-names = "mclk", "apb_pclk";
+                       v2m_clk24mhz: clk24mhz {
+                               compatible = "fixed-clock";
+                               #clock-cells = <0>;
+                               clock-frequency = <24000000>;
+                               clock-output-names = "v2m:clk24mhz";
                        };
 
-                       kmi@60000 {
-                               compatible = "arm,pl050", "arm,primecell";
-                               reg = <0x060000 0x1000>;
-                               interrupts = <12>;
-                               clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-                               clock-names = "KMIREFCLK", "apb_pclk";
+                       v2m_refclk1mhz: refclk1mhz {
+                               compatible = "fixed-clock";
+                               #clock-cells = <0>;
+                               clock-frequency = <1000000>;
+                               clock-output-names = "v2m:refclk1mhz";
                        };
 
-                       kmi@70000 {
-                               compatible = "arm,pl050", "arm,primecell";
-                               reg = <0x070000 0x1000>;
-                               interrupts = <13>;
-                               clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-                               clock-names = "KMIREFCLK", "apb_pclk";
+                       v2m_refclk32khz: refclk32khz {
+                               compatible = "fixed-clock";
+                               #clock-cells = <0>;
+                               clock-frequency = <32768>;
+                               clock-output-names = "v2m:refclk32khz";
                        };
 
-                       v2m_serial0: uart@90000 {
-                               compatible = "arm,pl011", "arm,primecell";
-                               reg = <0x090000 0x1000>;
-                               interrupts = <5>;
-                               clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-                               clock-names = "uartclk", "apb_pclk";
-                       };
+                       iofpga@3,00000000 {
+                               compatible = "simple-bus";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0 3 0 0x200000>;
+
+                               v2m_sysreg: sysreg@10000 {
+                                       compatible = "arm,vexpress-sysreg";
+                                       reg = <0x010000 0x1000>;
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                               };
 
-                       v2m_serial1: uart@a0000 {
-                               compatible = "arm,pl011", "arm,primecell";
-                               reg = <0x0a0000 0x1000>;
-                               interrupts = <6>;
-                               clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-                               clock-names = "uartclk", "apb_pclk";
-                       };
+                               v2m_sysctl: sysctl@20000 {
+                                       compatible = "arm,sp810", "arm,primecell";
+                                       reg = <0x020000 0x1000>;
+                                       clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
+                                       clock-names = "refclk", "timclk", "apb_pclk";
+                                       #clock-cells = <1>;
+                                       clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
+                                       assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
+                                       assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
+                               };
 
-                       v2m_serial2: uart@b0000 {
-                               compatible = "arm,pl011", "arm,primecell";
-                               reg = <0x0b0000 0x1000>;
-                               interrupts = <7>;
-                               clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-                               clock-names = "uartclk", "apb_pclk";
-                       };
+                               aaci@40000 {
+                                       compatible = "arm,pl041", "arm,primecell";
+                                       reg = <0x040000 0x1000>;
+                                       interrupts = <11>;
+                                       clocks = <&v2m_clk24mhz>;
+                                       clock-names = "apb_pclk";
+                               };
 
-                       v2m_serial3: uart@c0000 {
-                               compatible = "arm,pl011", "arm,primecell";
-                               reg = <0x0c0000 0x1000>;
-                               interrupts = <8>;
-                               clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-                               clock-names = "uartclk", "apb_pclk";
-                       };
+                               mmci@50000 {
+                                       compatible = "arm,pl180", "arm,primecell";
+                                       reg = <0x050000 0x1000>;
+                                       interrupts = <9 10>;
+                                       cd-gpios = <&v2m_sysreg 0 0>;
+                                       wp-gpios = <&v2m_sysreg 1 0>;
+                                       max-frequency = <12000000>;
+                                       vmmc-supply = <&v2m_fixed_3v3>;
+                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+                                       clock-names = "mclk", "apb_pclk";
+                               };
 
-                       wdt@f0000 {
-                               compatible = "arm,sp805", "arm,primecell";
-                               reg = <0x0f0000 0x1000>;
-                               interrupts = <0>;
-                               clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
-                               clock-names = "wdogclk", "apb_pclk";
-                       };
+                               kmi@60000 {
+                                       compatible = "arm,pl050", "arm,primecell";
+                                       reg = <0x060000 0x1000>;
+                                       interrupts = <12>;
+                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+                                       clock-names = "KMIREFCLK", "apb_pclk";
+                               };
 
-                       v2m_timer01: timer@110000 {
-                               compatible = "arm,sp804", "arm,primecell";
-                               reg = <0x110000 0x1000>;
-                               interrupts = <2>;
-                               clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
-                               clock-names = "timclken1", "timclken2", "apb_pclk";
-                       };
+                               kmi@70000 {
+                                       compatible = "arm,pl050", "arm,primecell";
+                                       reg = <0x070000 0x1000>;
+                                       interrupts = <13>;
+                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+                                       clock-names = "KMIREFCLK", "apb_pclk";
+                               };
 
-                       v2m_timer23: timer@120000 {
-                               compatible = "arm,sp804", "arm,primecell";
-                               reg = <0x120000 0x1000>;
-                               interrupts = <3>;
-                               clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;
-                               clock-names = "timclken1", "timclken2", "apb_pclk";
-                       };
+                               v2m_serial0: uart@90000 {
+                                       compatible = "arm,pl011", "arm,primecell";
+                                       reg = <0x090000 0x1000>;
+                                       interrupts = <5>;
+                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+                                       clock-names = "uartclk", "apb_pclk";
+                               };
 
-                       rtc@170000 {
-                               compatible = "arm,pl031", "arm,primecell";
-                               reg = <0x170000 0x1000>;
-                               interrupts = <4>;
-                               clocks = <&v2m_clk24mhz>;
-                               clock-names = "apb_pclk";
-                       };
+                               v2m_serial1: uart@a0000 {
+                                       compatible = "arm,pl011", "arm,primecell";
+                                       reg = <0x0a0000 0x1000>;
+                                       interrupts = <6>;
+                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+                                       clock-names = "uartclk", "apb_pclk";
+                               };
 
-                       clcd@1f0000 {
-                               compatible = "arm,pl111", "arm,primecell";
-                               reg = <0x1f0000 0x1000>;
-                               interrupt-names = "combined";
-                               interrupts = <14>;
-                               clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
-                               clock-names = "clcdclk", "apb_pclk";
-                               arm,pl11x,framebuffer = <0x18000000 0x00180000>;
-                               memory-region = <&v2m_video_ram>;
-                               max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
-
-                               port {
-                                       v2m_clcd_pads: endpoint {
-                                               remote-endpoint = <&v2m_clcd_panel>;
-                                               arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
-                                       };
+                               v2m_serial2: uart@b0000 {
+                                       compatible = "arm,pl011", "arm,primecell";
+                                       reg = <0x0b0000 0x1000>;
+                                       interrupts = <7>;
+                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+                                       clock-names = "uartclk", "apb_pclk";
                                };
 
-                               panel {
-                                       compatible = "panel-dpi";
+                               v2m_serial3: uart@c0000 {
+                                       compatible = "arm,pl011", "arm,primecell";
+                                       reg = <0x0c0000 0x1000>;
+                                       interrupts = <8>;
+                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+                                       clock-names = "uartclk", "apb_pclk";
+                               };
+
+                               wdt@f0000 {
+                                       compatible = "arm,sp805", "arm,primecell";
+                                       reg = <0x0f0000 0x1000>;
+                                       interrupts = <0>;
+                                       clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
+                                       clock-names = "wdogclk", "apb_pclk";
+                               };
+
+                               v2m_timer01: timer@110000 {
+                                       compatible = "arm,sp804", "arm,primecell";
+                                       reg = <0x110000 0x1000>;
+                                       interrupts = <2>;
+                                       clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
+                                       clock-names = "timclken1", "timclken2", "apb_pclk";
+                               };
+
+                               v2m_timer23: timer@120000 {
+                                       compatible = "arm,sp804", "arm,primecell";
+                                       reg = <0x120000 0x1000>;
+                                       interrupts = <3>;
+                                       clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;
+                                       clock-names = "timclken1", "timclken2", "apb_pclk";
+                               };
+
+                               rtc@170000 {
+                                       compatible = "arm,pl031", "arm,primecell";
+                                       reg = <0x170000 0x1000>;
+                                       interrupts = <4>;
+                                       clocks = <&v2m_clk24mhz>;
+                                       clock-names = "apb_pclk";
+                               };
+
+                               clcd@1f0000 {
+                                       compatible = "arm,pl111", "arm,primecell";
+                                       reg = <0x1f0000 0x1000>;
+                                       interrupt-names = "combined";
+                                       interrupts = <14>;
+                                       clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
+                                       clock-names = "clcdclk", "apb_pclk";
+                                       arm,pl11x,framebuffer = <0x18000000 0x00180000>;
+                                       memory-region = <&v2m_video_ram>;
+                                       max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
 
                                        port {
-                                               v2m_clcd_panel: endpoint {
-                                                       remote-endpoint = <&v2m_clcd_pads>;
+                                               v2m_clcd_pads: endpoint {
+                                                       remote-endpoint = <&v2m_clcd_panel>;
+                                                       arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
                                                };
                                        };
 
-                                       panel-timing {
-                                               clock-frequency = <63500127>;
-                                               hactive = <1024>;
-                                               hback-porch = <152>;
-                                               hfront-porch = <48>;
-                                               hsync-len = <104>;
-                                               vactive = <768>;
-                                               vback-porch = <23>;
-                                               vfront-porch = <3>;
-                                               vsync-len = <4>;
+                                       panel {
+                                               compatible = "panel-dpi";
+
+                                               port {
+                                                       v2m_clcd_panel: endpoint {
+                                                               remote-endpoint = <&v2m_clcd_pads>;
+                                                       };
+                                               };
+
+                                               panel-timing {
+                                                       clock-frequency = <63500127>;
+                                                       hactive = <1024>;
+                                                       hback-porch = <152>;
+                                                       hfront-porch = <48>;
+                                                       hsync-len = <104>;
+                                                       vactive = <768>;
+                                                       vback-porch = <23>;
+                                                       vfront-porch = <3>;
+                                                       vsync-len = <4>;
+                                               };
                                        };
                                };
-                       };
 
-                       virtio-block@130000 {
-                               compatible = "virtio,mmio";
-                               reg = <0x130000 0x200>;
-                               interrupts = <42>;
+                               virtio-block@130000 {
+                                       compatible = "virtio,mmio";
+                                       reg = <0x130000 0x200>;
+                                       interrupts = <42>;
+                               };
                        };
-               };
-
-               v2m_fixed_3v3: v2m-3v3 {
-                       compatible = "regulator-fixed";
-                       regulator-name = "3V3";
-                       regulator-min-microvolt = <3300000>;
-                       regulator-max-microvolt = <3300000>;
-                       regulator-always-on;
-               };
-
-               mcc {
-                       compatible = "arm,vexpress,config-bus";
-                       arm,vexpress,config-bridge = <&v2m_sysreg>;
 
-                       v2m_oscclk1: oscclk1 {
-                               /* CLCD clock */
-                               compatible = "arm,vexpress-osc";
-                               arm,vexpress-sysreg,func = <1 1>;
-                               freq-range = <23750000 63500000>;
-                               #clock-cells = <0>;
-                               clock-output-names = "v2m:oscclk1";
+                       v2m_fixed_3v3: v2m-3v3 {
+                               compatible = "regulator-fixed";
+                               regulator-name = "3V3";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
                        };
 
-                       reset {
-                               compatible = "arm,vexpress-reset";
-                               arm,vexpress-sysreg,func = <5 0>;
-                       };
+                       mcc {
+                               compatible = "arm,vexpress,config-bus";
+                               arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+                               v2m_oscclk1: oscclk1 {
+                                       /* CLCD clock */
+                                       compatible = "arm,vexpress-osc";
+                                       arm,vexpress-sysreg,func = <1 1>;
+                                       freq-range = <23750000 63500000>;
+                                       #clock-cells = <0>;
+                                       clock-output-names = "v2m:oscclk1";
+                               };
 
-                       muxfpga {
-                               compatible = "arm,vexpress-muxfpga";
-                               arm,vexpress-sysreg,func = <7 0>;
-                       };
+                               reset {
+                                       compatible = "arm,vexpress-reset";
+                                       arm,vexpress-sysreg,func = <5 0>;
+                               };
 
-                       shutdown {
-                               compatible = "arm,vexpress-shutdown";
-                               arm,vexpress-sysreg,func = <8 0>;
-                       };
+                               muxfpga {
+                                       compatible = "arm,vexpress-muxfpga";
+                                       arm,vexpress-sysreg,func = <7 0>;
+                               };
 
-                       reboot {
-                               compatible = "arm,vexpress-reboot";
-                               arm,vexpress-sysreg,func = <9 0>;
-                       };
+                               shutdown {
+                                       compatible = "arm,vexpress-shutdown";
+                                       arm,vexpress-sysreg,func = <8 0>;
+                               };
+
+                               reboot {
+                                       compatible = "arm,vexpress-reboot";
+                                       arm,vexpress-sysreg,func = <9 0>;
+                               };
 
-                       dvimode {
-                               compatible = "arm,vexpress-dvimode";
-                               arm,vexpress-sysreg,func = <11 0>;
+                               dvimode {
+                                       compatible = "arm,vexpress-dvimode";
+                                       arm,vexpress-sysreg,func = <11 0>;
+                               };
                        };
                };
        };
+};