arm: dts: add gpmi weim dts for imx6ul
authorHan Xu <han.xu@nxp.com>
Thu, 7 Nov 2019 00:30:03 +0000 (18:30 -0600)
committerDong Aisheng <aisheng.dong@nxp.com>
Mon, 14 Dec 2020 03:20:44 +0000 (11:20 +0800)
add gpmi weim dts for imx6ul

Signed-off-by: Han Xu <han.xu@nxp.com>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/imx6ul-14x14-evk-gpmi-weim.dts [new file with mode: 0644]

index 76793d6..993b959 100644 (file)
@@ -643,6 +643,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
        imx6ul-14x14-evk-btwifi-oob.dtb \
        imx6ul-14x14-evk-ecspi-slave.dtb \
        imx6ul-14x14-evk-ecspi.dtb \
+       imx6ul-14x14-evk-gpmi-weim.dtb \
        imx6ul-9x9-evk.dtb \
        imx6ul-9x9-evk-btwifi.dtb \
        imx6ul-9x9-evk-btwifi-oob.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk-gpmi-weim.dts b/arch/arm/boot/dts/imx6ul-14x14-evk-gpmi-weim.dts
new file mode 100644 (file)
index 0000000..b7fe014
--- /dev/null
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2015 Freescale Semiconductor, Inc.
+
+#include "imx6ul-14x14-evk.dts"
+
+&gpmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpmi_nand_1>;
+       status = "okay";
+       nand-on-flash-bbt;
+};
+
+&iomuxc {
+       pinctrl_gpmi_nand_1: gpmi-nand-1 {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_CLE__RAWNAND_CLE         0xb0b1
+                       MX6UL_PAD_NAND_ALE__RAWNAND_ALE         0xb0b1
+                       MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B       0xb0b1
+                       MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
+                       MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B     0xb0b1
+                       MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B     0xb0b1
+                       MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B       0xb0b1
+                       MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B       0xb0b1
+                       MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00   0xb0b1
+                       MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01   0xb0b1
+                       MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02   0xb0b1
+                       MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03   0xb0b1
+                       MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04   0xb0b1
+                       MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05   0xb0b1
+                       MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06   0xb0b1
+                       MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07   0xb0b1
+               >;
+       };
+};
+
+&qspi {
+       status = "disabled";
+};
+
+&usdhc2 {
+       status = "disabled";
+};