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arm64: dts: mediatek: mt8183: fix gce incorrect mbox-cells value
authorFabien Parent <fparent@baylibre.com>
Sun, 18 Oct 2020 19:42:25 +0000 (21:42 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 30 Dec 2020 10:52:56 +0000 (11:52 +0100)
[ Upstream commit e55c56df43dd11de4a6c08e3ea52ca45b51c8800 ]

The binding documentation says:
- #mbox-cells: Should be 2.
<&phandle channel priority>
phandle: Label name of a gce node.
channel: Channel of mailbox. Be equal to the thread id of GCE.
priority: Priority of GCE thread.

Fix the value of #mbox-cells.

Fixes: d3c306e31bc7 ("arm64: dts: add gce node for mt8183")
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20201018194225.3361182-1-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/mediatek/mt8183.dtsi patch | blob | history

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 9cfd961..08a914d 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -363,7 +363,7 @@
                        compatible = "mediatek,mt8183-gce";
                        reg = <0 0x10238000 0 0x4000>;
                        interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>;
-                       #mbox-cells = <3>;
+                       #mbox-cells = <2>;
                        clocks = <&infracfg CLK_INFRA_GCE>;
                        clock-names = "gce";
                };