arm64: dts: qcom: SDM845: Enable GPU DDR bw scaling

This patch adds the interconnects property for the gpu node and the
opp-peak-kBps property to the opps of the gpu opp table. This should
help enable DDR bandwidth scaling dynamically and proportionally to the
GPU frequency.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Link: https://lore.kernel.org/r/1594992579-20662-5-git-send-email-akhilpo@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0b5f063..2884577 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4007,42 +4007,52 @@
 
                        qcom,gmu = <&gmu>;
 
+                       interconnects = <&mem_noc MASTER_GFX3D &mem_noc SLAVE_EBI1>;
+                       interconnect-names = "gfx-mem";
+
                        gpu_opp_table: opp-table {
                                compatible = "operating-points-v2";
 
                                opp-710000000 {
                                        opp-hz = /bits/ 64 <710000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
+                                       opp-peak-kBps = <7216000>;
                                };
 
                                opp-675000000 {
                                        opp-hz = /bits/ 64 <675000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
+                                       opp-peak-kBps = <7216000>;
                                };
 
                                opp-596000000 {
                                        opp-hz = /bits/ 64 <596000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+                                       opp-peak-kBps = <6220000>;
                                };
 
                                opp-520000000 {
                                        opp-hz = /bits/ 64 <520000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+                                       opp-peak-kBps = <6220000>;
                                };
 
                                opp-414000000 {
                                        opp-hz = /bits/ 64 <414000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+                                       opp-peak-kBps = <4068000>;
                                };
 
                                opp-342000000 {
                                        opp-hz = /bits/ 64 <342000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+                                       opp-peak-kBps = <2724000>;
                                };
 
                                opp-257000000 {
                                        opp-hz = /bits/ 64 <257000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+                                       opp-peak-kBps = <1648000>;
                                };
                        };
                };