dts: arm64: add dts for DCSS and rm67191

This DTS will be needed for the following display pipeline:

DCSS + MIPI_DSI + RM67191

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 8bc9769..be3097e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-ak4497.dtb imx8mq-evk-audio-tdm.dtb imx8mq-
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-root.dtb imx8mq-evk-inmate.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-lcdif-rm67191.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-dcss-rm67191.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r3.dtb

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk-dcss-rm67191.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk-dcss-rm67191.dts
new file mode 100644 (file)
index 0000000..d33c82e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk-dcss-rm67191.dts
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include "imx8mq-evk.dts"
+
+&irqsteer {
+       status = "okay";
+};
+
+&hdmi {
+       status = "disabled";
+};
+
+&lcdif {
+       status = "disabled";
+};
+
+&dcss {
+       status = "okay";
+
+       clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
+                <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
+                <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
+                <&clk IMX8MQ_CLK_DC_PIXEL>,
+                <&clk IMX8MQ_CLK_DISP_DTRC>;
+       clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
+       assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL>,
+                                         <&clk IMX8MQ_VIDEO_PLL1_BYPASS>,
+                                         <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
+                                         <&clk IMX8MQ_CLK_DISP_AXI>,
+                                         <&clk IMX8MQ_CLK_DISP_RTRM>;
+       assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
+                                                        <&clk IMX8MQ_VIDEO_PLL1>,
+                                                        <&clk IMX8MQ_CLK_27M>,
+                                                        <&clk IMX8MQ_SYS1_PLL_800M>,
+                                                        <&clk IMX8MQ_SYS1_PLL_800M>;
+       assigned-clock-rates = <600000000>, <0>, <0>,
+                                                  <800000000>,
+                                                  <400000000>;
+
+       port@0 {
+               dcss_out: endpoint {
+                       remote-endpoint = <&mipi_dsi_in>;
+               };
+       };
+};
+
+&mipi_dsi {
+       status = "okay";
+       fsl,clock-drop-level = <2>;
+
+       panel@0 {
+               compatible = "raydium,rm67191";
+               reg = <0>;
+               pinctrl-0 = <&pinctrl_mipi_dsi_en>;
+               pinctrl-names = "default";
+               reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
+               dsi-lanes = <4>;
+               video-mode = <2>;
+               width-mm = <68>;
+               height-mm = <121>;
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&mipi_dsi_out>;
+                       };
+               };
+       };
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       mipi_dsi_in: endpoint {
+                               remote-endpoint = <&dcss_out>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+                       mipi_dsi_out: endpoint {
+                               remote-endpoint = <&panel_in>;
+                       };
+               };
+       };
+};
+
+&dphy {
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_mipi_dsi_en: mipi_dsi_en {
+               fsl,pins = <
+                       MX8MQ_IOMUXC_ECSPI1_SCLK_GPIO5_IO6      0x16
+               >;
+       };
+};