#define GPR_MIPI_RESET 0x08
#define GPR_MIPI_S_RESETN BIT(16)
-#define MIPI_CSIS_MISC 0x8008
-
-
#define DEFAULT_SCLK_CSIS_FREQ 166000000UL
enum {
static int mipi_csis_phy_reset_mx8mm(struct csi_state *state)
{
- struct device_node *np;
- void __iomem *reg;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-csi");
- if (WARN_ON(!np))
- return -ENXIO;
+ struct device_node *np = state->dev->of_node;
+ struct regmap *gpr;
- reg = of_iomap(np, 0);
+ gpr = syscon_regmap_lookup_by_phandle(np, "csi-gpr");
+ if (IS_ERR(gpr))
+ return PTR_ERR(gpr);
- writel(0, reg + MIPI_CSIS_MISC);
+ regmap_update_bits(gpr, GPR_MIPI_RESET,
+ GPR_MIPI_S_RESETN,
+ 0x0);
usleep_range(10, 20);
- writel(0x30000, reg + MIPI_CSIS_MISC);
+ regmap_update_bits(gpr, GPR_MIPI_RESET,
+ GPR_MIPI_S_RESETN,
+ GPR_MIPI_S_RESETN);
usleep_range(10, 20);
return 0;