MLK-24766-5 arm64: dts: imx8dxl: enable lpspi3 support

Enable imx8dxl lpspi3 with both cs-gpio and non-cs-gpio enabled.
Non-cs-gpio config is just a configuration example.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 66429f49e5dac7052cb8fe5fd8853b7586b0ba3a)
(cherry picked from commit c718fa3d1dbc8638278626cf5294ebe360a04859)

diff --git a/arch/arm/dts/fsl-imx8dxl-evk.dts b/arch/arm/dts/fsl-imx8dxl-evk.dts
index bcda8f7..073a4df 100644 (file)
--- a/arch/arm/dts/fsl-imx8dxl-evk.dts
+++ b/arch/arm/dts/fsl-imx8dxl-evk.dts
@@ -158,6 +158,16 @@
                        >;
                };
 
+               pinctrl_lpspi3: lpspi3grp {
+                       fsl,pins = <
+                               SC_P_SPI3_SCK_ADMA_SPI3_SCK     0x0600004c
+                               SC_P_SPI3_SDO_ADMA_SPI3_SDO     0x0600004c
+                               SC_P_SPI3_SDI_ADMA_SPI3_SDI     0x0600004c
+                               SC_P_SPI3_CS1_ADMA_SPI3_CS1     0x0600004c
+                               SC_P_SPI3_CS0_LSIO_GPIO0_IO16   0x21
+                       >;
+               };
+
                pinctrl_usdhc1: usdhc1grp {
                        fsl,pins = <
                                SC_P_EMMC0_CLK_CONN_EMMC0_CLK           0x06000041
@@ -286,6 +296,10 @@
        status = "okay";
 };
 
+&gpio0 {
+       status = "okay";
+};
+
 &gpio4 {
        status = "okay";
 };
@@ -294,6 +308,16 @@
        status = "okay";
 };
 
+&lpspi3 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpspi3>;
+       cs-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>, <0>, <0>, <0>;
+       spi-max-frequency = <1000000>;
+       status = "okay";
+};
+
 &i2c2 {
        clock-frequency = <100000>;
        pinctrl-names = "default";

diff --git a/arch/arm/dts/fsl-imx8dxl.dtsi b/arch/arm/dts/fsl-imx8dxl.dtsi
index 445e623..66386c2 100644 (file)
--- a/arch/arm/dts/fsl-imx8dxl.dtsi
+++ b/arch/arm/dts/fsl-imx8dxl.dtsi
@@ -47,6 +47,7 @@
                i2c2 = &i2c2;
                i2c3 = &i2c3;
                spi0 = &flexspi0;
+               spi1 = &lpspi3;
                usb0 = &usbotg1;
                usbphy0 = &usbphy1;
                usb1 = &usbotg2;
@@ -1338,25 +1339,53 @@
                         <&clk IMX8QXP_SPI0_IPG_CLK>;
                clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX8QXP_SPI0_CLK>;
-               assigned-clock-rates = <20000000>;
+               assigned-clock-rates = <80000000>;
                power-domains = <&pd_dma_lpspi0>;
                status = "disabled";
        };
 
+       lpspi1: lpspi@5a010000 {
+               compatible = "fsl,imx7ulp-spi";
+               reg = <0x0 0x5a010000 0x0 0x10000>;
+               interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-parent = <&gic>;
+               clocks = <&clk IMX8QXP_SPI1_CLK>,
+                        <&clk IMX8QXP_SPI1_IPG_CLK>;
+               clock-names = "per", "ipg";
+               assigned-clocks = <&clk IMX8QXP_SPI1_CLK>;
+               assigned-clock-rates = <80000000>;
+               power-domains = <&pd_dma_lpspi1>;
+               status = "disabled";
+       };
+
        lpspi2: lpspi@5a020000 {
                compatible = "fsl,imx7ulp-spi";
                reg = <0x0 0x5a020000 0x0 0x10000>;
-               interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
                clocks = <&clk IMX8QXP_SPI2_CLK>,
                         <&clk IMX8QXP_SPI2_IPG_CLK>;
                clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX8QXP_SPI2_CLK>;
-               assigned-clock-rates = <20000000>;
+               assigned-clock-rates = <80000000>;
                power-domains = <&pd_dma_lpspi2>;
                status = "disabled";
        };
 
+       lpspi3: lpspi@5a030000 {
+               compatible = "fsl,imx7ulp-spi";
+               reg = <0x0 0x5a030000 0x0 0x10000>;
+               interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-parent = <&gic>;
+               clocks = <&clk IMX8QXP_SPI3_CLK>,
+                        <&clk IMX8QXP_SPI3_IPG_CLK>;
+               clock-names = "per", "ipg";
+               assigned-clocks = <&clk IMX8QXP_SPI3_CLK>;
+               assigned-clock-rates = <80000000>;
+               power-domains = <&pd_dma_lpspi3>;
+               status = "disabled";
+       };
+
        lpuart0: serial@5a060000 {
                compatible = "fsl,imx8qm-lpuart";
                reg = <0x0 0x5a060000 0x0 0x1000>;