MLK-11327 dma: pxp: porting pxp dma driver to imx_4.1.y

Porting pxp dma drivers v2 and v3 to imx_4.1.y branch.

Signed-off-by: Fancy Fang <chen.fang@freescale.com>

diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig
index 740dde9..eefd676 100644 (file)
--- a/arch/arm/configs/imx_v7_defconfig
+++ b/arch/arm/configs/imx_v7_defconfig
@@ -293,6 +293,8 @@ CONFIG_RTC_DRV_MC13XXX=y
 CONFIG_RTC_DRV_MXC=y
 CONFIG_RTC_DRV_SNVS=y
 CONFIG_DMADEVICES=y
+CONFIG_MXC_PXP_V2=y
+CONFIG_MXC_PXP_V3=y
 CONFIG_IMX_SDMA=y
 CONFIG_MXS_DMA=y
 CONFIG_STAGING=y

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 141aefb..5c94dda 100644 (file)
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -362,6 +362,8 @@ config MXS_DMA
          and APBX-DMA is integrated into Freescale
          i.MX23/28/MX6Q/MX6DL/MX6UL chips.
 
+source "drivers/dma/pxp/Kconfig"
+
 config MX3_IPU
        bool "MX3x Image Processing Unit support"
        depends on ARCH_MXC

diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index e4dc9ca..0f4da5b 100644 (file)
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -53,6 +53,8 @@ obj-$(CONFIG_PCH_DMA) += pch_dma.o
 obj-$(CONFIG_PL330_DMA) += pl330.o
 obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
 obj-$(CONFIG_PXA_DMA) += pxa_dma.o
+obj-$(CONFIG_MXC_PXP_V2) += pxp/
+obj-$(CONFIG_MXC_PXP_V3) += pxp/
 obj-$(CONFIG_RENESAS_DMA) += sh/
 obj-$(CONFIG_SIRF_DMA) += sirf-dma.o
 obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o

diff --git a/drivers/dma/pxp/Kconfig b/drivers/dma/pxp/Kconfig
new file mode 100644 (file)
index 0000000..76717f7
--- /dev/null
+++ b/drivers/dma/pxp/Kconfig
@@ -0,0 +1,22 @@
+config MXC_PXP_V2
+       bool "MXC PxP V2 support"
+       depends on ARM
+       select DMA_ENGINE
+       help
+          Support the PxP (Pixel Pipeline) on i.MX6 DualLite and i.MX6 SoloLite.
+         If unsure, select N.
+
+config MXC_PXP_V3
+       bool "MXC PxP V3 support"
+       depends on ARM
+       select DMA_ENGINE
+       help
+         Support the PxP V3(Pixel Pipeline) on i.MX7D. The PxP V3 supports
+         more functions than PxP V2, dithering, reagl/-D and etc.
+         If unsure, select N.
+
+config MXC_PXP_CLIENT_DEVICE
+       bool "MXC PxP Client Device"
+       default y
+       depends on MXC_PXP_V2 || MXC_PXP_V3
+

diff --git a/drivers/dma/pxp/Makefile b/drivers/dma/pxp/Makefile
new file mode 100644 (file)
index 0000000..42e4ace
--- /dev/null
+++ b/drivers/dma/pxp/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_MXC_PXP_V2) += pxp_dma_v2.o
+obj-$(CONFIG_MXC_PXP_V3) += pxp_dma_v3.o
+obj-$(CONFIG_MXC_PXP_CLIENT_DEVICE) += pxp_device.o

diff --git a/drivers/dma/pxp/pxp_device.c b/drivers/dma/pxp/pxp_device.c
new file mode 100644 (file)
index 0000000..b2716a0
--- /dev/null
+++ b/drivers/dma/pxp/pxp_device.c
@@ -0,0 +1,869 @@
+/*
+ * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+#include <linux/interrupt.h>
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/fs.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/delay.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/pxp_device.h>
+#include <linux/atomic.h>
+#include <linux/platform_data/dma-imx.h>
+
+#define BUFFER_HASH_ORDER 4
+
+static struct pxp_buffer_hash bufhash;
+static struct pxp_irq_info irq_info[NR_PXP_VIRT_CHANNEL];
+
+static int pxp_ht_create(struct pxp_buffer_hash *hash, int order)
+{
+       unsigned long i;
+       unsigned long table_size;
+
+       table_size = 1U << order;
+
+       hash->order = order;
+       hash->hash_table = kmalloc(sizeof(*hash->hash_table) * table_size, GFP_KERNEL);
+
+       if (!hash->hash_table) {
+               pr_err("%s: Out of memory for hash table\n", __func__);
+               return -ENOMEM;
+       }
+
+       for (i = 0; i < table_size; i++)
+               INIT_HLIST_HEAD(&hash->hash_table[i]);
+
+       return 0;
+}
+
+static int pxp_ht_insert_item(struct pxp_buffer_hash *hash,
+                             struct pxp_buf_obj *new)
+{
+       unsigned long hashkey;
+       struct hlist_head *h_list;
+
+       hashkey = hash_long(new->offset >> PAGE_SHIFT, hash->order);
+       h_list = &hash->hash_table[hashkey];
+
+       spin_lock(&hash->hash_lock);
+       hlist_add_head_rcu(&new->item, h_list);
+       spin_unlock(&hash->hash_lock);
+
+       return 0;
+}
+
+static int pxp_ht_remove_item(struct pxp_buffer_hash *hash,
+                             struct pxp_buf_obj *obj)
+{
+       spin_lock(&hash->hash_lock);
+       hlist_del_init_rcu(&obj->item);
+       spin_unlock(&hash->hash_lock);
+       return 0;
+}
+
+static struct hlist_node *pxp_ht_find_key(struct pxp_buffer_hash *hash,
+                                         unsigned long key)
+{
+       struct pxp_buf_obj *entry;
+       struct hlist_head *h_list;
+       unsigned long hashkey;
+
+       hashkey = hash_long(key, hash->order);
+       h_list = &hash->hash_table[hashkey];
+
+       hlist_for_each_entry_rcu(entry, h_list, item) {
+               if (entry->offset >> PAGE_SHIFT == key)
+                       return &entry->item;
+       }
+
+       return NULL;
+}
+
+static void pxp_ht_destroy(struct pxp_buffer_hash *hash)
+{
+       kfree(hash->hash_table);
+       hash->hash_table = NULL;
+}
+
+static int pxp_buffer_handle_create(struct pxp_file *file_priv,
+                                   struct pxp_buf_obj *obj,
+                                   uint32_t *handlep)
+{
+       int ret;
+
+       idr_preload(GFP_KERNEL);
+       spin_lock(&file_priv->buffer_lock);
+
+       ret = idr_alloc(&file_priv->buffer_idr, obj, 1, 0, GFP_NOWAIT);
+
+       spin_unlock(&file_priv->buffer_lock);
+       idr_preload_end();
+
+       if (ret < 0)
+               return ret;
+
+       *handlep = ret;
+
+       return 0;
+}
+
+static struct pxp_buf_obj *
+pxp_buffer_object_lookup(struct pxp_file *file_priv,
+                        uint32_t handle)
+{
+       struct pxp_buf_obj *obj;
+
+       spin_lock(&file_priv->buffer_lock);
+
+       obj = idr_find(&file_priv->buffer_idr, handle);
+       if (!obj) {
+               spin_unlock(&file_priv->buffer_lock);
+               return NULL;
+       }
+
+       spin_unlock(&file_priv->buffer_lock);
+
+       return obj;
+}
+
+static int pxp_buffer_handle_delete(struct pxp_file *file_priv,
+                                   uint32_t handle)
+{
+       struct pxp_buf_obj *obj;
+
+       spin_lock(&file_priv->buffer_lock);
+
+       obj = idr_find(&file_priv->buffer_idr, handle);
+       if (!obj) {
+               spin_unlock(&file_priv->buffer_lock);
+               return -EINVAL;
+       }
+
+       idr_remove(&file_priv->buffer_idr, handle);
+       spin_unlock(&file_priv->buffer_lock);
+
+       return 0;
+}
+
+static int pxp_channel_handle_create(struct pxp_file *file_priv,
+                                    struct pxp_chan_obj *obj,
+                                    uint32_t *handlep)
+{
+       int ret;
+
+       idr_preload(GFP_KERNEL);
+       spin_lock(&file_priv->channel_lock);
+
+       ret = idr_alloc(&file_priv->channel_idr, obj, 0, 0, GFP_NOWAIT);
+
+       spin_unlock(&file_priv->channel_lock);
+       idr_preload_end();
+
+       if (ret < 0)
+               return ret;
+
+       *handlep = ret;
+
+       return 0;
+}
+
+static struct pxp_chan_obj *
+pxp_channel_object_lookup(struct pxp_file *file_priv,
+                         uint32_t handle)
+{
+       struct pxp_chan_obj *obj;
+
+       spin_lock(&file_priv->channel_lock);
+
+       obj = idr_find(&file_priv->channel_idr, handle);
+       if (!obj) {
+               spin_unlock(&file_priv->channel_lock);
+               return NULL;
+       }
+
+       spin_unlock(&file_priv->channel_lock);
+
+       return obj;
+}
+
+static int pxp_channel_handle_delete(struct pxp_file *file_priv,
+                                    uint32_t handle)
+{
+       struct pxp_chan_obj *obj;
+
+       spin_lock(&file_priv->channel_lock);
+
+       obj = idr_find(&file_priv->channel_idr, handle);
+       if (!obj) {
+               spin_unlock(&file_priv->channel_lock);
+               return -EINVAL;
+       }
+
+       idr_remove(&file_priv->channel_idr, handle);
+       spin_unlock(&file_priv->channel_lock);
+
+       return 0;
+}
+
+static int pxp_alloc_dma_buffer(struct pxp_buf_obj *obj)
+{
+       obj->virtual = dma_alloc_coherent(NULL, PAGE_ALIGN(obj->size),
+                              (dma_addr_t *) (&obj->offset),
+                              GFP_DMA | GFP_KERNEL);
+       pr_debug("[ALLOC] mem alloc phys_addr = 0x%lx\n", obj->offset);
+
+       if (obj->virtual == NULL) {
+               printk(KERN_ERR "Physical memory allocation error!\n");
+               return -1;
+       }
+
+       return 0;
+}
+
+static void pxp_free_dma_buffer(struct pxp_buf_obj *obj)
+{
+       if (obj->virtual != NULL) {
+               dma_free_coherent(0, PAGE_ALIGN(obj->size),
+                                 obj->virtual, (dma_addr_t)obj->offset);
+       }
+}
+
+static int
+pxp_buffer_object_free(int id, void *ptr, void *data)
+{
+       struct pxp_file *file_priv = data;
+       struct pxp_buf_obj *obj = ptr;
+       int ret;
+
+       ret = pxp_buffer_handle_delete(file_priv, obj->handle);
+       if (ret < 0)
+               return ret;
+
+       pxp_ht_remove_item(&bufhash, obj);
+       pxp_free_dma_buffer(obj);
+       kfree(obj);
+
+       return 0;
+}
+
+static int
+pxp_channel_object_free(int id, void *ptr, void *data)
+{
+       struct pxp_file *file_priv = data;
+       struct pxp_chan_obj *obj = ptr;
+       int chan_id;
+
+       chan_id = obj->chan->chan_id;
+       wait_event(irq_info[chan_id].waitq,
+               atomic_read(&irq_info[chan_id].irq_pending) == 0);
+
+       pxp_channel_handle_delete(file_priv, obj->handle);
+       dma_release_channel(obj->chan);
+       kfree(obj);
+
+       return 0;
+}
+
+static void pxp_free_buffers(struct pxp_file *file_priv)
+{
+       idr_for_each(&file_priv->buffer_idr,
+                       &pxp_buffer_object_free, file_priv);
+       idr_destroy(&file_priv->buffer_idr);
+}
+
+static void pxp_free_channels(struct pxp_file *file_priv)
+{
+       idr_for_each(&file_priv->channel_idr,
+                       &pxp_channel_object_free, file_priv);
+       idr_destroy(&file_priv->channel_idr);
+}
+
+/* Callback function triggered after PxP receives an EOF interrupt */
+static void pxp_dma_done(void *arg)
+{
+       struct pxp_tx_desc *tx_desc = to_tx_desc(arg);
+       struct dma_chan *chan = tx_desc->txd.chan;
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+       int chan_id = pxp_chan->dma_chan.chan_id;
+
+       pr_debug("DMA Done ISR, chan_id %d\n", chan_id);
+
+       atomic_dec(&irq_info[chan_id].irq_pending);
+       irq_info[chan_id].hist_status = tx_desc->hist_status;
+
+       wake_up(&(irq_info[chan_id].waitq));
+}
+
+static int pxp_ioc_config_chan(struct pxp_file *priv, unsigned long arg)
+{
+       struct scatterlist sg[3];
+       struct pxp_tx_desc *desc;
+       struct dma_async_tx_descriptor *txd;
+       struct pxp_config_data *pxp_conf;
+       dma_cookie_t cookie;
+       int handle, chan_id;
+       struct dma_chan *chan;
+       struct pxp_chan_obj *obj;
+       int i = 0, j = 0, k = 0, m = 0, length, ret, sg_len;
+
+       pxp_conf = kzalloc(sizeof(*pxp_conf), GFP_KERNEL);
+       if (!pxp_conf)
+               return -ENOMEM;
+
+       ret = copy_from_user(pxp_conf,
+                            (struct pxp_config_data *)arg,
+                            sizeof(struct pxp_config_data));
+       if (ret) {
+               kfree(pxp_conf);
+               return -EFAULT;
+       }
+
+       handle = pxp_conf->handle;
+       obj = pxp_channel_object_lookup(priv, handle);
+       if (!obj) {
+               kfree(pxp_conf);
+               return -EINVAL;
+       }
+       chan = obj->chan;
+       chan_id = chan->chan_id;
+
+       sg_len = 3;
+       if (pxp_conf->proc_data.engine_enable & PXP_ENABLE_WFE_A)
+               sg_len += 4;
+       if (pxp_conf->proc_data.engine_enable & PXP_ENABLE_WFE_B)
+               sg_len += 4;
+       if (pxp_conf->proc_data.engine_enable & PXP_ENABLE_DITHER)
+               sg_len += 4;
+
+       sg_init_table(sg, sg_len);
+
+       txd = chan->device->device_prep_slave_sg(chan,
+                                                sg, sg_len,
+                                                DMA_TO_DEVICE,
+                                                DMA_PREP_INTERRUPT,
+                                                NULL);
+       if (!txd) {
+               pr_err("Error preparing a DMA transaction descriptor.\n");
+               kfree(pxp_conf);
+               return -EIO;
+       }
+
+       txd->callback_param = txd;
+       txd->callback = pxp_dma_done;
+
+       desc = to_tx_desc(txd);
+
+       length = desc->len;
+       for (i = 0; i < length; i++) {
+               if (i == 0) {   /* S0 */
+                       memcpy(&desc->proc_data,
+                              &pxp_conf->proc_data,
+                              sizeof(struct pxp_proc_data));
+                       memcpy(&desc->layer_param.s0_param,
+                              &pxp_conf->s0_param,
+                              sizeof(struct pxp_layer_param));
+                       desc = desc->next;
+               } else if (i == 1) {    /* Output */
+                       memcpy(&desc->layer_param.out_param,
+                              &pxp_conf->out_param,
+                              sizeof(struct pxp_layer_param));
+                       desc = desc->next;
+               } else if (i == 2) {
+                       /* OverLay */
+                       memcpy(&desc->layer_param.ol_param,
+                              &pxp_conf->ol_param,
+                              sizeof(struct pxp_layer_param));
+                       desc = desc->next;
+               } else if ((pxp_conf->proc_data.engine_enable & PXP_ENABLE_WFE_A) && (j < 4)) {
+                       for (j = 0; j < 4; j++) {
+                               if (j == 0) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->wfe_a_fetch_param[0],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_WFE_A_FETCH0;
+                               } else if (j == 1) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->wfe_a_fetch_param[1],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_WFE_A_FETCH1;
+                               } else if (j == 2) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->wfe_a_store_param[0],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_WFE_A_STORE0;
+                               } else if (j == 3) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->wfe_a_store_param[1],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_WFE_A_STORE1;
+                               }
+
+                               desc = desc->next;
+                       }
+
+                       i += 4;
+
+               } else if ((pxp_conf->proc_data.engine_enable & PXP_ENABLE_WFE_B) && (m < 4)) {
+                       for (m = 0; m < 4; m++) {
+                               if (m == 0) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->wfe_b_fetch_param[0],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_WFE_B_FETCH0;
+                               } else if (m == 1) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->wfe_b_fetch_param[1],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_WFE_B_FETCH1;
+                               } else if (m == 2) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->wfe_b_store_param[0],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_WFE_B_STORE0;
+                               } else if (m == 3) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->wfe_b_store_param[1],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_WFE_B_STORE1;
+                               }
+
+                               desc = desc->next;
+                       }
+
+                       i += 4;
+
+               } else if ((pxp_conf->proc_data.engine_enable & PXP_ENABLE_DITHER) && (k < 4)) {
+                       for (k = 0; k < 4; k++) {
+                               if (k == 0) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->dither_fetch_param[0],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_DITHER_FETCH0;
+                               } else if (k == 1) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->dither_fetch_param[1],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_DITHER_FETCH1;
+                               } else if (k == 2) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->dither_store_param[0],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_DITHER_STORE0;
+                               } else if (k == 3) {
+                                       memcpy(&desc->layer_param.processing_param,
+                                              &pxp_conf->dither_store_param[1],
+                                              sizeof(struct pxp_layer_param));
+                                       desc->layer_param.processing_param.flag = PXP_BUF_FLAG_DITHER_STORE1;
+                               }
+
+                               desc = desc->next;
+                       }
+
+                       i += 4;
+               }
+       }
+
+       cookie = txd->tx_submit(txd);
+       if (cookie < 0) {
+               pr_err("Error tx_submit\n");
+               kfree(pxp_conf);
+               return -EIO;
+       }
+
+       atomic_inc(&irq_info[chan_id].irq_pending);
+
+       kfree(pxp_conf);
+
+       return 0;
+}
+
+static int pxp_device_open(struct inode *inode, struct file *filp)
+{
+       struct pxp_file *priv;
+
+       priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+
+       if (!priv)
+               return -ENOMEM;
+
+       filp->private_data = priv;
+       priv->filp = filp;
+
+       idr_init(&priv->buffer_idr);
+       spin_lock_init(&priv->buffer_lock);
+
+       idr_init(&priv->channel_idr);
+       spin_lock_init(&priv->channel_lock);
+
+       return 0;
+}
+
+static int pxp_device_release(struct inode *inode, struct file *filp)
+{
+       struct pxp_file *priv = filp->private_data;
+
+       if (priv) {
+               pxp_free_channels(priv);
+               pxp_free_buffers(priv);
+               kfree(priv);
+               filp->private_data = NULL;
+       }
+
+       return 0;
+}
+
+static int pxp_device_mmap(struct file *file, struct vm_area_struct *vma)
+{
+       int request_size;
+       struct hlist_node *node;
+       struct pxp_buf_obj *obj;
+
+       request_size = vma->vm_end - vma->vm_start;
+
+       pr_debug("start=0x%x, pgoff=0x%x, size=0x%x\n",
+                (unsigned int)(vma->vm_start), (unsigned int)(vma->vm_pgoff),
+                request_size);
+
+       node = pxp_ht_find_key(&bufhash, vma->vm_pgoff);
+       if (!node)
+               return -EINVAL;
+
+       obj = list_entry(node, struct pxp_buf_obj, item);
+       if (obj->offset + (obj->size >> PAGE_SHIFT) <
+               (vma->vm_pgoff + vma_pages(vma)))
+               return -ENOMEM;
+
+       switch (obj->mem_type) {
+       case MEMORY_TYPE_UNCACHED:
+               vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+               break;
+       case MEMORY_TYPE_WC:
+               vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
+               break;
+       case MEMORY_TYPE_CACHED:
+               break;
+       default:
+               pr_err("%s: invalid memory type!\n", __func__);
+               return -EINVAL;
+       }
+
+       return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+                              request_size, vma->vm_page_prot) ? -EAGAIN : 0;
+}
+
+static bool chan_filter(struct dma_chan *chan, void *arg)
+{
+       if (imx_dma_is_pxp(chan))
+               return true;
+       else
+               return false;
+}
+
+static long pxp_device_ioctl(struct file *filp,
+                           unsigned int cmd, unsigned long arg)
+{
+       int ret = 0;
+       struct pxp_file *file_priv = filp->private_data;
+
+       switch (cmd) {
+       case PXP_IOC_GET_CHAN:
+               {
+                       int ret;
+                       struct dma_chan *chan = NULL;
+                       dma_cap_mask_t mask;
+                       struct pxp_chan_obj *obj = NULL;
+
+                       pr_debug("drv: PXP_IOC_GET_CHAN Line %d\n", __LINE__);
+
+                       dma_cap_zero(mask);
+                       dma_cap_set(DMA_SLAVE, mask);
+                       dma_cap_set(DMA_PRIVATE, mask);
+
+                       chan = dma_request_channel(mask, chan_filter, NULL);
+                       if (!chan) {
+                               pr_err("Unsccessfully received channel!\n");
+                               return -EBUSY;
+                       }
+
+                       pr_debug("Successfully received channel."
+                                "chan_id %d\n", chan->chan_id);
+
+                       obj = kzalloc(sizeof(*obj), GFP_KERNEL);
+                       if (!obj) {
+                               dma_release_channel(chan);
+                               return -ENOMEM;
+                       }
+                       obj->chan = chan;
+
+                       ret = pxp_channel_handle_create(file_priv, obj,
+                                                       &obj->handle);
+                       if (ret) {
+                               dma_release_channel(chan);
+                               kfree(obj);
+                               return ret;
+                       }
+
+                       init_waitqueue_head(&(irq_info[chan->chan_id].waitq));
+                       if (put_user(obj->handle, (u32 __user *) arg)) {
+                               pxp_channel_handle_delete(file_priv, obj->handle);
+                               dma_release_channel(chan);
+                               kfree(obj);
+                               return -EFAULT;
+                       }
+
+                       break;
+               }
+       case PXP_IOC_PUT_CHAN:
+               {
+                       int handle;
+                       struct pxp_chan_obj *obj;
+
+                       if (get_user(handle, (u32 __user *) arg))
+                               return -EFAULT;
+
+                       pr_debug("%d release handle %d\n", __LINE__, handle);
+
+                       obj = pxp_channel_object_lookup(file_priv, handle);
+                       if (!obj)
+                               return -EINVAL;
+
+                       pxp_channel_handle_delete(file_priv, obj->handle);
+                       dma_release_channel(obj->chan);
+                       kfree(obj);
+
+                       break;
+               }
+       case PXP_IOC_CONFIG_CHAN:
+               {
+                       int ret;
+
+                       ret = pxp_ioc_config_chan(file_priv, arg);
+                       if (ret)
+                               return ret;
+
+                       break;
+               }
+       case PXP_IOC_START_CHAN:
+               {
+                       int handle;
+                       struct pxp_chan_obj *obj = NULL;
+
+                       if (get_user(handle, (u32 __user *) arg))
+                               return -EFAULT;
+
+                       obj = pxp_channel_object_lookup(file_priv, handle);
+                       if (!obj)
+                               return -EINVAL;
+
+                       dma_async_issue_pending(obj->chan);
+
+                       break;
+               }
+       case PXP_IOC_GET_PHYMEM:
+               {
+                       struct pxp_mem_desc buffer;
+                       struct pxp_buf_obj *obj;
+
+                       ret = copy_from_user(&buffer,
+                                            (struct pxp_mem_desc *)arg,
+                                            sizeof(struct pxp_mem_desc));
+                       if (ret)
+                               return -EFAULT;
+
+                       pr_debug("[ALLOC] mem alloc size = 0x%x\n",
+                                buffer.size);
+
+                       obj = kzalloc(sizeof(*obj), GFP_KERNEL);
+                       if (!obj)
+                               return -ENOMEM;
+                       obj->size = buffer.size;
+                       obj->mem_type = buffer.mtype;
+
+                       ret = pxp_alloc_dma_buffer(obj);
+                       if (ret == -1) {
+                               printk(KERN_ERR
+                                      "Physical memory allocation error!\n");
+                               kfree(obj);
+                               return ret;
+                       }
+
+                       ret = pxp_buffer_handle_create(file_priv, obj, &obj->handle);
+                       if (ret) {
+                               pxp_free_dma_buffer(obj);
+                               kfree(obj);
+                               return ret;
+                       }
+                       buffer.handle = obj->handle;
+                       buffer.phys_addr = obj->offset;
+
+                       ret = copy_to_user((void __user *)arg, &buffer,
+                                          sizeof(struct pxp_mem_desc));
+                       if (ret) {
+                               pxp_buffer_handle_delete(file_priv, buffer.handle);
+                               pxp_free_dma_buffer(obj);
+                               kfree(obj);
+                               return -EFAULT;
+                       }
+
+                       pxp_ht_insert_item(&bufhash, obj);
+
+                       break;
+               }
+       case PXP_IOC_PUT_PHYMEM:
+               {
+                       struct pxp_mem_desc pxp_mem;
+                       struct pxp_buf_obj *obj;
+
+                       ret = copy_from_user(&pxp_mem,
+                                            (struct pxp_mem_desc *)arg,
+                                            sizeof(struct pxp_mem_desc));
+                       if (ret)
+                               return -EACCES;
+
+                       obj = pxp_buffer_object_lookup(file_priv, pxp_mem.handle);
+                       if (!obj)
+                               return -EINVAL;
+
+                       ret = pxp_buffer_handle_delete(file_priv, obj->handle);
+                       if (ret)
+                               return ret;
+
+                       pxp_ht_remove_item(&bufhash, obj);
+                       pxp_free_dma_buffer(obj);
+                       kfree(obj);
+
+                       break;
+               }
+       case PXP_IOC_FLUSH_PHYMEM:
+               {
+                       int ret;
+                       struct pxp_mem_flush flush;
+                       struct pxp_buf_obj *obj;
+
+                       ret = copy_from_user(&flush,
+                                            (struct pxp_mem_flush *)arg,
+                                            sizeof(struct pxp_mem_flush));
+                       if (ret)
+                               return -EACCES;
+
+                       obj = pxp_buffer_object_lookup(file_priv, flush.handle);
+                       if (!obj)
+                               return -EINVAL;
+
+                       switch (flush.type) {
+                       case CACHE_CLEAN:
+                               dma_sync_single_for_device(NULL, obj->offset,
+                                               obj->size, DMA_TO_DEVICE);
+                               break;
+                       case CACHE_INVALIDATE:
+                               dma_sync_single_for_device(NULL, obj->offset,
+                                               obj->size, DMA_FROM_DEVICE);
+                               break;
+                       case CACHE_FLUSH:
+                               dma_sync_single_for_device(NULL, obj->offset,
+                                               obj->size, DMA_TO_DEVICE);
+                               dma_sync_single_for_device(NULL, obj->offset,
+                                               obj->size, DMA_FROM_DEVICE);
+                               break;
+                       default:
+                               pr_err("%s: invalid cache flush type\n", __func__);
+                               return -EINVAL;
+                       }
+
+                       break;
+               }
+       case PXP_IOC_WAIT4CMPLT:
+               {
+                       struct pxp_chan_handle chan_handle;
+                       int ret, chan_id, handle;
+                       struct pxp_chan_obj *obj = NULL;
+
+                       ret = copy_from_user(&chan_handle,
+                                            (struct pxp_chan_handle *)arg,
+                                            sizeof(struct pxp_chan_handle));
+                       if (ret)
+                               return -EFAULT;
+
+                       handle = chan_handle.handle;
+                       obj = pxp_channel_object_lookup(file_priv, handle);
+                       if (!obj)
+                               return -EINVAL;
+                       chan_id = obj->chan->chan_id;
+
+                       ret = wait_event_interruptible
+                           (irq_info[chan_id].waitq,
+                            (atomic_read(&irq_info[chan_id].irq_pending) == 0));
+                       if (ret < 0)
+                               return -ERESTARTSYS;
+
+                       chan_handle.hist_status = irq_info[chan_id].hist_status;
+                       ret = copy_to_user((struct pxp_chan_handle *)arg,
+                                          &chan_handle,
+                                          sizeof(struct pxp_chan_handle));
+                       if (ret)
+                               return -EFAULT;
+                       break;
+               }
+       default:
+               break;
+       }
+
+       return 0;
+}
+
+static const struct file_operations pxp_device_fops = {
+       .open = pxp_device_open,
+       .release = pxp_device_release,
+       .unlocked_ioctl = pxp_device_ioctl,
+       .mmap = pxp_device_mmap,
+};
+
+static struct miscdevice pxp_device_miscdev = {
+       .minor = MISC_DYNAMIC_MINOR,
+       .name = "pxp_device",
+       .fops = &pxp_device_fops,
+};
+
+int register_pxp_device(void)
+{
+       int ret;
+
+       ret = misc_register(&pxp_device_miscdev);
+       if (ret)
+               return ret;
+
+       ret = pxp_ht_create(&bufhash, BUFFER_HASH_ORDER);
+       if (ret)
+               return ret;
+       spin_lock_init(&(bufhash.hash_lock));
+
+       pr_debug("PxP_Device registered Successfully\n");
+       return 0;
+}
+
+void unregister_pxp_device(void)
+{
+       pxp_ht_destroy(&bufhash);
+       misc_deregister(&pxp_device_miscdev);
+}

diff --git a/drivers/dma/pxp/pxp_dma_v2.c b/drivers/dma/pxp/pxp_dma_v2.c
new file mode 100644 (file)
index 0000000..d9e75b8
--- /dev/null
+++ b/drivers/dma/pxp/pxp_dma_v2.c
@@ -0,0 +1,1858 @@
+/*
+ * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+/*
+ * Based on STMP378X PxP driver
+ * Copyright 2008-2009 Embedded Alley Solutions, Inc All Rights Reserved.
+ */
+
+#include <linux/clk.h>
+#include <linux/dma-mapping.h>
+#include <linux/dmaengine.h>
+#include <linux/freezer.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/kthread.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/pxp_dma.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/timer.h>
+#include <linux/vmalloc.h>
+#include <linux/workqueue.h>
+
+#include "regs-pxp_v2.h"
+
+#define        PXP_DOWNSCALE_THRESHOLD         0x4000
+
+static LIST_HEAD(head);
+static int timeout_in_ms = 600;
+static unsigned int block_size;
+static struct kmem_cache *tx_desc_cache;
+
+struct pxp_dma {
+       struct dma_device dma;
+};
+
+struct pxps {
+       struct platform_device *pdev;
+       struct clk *clk;
+       struct clk *clk_disp_axi;       /* may exist on some SoC for gating */
+       void __iomem *base;
+       int irq;                /* PXP IRQ to the CPU */
+
+       spinlock_t lock;
+       struct mutex clk_mutex;
+       int clk_stat;
+#define        CLK_STAT_OFF            0
+#define        CLK_STAT_ON             1
+       int pxp_ongoing;
+       int lut_state;
+
+       struct device *dev;
+       struct pxp_dma pxp_dma;
+       struct pxp_channel channel[NR_PXP_VIRT_CHANNEL];
+       struct work_struct work;
+
+       /* describes most recent processing configuration */
+       struct pxp_config_data pxp_conf_state;
+
+       /* to turn clock off when pxp is inactive */
+       struct timer_list clk_timer;
+
+       /* for pxp config dispatch asynchronously*/
+       struct task_struct *dispatch;
+       wait_queue_head_t thread_waitq;
+       struct completion complete;
+};
+
+#define to_pxp_dma(d) container_of(d, struct pxp_dma, dma)
+#define to_tx_desc(tx) container_of(tx, struct pxp_tx_desc, txd)
+#define to_pxp_channel(d) container_of(d, struct pxp_channel, dma_chan)
+#define to_pxp(id) container_of(id, struct pxps, pxp_dma)
+
+#define PXP_DEF_BUFS   2
+#define PXP_MIN_PIX    8
+
+/*
+ * PXP common functions
+ */
+static void dump_pxp_reg(struct pxps *pxp)
+{
+       dev_dbg(pxp->dev, "PXP_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CTRL));
+       dev_dbg(pxp->dev, "PXP_STAT 0x%x",
+               __raw_readl(pxp->base + HW_PXP_STAT));
+       dev_dbg(pxp->dev, "PXP_OUT_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_CTRL));
+       dev_dbg(pxp->dev, "PXP_OUT_BUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_BUF));
+       dev_dbg(pxp->dev, "PXP_OUT_BUF2 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_BUF2));
+       dev_dbg(pxp->dev, "PXP_OUT_PITCH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_PITCH));
+       dev_dbg(pxp->dev, "PXP_OUT_LRC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_LRC));
+       dev_dbg(pxp->dev, "PXP_OUT_PS_ULC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_PS_ULC));
+       dev_dbg(pxp->dev, "PXP_OUT_PS_LRC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_PS_LRC));
+       dev_dbg(pxp->dev, "PXP_OUT_AS_ULC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_AS_ULC));
+       dev_dbg(pxp->dev, "PXP_OUT_AS_LRC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_AS_LRC));
+       dev_dbg(pxp->dev, "PXP_PS_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_CTRL));
+       dev_dbg(pxp->dev, "PXP_PS_BUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_BUF));
+       dev_dbg(pxp->dev, "PXP_PS_UBUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_UBUF));
+       dev_dbg(pxp->dev, "PXP_PS_VBUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_VBUF));
+       dev_dbg(pxp->dev, "PXP_PS_PITCH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_PITCH));
+       dev_dbg(pxp->dev, "PXP_PS_BACKGROUND 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_BACKGROUND));
+       dev_dbg(pxp->dev, "PXP_PS_SCALE 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_SCALE));
+       dev_dbg(pxp->dev, "PXP_PS_OFFSET 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_OFFSET));
+       dev_dbg(pxp->dev, "PXP_PS_CLRKEYLOW 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_CLRKEYLOW));
+       dev_dbg(pxp->dev, "PXP_PS_CLRKEYHIGH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_CLRKEYHIGH));
+       dev_dbg(pxp->dev, "PXP_AS_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_CTRL));
+       dev_dbg(pxp->dev, "PXP_AS_BUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_BUF));
+       dev_dbg(pxp->dev, "PXP_AS_PITCH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_PITCH));
+       dev_dbg(pxp->dev, "PXP_AS_CLRKEYLOW 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_CLRKEYLOW));
+       dev_dbg(pxp->dev, "PXP_AS_CLRKEYHIGH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_CLRKEYHIGH));
+       dev_dbg(pxp->dev, "PXP_CSC1_COEF0 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC1_COEF0));
+       dev_dbg(pxp->dev, "PXP_CSC1_COEF1 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC1_COEF1));
+       dev_dbg(pxp->dev, "PXP_CSC1_COEF2 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC1_COEF2));
+       dev_dbg(pxp->dev, "PXP_CSC2_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_CTRL));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF0 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF0));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF1 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF1));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF2 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF2));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF3 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF3));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF4 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF4));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF5 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF5));
+       dev_dbg(pxp->dev, "PXP_LUT_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_LUT_CTRL));
+       dev_dbg(pxp->dev, "PXP_LUT_ADDR 0x%x",
+               __raw_readl(pxp->base + HW_PXP_LUT_ADDR));
+       dev_dbg(pxp->dev, "PXP_LUT_DATA 0x%x",
+               __raw_readl(pxp->base + HW_PXP_LUT_DATA));
+       dev_dbg(pxp->dev, "PXP_LUT_EXTMEM 0x%x",
+               __raw_readl(pxp->base + HW_PXP_LUT_EXTMEM));
+       dev_dbg(pxp->dev, "PXP_CFA 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CFA));
+       dev_dbg(pxp->dev, "PXP_HIST_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_HIST_CTRL));
+       dev_dbg(pxp->dev, "PXP_HIST2_PARAM 0x%x",
+               __raw_readl(pxp->base + HW_PXP_HIST2_PARAM));
+       dev_dbg(pxp->dev, "PXP_HIST4_PARAM 0x%x",
+               __raw_readl(pxp->base + HW_PXP_HIST4_PARAM));
+       dev_dbg(pxp->dev, "PXP_HIST8_PARAM0 0x%x",
+               __raw_readl(pxp->base + HW_PXP_HIST8_PARAM0));
+       dev_dbg(pxp->dev, "PXP_HIST8_PARAM1 0x%x",
+               __raw_readl(pxp->base + HW_PXP_HIST8_PARAM1));
+       dev_dbg(pxp->dev, "PXP_HIST16_PARAM0 0x%x",
+               __raw_readl(pxp->base + HW_PXP_HIST16_PARAM0));
+       dev_dbg(pxp->dev, "PXP_HIST16_PARAM1 0x%x",
+               __raw_readl(pxp->base + HW_PXP_HIST16_PARAM1));
+       dev_dbg(pxp->dev, "PXP_HIST16_PARAM2 0x%x",
+               __raw_readl(pxp->base + HW_PXP_HIST16_PARAM2));
+       dev_dbg(pxp->dev, "PXP_HIST16_PARAM3 0x%x",
+               __raw_readl(pxp->base + HW_PXP_HIST16_PARAM3));
+       dev_dbg(pxp->dev, "PXP_POWER 0x%x",
+               __raw_readl(pxp->base + HW_PXP_POWER));
+       dev_dbg(pxp->dev, "PXP_NEXT 0x%x",
+               __raw_readl(pxp->base + HW_PXP_NEXT));
+       dev_dbg(pxp->dev, "PXP_DEBUGCTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_DEBUGCTRL));
+       dev_dbg(pxp->dev, "PXP_DEBUG 0x%x",
+               __raw_readl(pxp->base + HW_PXP_DEBUG));
+       dev_dbg(pxp->dev, "PXP_VERSION 0x%x",
+               __raw_readl(pxp->base + HW_PXP_VERSION));
+}
+
+static bool is_yuv(u32 pix_fmt)
+{
+       if ((pix_fmt == PXP_PIX_FMT_YUYV) |
+           (pix_fmt == PXP_PIX_FMT_UYVY) |
+           (pix_fmt == PXP_PIX_FMT_YVYU) |
+           (pix_fmt == PXP_PIX_FMT_VYUY) |
+           (pix_fmt == PXP_PIX_FMT_Y41P) |
+           (pix_fmt == PXP_PIX_FMT_VUY444) |
+           (pix_fmt == PXP_PIX_FMT_NV12) |
+           (pix_fmt == PXP_PIX_FMT_NV21) |
+           (pix_fmt == PXP_PIX_FMT_NV16) |
+           (pix_fmt == PXP_PIX_FMT_NV61) |
+           (pix_fmt == PXP_PIX_FMT_GREY) |
+           (pix_fmt == PXP_PIX_FMT_GY04) |
+           (pix_fmt == PXP_PIX_FMT_YVU410P) |
+           (pix_fmt == PXP_PIX_FMT_YUV410P) |
+           (pix_fmt == PXP_PIX_FMT_YVU420P) |
+           (pix_fmt == PXP_PIX_FMT_YUV420P) |
+           (pix_fmt == PXP_PIX_FMT_YUV420P2) |
+           (pix_fmt == PXP_PIX_FMT_YVU422P) |
+           (pix_fmt == PXP_PIX_FMT_YUV422P)) {
+               return true;
+       } else {
+               return false;
+       }
+}
+
+static void pxp_soft_reset(struct pxps *pxp)
+{
+       __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL_CLR);
+       __raw_writel(BM_PXP_CTRL_CLKGATE, pxp->base + HW_PXP_CTRL_CLR);
+
+       __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL_SET);
+       while (!(__raw_readl(pxp->base + HW_PXP_CTRL) & BM_PXP_CTRL_CLKGATE))
+               dev_dbg(pxp->dev, "%s: wait for clock gate off", __func__);
+
+       __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL_CLR);
+       __raw_writel(BM_PXP_CTRL_CLKGATE, pxp->base + HW_PXP_CTRL_CLR);
+}
+
+static void pxp_set_ctrl(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+       u32 ctrl;
+       u32 fmt_ctrl;
+       int need_swap = 0;   /* to support YUYV and YVYU formats */
+
+       /* Configure S0 input format */
+       switch (pxp_conf->s0_param.pixel_fmt) {
+       case PXP_PIX_FMT_RGB32:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__RGB888;
+               break;
+       case PXP_PIX_FMT_RGB565:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__RGB565;
+               break;
+       case PXP_PIX_FMT_RGB555:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__RGB555;
+               break;
+       case PXP_PIX_FMT_YUV420P:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV420;
+               break;
+       case PXP_PIX_FMT_YVU420P:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV420;
+               break;
+       case PXP_PIX_FMT_GREY:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__Y8;
+               break;
+       case PXP_PIX_FMT_GY04:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__Y4;
+               break;
+       case PXP_PIX_FMT_VUY444:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV1P444;
+               break;
+       case PXP_PIX_FMT_YUV422P:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV422;
+               break;
+       case PXP_PIX_FMT_UYVY:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__UYVY1P422;
+               break;
+       case PXP_PIX_FMT_YUYV:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__UYVY1P422;
+               need_swap = 1;
+               break;
+       case PXP_PIX_FMT_VYUY:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__VYUY1P422;
+               break;
+       case PXP_PIX_FMT_YVYU:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__VYUY1P422;
+               need_swap = 1;
+               break;
+       case PXP_PIX_FMT_NV12:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV2P420;
+               break;
+       case PXP_PIX_FMT_NV21:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YVU2P420;
+               break;
+       case PXP_PIX_FMT_NV16:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV2P422;
+               break;
+       case PXP_PIX_FMT_NV61:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YVU2P422;
+               break;
+       default:
+               fmt_ctrl = 0;
+       }
+
+       ctrl = BF_PXP_PS_CTRL_FORMAT(fmt_ctrl) | BF_PXP_PS_CTRL_SWAP(need_swap);
+       __raw_writel(ctrl, pxp->base + HW_PXP_PS_CTRL_SET);
+
+       /* Configure output format based on out_channel format */
+       switch (pxp_conf->out_param.pixel_fmt) {
+       case PXP_PIX_FMT_RGB32:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__RGB888;
+               break;
+       case PXP_PIX_FMT_BGRA32:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__ARGB8888;
+               break;
+       case PXP_PIX_FMT_RGB24:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__RGB888P;
+               break;
+       case PXP_PIX_FMT_RGB565:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__RGB565;
+               break;
+       case PXP_PIX_FMT_RGB555:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__RGB555;
+               break;
+       case PXP_PIX_FMT_GREY:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__Y8;
+               break;
+       case PXP_PIX_FMT_GY04:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__Y4;
+               break;
+       case PXP_PIX_FMT_UYVY:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__UYVY1P422;
+               break;
+       case PXP_PIX_FMT_VYUY:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__VYUY1P422;
+               break;
+       case PXP_PIX_FMT_NV12:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__YUV2P420;
+               break;
+       case PXP_PIX_FMT_NV21:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__YVU2P420;
+               break;
+       case PXP_PIX_FMT_NV16:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__YUV2P422;
+               break;
+       case PXP_PIX_FMT_NV61:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__YVU2P422;
+               break;
+       default:
+               fmt_ctrl = 0;
+       }
+
+       ctrl = BF_PXP_OUT_CTRL_FORMAT(fmt_ctrl);
+       __raw_writel(ctrl, pxp->base + HW_PXP_OUT_CTRL);
+
+       ctrl = 0;
+       if (proc_data->scaling)
+               ;
+       if (proc_data->vflip)
+               ctrl |= BM_PXP_CTRL_VFLIP;
+       if (proc_data->hflip)
+               ctrl |= BM_PXP_CTRL_HFLIP;
+       if (proc_data->rotate)
+               ctrl |= BF_PXP_CTRL_ROTATE(proc_data->rotate / 90);
+
+       /* In default, the block size is set to 8x8
+        * But block size can be set to 16x16 due to
+        * blocksize variable modification
+        */
+       ctrl |= block_size << 23;
+
+       __raw_writel(ctrl, pxp->base + HW_PXP_CTRL);
+}
+
+static int pxp_start(struct pxps *pxp)
+{
+       __raw_writel(BM_PXP_CTRL_IRQ_ENABLE, pxp->base + HW_PXP_CTRL_SET);
+       __raw_writel(BM_PXP_CTRL_ENABLE, pxp->base + HW_PXP_CTRL_SET);
+       dump_pxp_reg(pxp);
+
+       return 0;
+}
+
+static void pxp_set_outbuf(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *out_params = &pxp_conf->out_param;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+
+       __raw_writel(out_params->paddr, pxp->base + HW_PXP_OUT_BUF);
+
+       if ((out_params->pixel_fmt == PXP_PIX_FMT_NV12) ||
+               (out_params->pixel_fmt == PXP_PIX_FMT_NV21) ||
+               (out_params->pixel_fmt == PXP_PIX_FMT_NV16) ||
+               (out_params->pixel_fmt == PXP_PIX_FMT_NV61)) {
+               dma_addr_t Y, U;
+
+               Y = out_params->paddr;
+               U = Y + (out_params->width * out_params->height);
+
+               __raw_writel(U, pxp->base + HW_PXP_OUT_BUF2);
+       }
+
+       if (proc_data->rotate == 90 || proc_data->rotate == 270)
+               __raw_writel(BF_PXP_OUT_LRC_X(out_params->height - 1) |
+                               BF_PXP_OUT_LRC_Y(out_params->width - 1),
+                               pxp->base + HW_PXP_OUT_LRC);
+       else
+               __raw_writel(BF_PXP_OUT_LRC_X(out_params->width - 1) |
+                               BF_PXP_OUT_LRC_Y(out_params->height - 1),
+                               pxp->base + HW_PXP_OUT_LRC);
+
+       if (out_params->pixel_fmt == PXP_PIX_FMT_RGB24) {
+               __raw_writel(out_params->stride * 3,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if (out_params->pixel_fmt == PXP_PIX_FMT_BGRA32 ||
+               out_params->pixel_fmt == PXP_PIX_FMT_RGB32) {
+               __raw_writel(out_params->stride << 2,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if ((out_params->pixel_fmt == PXP_PIX_FMT_RGB565) ||
+                  (out_params->pixel_fmt == PXP_PIX_FMT_RGB555)) {
+               __raw_writel(out_params->stride << 1,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if (out_params->pixel_fmt == PXP_PIX_FMT_UYVY ||
+               (out_params->pixel_fmt == PXP_PIX_FMT_VYUY)) {
+               __raw_writel(out_params->stride << 1,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if (out_params->pixel_fmt == PXP_PIX_FMT_GREY ||
+                  out_params->pixel_fmt == PXP_PIX_FMT_NV12 ||
+                  out_params->pixel_fmt == PXP_PIX_FMT_NV21 ||
+                  out_params->pixel_fmt == PXP_PIX_FMT_NV16 ||
+                  out_params->pixel_fmt == PXP_PIX_FMT_NV61) {
+               __raw_writel(out_params->stride,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if (out_params->pixel_fmt == PXP_PIX_FMT_GY04) {
+               __raw_writel(out_params->stride >> 1,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else {
+               __raw_writel(0, pxp->base + HW_PXP_OUT_PITCH);
+       }
+
+       /* set global alpha if necessary */
+       if (out_params->global_alpha_enable) {
+               __raw_writel(out_params->global_alpha << 24,
+                               pxp->base + HW_PXP_OUT_CTRL_SET);
+               __raw_writel(BM_PXP_OUT_CTRL_ALPHA_OUTPUT,
+                               pxp->base + HW_PXP_OUT_CTRL_SET);
+       }
+}
+
+static void pxp_set_s0colorkey(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *s0_params = &pxp_conf->s0_param;
+
+       /* Low and high are set equal. V4L does not allow a chromakey range */
+       if (s0_params->color_key_enable == 0 || s0_params->color_key == -1) {
+               /* disable color key */
+               __raw_writel(0xFFFFFF, pxp->base + HW_PXP_PS_CLRKEYLOW);
+               __raw_writel(0, pxp->base + HW_PXP_PS_CLRKEYHIGH);
+       } else {
+               __raw_writel(s0_params->color_key,
+                            pxp->base + HW_PXP_PS_CLRKEYLOW);
+               __raw_writel(s0_params->color_key,
+                            pxp->base + HW_PXP_PS_CLRKEYHIGH);
+       }
+}
+
+static void pxp_set_olcolorkey(int layer_no, struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *ol_params = &pxp_conf->ol_param[layer_no];
+
+       /* Low and high are set equal. V4L does not allow a chromakey range */
+       if (ol_params->color_key_enable != 0 && ol_params->color_key != -1) {
+               __raw_writel(ol_params->color_key,
+                            pxp->base + HW_PXP_AS_CLRKEYLOW);
+               __raw_writel(ol_params->color_key,
+                            pxp->base + HW_PXP_AS_CLRKEYHIGH);
+       } else {
+               /* disable color key */
+               __raw_writel(0xFFFFFF, pxp->base + HW_PXP_AS_CLRKEYLOW);
+               __raw_writel(0, pxp->base + HW_PXP_AS_CLRKEYHIGH);
+       }
+}
+
+static void pxp_set_oln(int layer_no, struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *olparams_data = &pxp_conf->ol_param[layer_no];
+       dma_addr_t phys_addr = olparams_data->paddr;
+       u32 pitch = olparams_data->stride ? olparams_data->stride :
+                                           olparams_data->width;
+
+       __raw_writel(phys_addr, pxp->base + HW_PXP_AS_BUF);
+
+       /* Fixme */
+       if (olparams_data->width == 0 && olparams_data->height == 0) {
+               __raw_writel(0xffffffff, pxp->base + HW_PXP_OUT_AS_ULC);
+               __raw_writel(0x0, pxp->base + HW_PXP_OUT_AS_LRC);
+       } else {
+               __raw_writel(0x0, pxp->base + HW_PXP_OUT_AS_ULC);
+               __raw_writel(BF_PXP_OUT_AS_LRC_X(olparams_data->width - 1) |
+                               BF_PXP_OUT_AS_LRC_Y(olparams_data->height - 1),
+                               pxp->base + HW_PXP_OUT_AS_LRC);
+       }
+
+       if ((olparams_data->pixel_fmt == PXP_PIX_FMT_BGRA32) ||
+                (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB32)) {
+               __raw_writel(pitch << 2,
+                               pxp->base + HW_PXP_AS_PITCH);
+       } else if ((olparams_data->pixel_fmt == PXP_PIX_FMT_RGB565) ||
+                  (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB555)) {
+               __raw_writel(pitch << 1,
+                               pxp->base + HW_PXP_AS_PITCH);
+       } else {
+               __raw_writel(0, pxp->base + HW_PXP_AS_PITCH);
+       }
+}
+
+static void pxp_set_olparam(int layer_no, struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *olparams_data = &pxp_conf->ol_param[layer_no];
+       u32 olparam;
+
+       olparam = BF_PXP_AS_CTRL_ALPHA(olparams_data->global_alpha);
+       if (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB32) {
+               olparam |=
+                   BF_PXP_AS_CTRL_FORMAT(BV_PXP_AS_CTRL_FORMAT__RGB888);
+       } else if (olparams_data->pixel_fmt == PXP_PIX_FMT_BGRA32) {
+               olparam |=
+                   BF_PXP_AS_CTRL_FORMAT(BV_PXP_AS_CTRL_FORMAT__ARGB8888);
+               if (!olparams_data->combine_enable) {
+                       olparam |=
+                               BF_PXP_AS_CTRL_ALPHA_CTRL
+                               (BV_PXP_AS_CTRL_ALPHA_CTRL__ROPs);
+                       olparam |= 0x3 << 16;
+               }
+       } else if (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB565) {
+               olparam |=
+                   BF_PXP_AS_CTRL_FORMAT(BV_PXP_AS_CTRL_FORMAT__RGB565);
+       } else if (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB555) {
+               olparam |=
+                   BF_PXP_AS_CTRL_FORMAT(BV_PXP_AS_CTRL_FORMAT__RGB555);
+       }
+
+       if (olparams_data->global_alpha_enable) {
+               if (olparams_data->global_override) {
+                       olparam |=
+                               BF_PXP_AS_CTRL_ALPHA_CTRL
+                               (BV_PXP_AS_CTRL_ALPHA_CTRL__Override);
+               } else {
+                       olparam |=
+                               BF_PXP_AS_CTRL_ALPHA_CTRL
+                               (BV_PXP_AS_CTRL_ALPHA_CTRL__Multiply);
+               }
+               if (olparams_data->alpha_invert)
+                       olparam |= BM_PXP_AS_CTRL_ALPHA_INVERT;
+       }
+       if (olparams_data->color_key_enable)
+               olparam |= BM_PXP_AS_CTRL_ENABLE_COLORKEY;
+
+       __raw_writel(olparam, pxp->base + HW_PXP_AS_CTRL);
+}
+
+static void pxp_set_s0param(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+       struct pxp_layer_param *out_params = &pxp_conf->out_param;
+       u32 s0param_ulc, s0param_lrc;
+
+       /* contains the coordinate for the PS in the OUTPUT buffer. */
+       if ((pxp_conf->s0_param).width == 0 &&
+               (pxp_conf->s0_param).height == 0) {
+               __raw_writel(0xffffffff, pxp->base + HW_PXP_OUT_PS_ULC);
+               __raw_writel(0x0, pxp->base + HW_PXP_OUT_PS_LRC);
+       } else {
+               switch (proc_data->rotate) {
+               case 0:
+                       s0param_ulc = BF_PXP_OUT_PS_ULC_X(proc_data->drect.left);
+                       s0param_ulc |= BF_PXP_OUT_PS_ULC_Y(proc_data->drect.top);
+                       s0param_lrc = BF_PXP_OUT_PS_LRC_X(((s0param_ulc & BM_PXP_OUT_PS_ULC_X) >> 16) + proc_data->drect.width - 1);
+                       s0param_lrc |= BF_PXP_OUT_PS_LRC_Y((s0param_ulc & BM_PXP_OUT_PS_ULC_Y) + proc_data->drect.height - 1);
+                       break;
+               case 90:
+                       s0param_ulc = BF_PXP_OUT_PS_ULC_Y(out_params->width - (proc_data->drect.left + proc_data->drect.width));
+                       s0param_ulc |= BF_PXP_OUT_PS_ULC_X(proc_data->drect.top);
+                       s0param_lrc = BF_PXP_OUT_PS_LRC_X(((s0param_ulc & BM_PXP_OUT_PS_ULC_X) >> 16) + proc_data->drect.height - 1);
+                       s0param_lrc |= BF_PXP_OUT_PS_LRC_Y((s0param_ulc & BM_PXP_OUT_PS_ULC_Y) + proc_data->drect.width - 1);
+                       break;
+               case 180:
+                       s0param_ulc = BF_PXP_OUT_PS_ULC_X(out_params->width - (proc_data->drect.left + proc_data->drect.width));
+                       s0param_ulc |= BF_PXP_OUT_PS_ULC_Y(out_params->height - (proc_data->drect.top + proc_data->drect.height));
+                       s0param_lrc = BF_PXP_OUT_PS_LRC_X(((s0param_ulc & BM_PXP_OUT_PS_ULC_X) >> 16) + proc_data->drect.width - 1);
+                       s0param_lrc |= BF_PXP_OUT_PS_LRC_Y((s0param_ulc & BM_PXP_OUT_PS_ULC_Y) + proc_data->drect.height - 1);
+                       break;
+               case 270:
+                       s0param_ulc = BF_PXP_OUT_PS_ULC_X(out_params->height - (proc_data->drect.top + proc_data->drect.height));
+                       s0param_ulc |= BF_PXP_OUT_PS_ULC_Y(proc_data->drect.left);
+                       s0param_lrc = BF_PXP_OUT_PS_LRC_X(((s0param_ulc & BM_PXP_OUT_PS_ULC_X) >> 16) + proc_data->drect.height - 1);
+                       s0param_lrc |= BF_PXP_OUT_PS_LRC_Y((s0param_ulc & BM_PXP_OUT_PS_ULC_Y) + proc_data->drect.width - 1);
+                       break;
+               default:
+                       return;
+               }
+               __raw_writel(s0param_ulc, pxp->base + HW_PXP_OUT_PS_ULC);
+               __raw_writel(s0param_lrc, pxp->base + HW_PXP_OUT_PS_LRC);
+       }
+
+       /* Since user apps always pass the rotated drect
+        * to this driver, we need to first swap the width
+        * and height which is used to calculate the scale
+        * factors later.
+        */
+       if (proc_data->rotate == 90 || proc_data->rotate == 270) {
+               int temp;
+               temp = proc_data->drect.width;
+               proc_data->drect.width = proc_data->drect.height;
+               proc_data->drect.height = temp;
+       }
+}
+
+/* crop behavior is re-designed in h/w. */
+static void pxp_set_s0crop(struct pxps *pxp)
+{
+       /*
+        * place-holder, it's implemented in other functions in this driver.
+        * Refer to "Clipping source images" section in RM for detail.
+        */
+}
+
+static int pxp_set_scaling(struct pxps *pxp)
+{
+       int ret = 0;
+       u32 xscale, yscale, s0scale;
+       u32 decx, decy, xdec = 0, ydec = 0;
+       struct pxp_proc_data *proc_data = &pxp->pxp_conf_state.proc_data;
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *s0_params = &pxp_conf->s0_param;
+       struct pxp_layer_param *out_params = &pxp_conf->out_param;
+
+       proc_data->scaling = 1;
+       decx = proc_data->srect.width / proc_data->drect.width;
+       decy = proc_data->srect.height / proc_data->drect.height;
+       if (decx > 1) {
+               if (decx >= 2 && decx < 4) {
+                       decx = 2;
+                       xdec = 1;
+               } else if (decx >= 4 && decx < 8) {
+                       decx = 4;
+                       xdec = 2;
+               } else if (decx >= 8) {
+                       decx = 8;
+                       xdec = 3;
+               }
+               xscale = proc_data->srect.width * 0x1000 /
+                        (proc_data->drect.width * decx);
+       } else {
+               if (!is_yuv(s0_params->pixel_fmt) ||
+                   (is_yuv(s0_params->pixel_fmt) ==
+                    is_yuv(out_params->pixel_fmt)) ||
+                   (s0_params->pixel_fmt == PXP_PIX_FMT_GREY) ||
+                   (s0_params->pixel_fmt == PXP_PIX_FMT_GY04) ||
+                   (s0_params->pixel_fmt == PXP_PIX_FMT_VUY444)) {
+                       if ((proc_data->srect.width > 1) &&
+                           (proc_data->drect.width > 1))
+                               xscale = (proc_data->srect.width - 1) * 0x1000 /
+                                        (proc_data->drect.width - 1);
+                       else
+                               xscale = proc_data->srect.width * 0x1000 /
+                                        proc_data->drect.width;
+               } else {
+                       if ((proc_data->srect.width > 2) &&
+                           (proc_data->drect.width > 1))
+                               xscale = (proc_data->srect.width - 2) * 0x1000 /
+                                        (proc_data->drect.width - 1);
+                       else
+                               xscale = proc_data->srect.width * 0x1000 /
+                                        proc_data->drect.width;
+               }
+       }
+       if (decy > 1) {
+               if (decy >= 2 && decy < 4) {
+                       decy = 2;
+                       ydec = 1;
+               } else if (decy >= 4 && decy < 8) {
+                       decy = 4;
+                       ydec = 2;
+               } else if (decy >= 8) {
+                       decy = 8;
+                       ydec = 3;
+               }
+               yscale = proc_data->srect.height * 0x1000 /
+                        (proc_data->drect.height * decy);
+       } else {
+               if ((proc_data->srect.height > 1) &&
+                   (proc_data->drect.height > 1))
+                       yscale = (proc_data->srect.height - 1) * 0x1000 /
+                                (proc_data->drect.height - 1);
+               else
+                       yscale = proc_data->srect.height * 0x1000 /
+                                proc_data->drect.height;
+       }
+
+       __raw_writel((xdec << 10) | (ydec << 8), pxp->base + HW_PXP_PS_CTRL);
+
+       if (xscale > PXP_DOWNSCALE_THRESHOLD)
+               xscale = PXP_DOWNSCALE_THRESHOLD;
+       if (yscale > PXP_DOWNSCALE_THRESHOLD)
+               yscale = PXP_DOWNSCALE_THRESHOLD;
+       s0scale = BF_PXP_PS_SCALE_YSCALE(yscale) |
+               BF_PXP_PS_SCALE_XSCALE(xscale);
+       __raw_writel(s0scale, pxp->base + HW_PXP_PS_SCALE);
+
+       pxp_set_ctrl(pxp);
+
+       return ret;
+}
+
+static void pxp_set_bg(struct pxps *pxp)
+{
+       __raw_writel(pxp->pxp_conf_state.proc_data.bgcolor,
+                    pxp->base + HW_PXP_PS_BACKGROUND);
+}
+
+static void pxp_set_lut(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       int lut_op = pxp_conf->proc_data.lut_transform;
+       u32 reg_val;
+       int i;
+       bool use_cmap = (lut_op & PXP_LUT_USE_CMAP) ? true : false;
+       u8 *cmap = pxp_conf->proc_data.lut_map;
+       u32 entry_src;
+       u32 pix_val;
+       u8 entry[4];
+
+       /*
+        * If LUT already configured as needed, return...
+        * Unless CMAP is needed and it has been updated.
+        */
+       if ((pxp->lut_state == lut_op) &&
+               !(use_cmap && pxp_conf->proc_data.lut_map_updated))
+               return;
+
+       if (lut_op == PXP_LUT_NONE) {
+               __raw_writel(BM_PXP_LUT_CTRL_BYPASS,
+                            pxp->base + HW_PXP_LUT_CTRL);
+       } else if (((lut_op & PXP_LUT_INVERT) != 0)
+               && ((lut_op & PXP_LUT_BLACK_WHITE) != 0)) {
+               /* Fill out LUT table with inverted monochromized values */
+
+               /* clear bypass bit, set lookup mode & out mode */
+               __raw_writel(BF_PXP_LUT_CTRL_LOOKUP_MODE
+                               (BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8) |
+                               BF_PXP_LUT_CTRL_OUT_MODE
+                               (BV_PXP_LUT_CTRL_OUT_MODE__Y8),
+                               pxp->base + HW_PXP_LUT_CTRL);
+
+               /* Initialize LUT address to 0 and set NUM_BYTES to 0 */
+               __raw_writel(0, pxp->base + HW_PXP_LUT_ADDR);
+
+               /* LUT address pointer auto-increments after each data write */
+               for (pix_val = 0; pix_val < 256; pix_val += 4) {
+                       for (i = 0; i < 4; i++) {
+                               entry_src = use_cmap ?
+                                       cmap[pix_val + i] : pix_val + i;
+                               entry[i] = (entry_src < 0x80) ? 0xFF : 0x00;
+                       }
+                       reg_val = (entry[3] << 24) | (entry[2] << 16) |
+                               (entry[1] << 8) | entry[0];
+                       __raw_writel(reg_val, pxp->base + HW_PXP_LUT_DATA);
+               }
+       } else if ((lut_op & PXP_LUT_INVERT) != 0) {
+               /* Fill out LUT table with 8-bit inverted values */
+
+               /* clear bypass bit, set lookup mode & out mode */
+               __raw_writel(BF_PXP_LUT_CTRL_LOOKUP_MODE
+                               (BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8) |
+                               BF_PXP_LUT_CTRL_OUT_MODE
+                               (BV_PXP_LUT_CTRL_OUT_MODE__Y8),
+                               pxp->base + HW_PXP_LUT_CTRL);
+
+               /* Initialize LUT address to 0 and set NUM_BYTES to 0 */
+               __raw_writel(0, pxp->base + HW_PXP_LUT_ADDR);
+
+               /* LUT address pointer auto-increments after each data write */
+               for (pix_val = 0; pix_val < 256; pix_val += 4) {
+                       for (i = 0; i < 4; i++) {
+                               entry_src = use_cmap ?
+                                       cmap[pix_val + i] : pix_val + i;
+                               entry[i] = ~entry_src & 0xFF;
+                       }
+                       reg_val = (entry[3] << 24) | (entry[2] << 16) |
+                               (entry[1] << 8) | entry[0];
+                       __raw_writel(reg_val, pxp->base + HW_PXP_LUT_DATA);
+               }
+       } else if ((lut_op & PXP_LUT_BLACK_WHITE) != 0) {
+               /* Fill out LUT table with 8-bit monochromized values */
+
+               /* clear bypass bit, set lookup mode & out mode */
+               __raw_writel(BF_PXP_LUT_CTRL_LOOKUP_MODE
+                               (BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8) |
+                               BF_PXP_LUT_CTRL_OUT_MODE
+                               (BV_PXP_LUT_CTRL_OUT_MODE__Y8),
+                               pxp->base + HW_PXP_LUT_CTRL);
+
+               /* Initialize LUT address to 0 and set NUM_BYTES to 0 */
+               __raw_writel(0, pxp->base + HW_PXP_LUT_ADDR);
+
+               /* LUT address pointer auto-increments after each data write */
+               for (pix_val = 0; pix_val < 256; pix_val += 4) {
+                       for (i = 0; i < 4; i++) {
+                               entry_src = use_cmap ?
+                                       cmap[pix_val + i] : pix_val + i;
+                               entry[i] = (entry_src < 0x80) ? 0x00 : 0xFF;
+                       }
+                       reg_val = (entry[3] << 24) | (entry[2] << 16) |
+                               (entry[1] << 8) | entry[0];
+                       __raw_writel(reg_val, pxp->base + HW_PXP_LUT_DATA);
+               }
+       } else if (use_cmap) {
+               /* Fill out LUT table using colormap values */
+
+               /* clear bypass bit, set lookup mode & out mode */
+               __raw_writel(BF_PXP_LUT_CTRL_LOOKUP_MODE
+                               (BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8) |
+                               BF_PXP_LUT_CTRL_OUT_MODE
+                               (BV_PXP_LUT_CTRL_OUT_MODE__Y8),
+                               pxp->base + HW_PXP_LUT_CTRL);
+
+               /* Initialize LUT address to 0 and set NUM_BYTES to 0 */
+               __raw_writel(0, pxp->base + HW_PXP_LUT_ADDR);
+
+               /* LUT address pointer auto-increments after each data write */
+               for (pix_val = 0; pix_val < 256; pix_val += 4) {
+                       for (i = 0; i < 4; i++)
+                               entry[i] = cmap[pix_val + i];
+                       reg_val = (entry[3] << 24) | (entry[2] << 16) |
+                               (entry[1] << 8) | entry[0];
+                       __raw_writel(reg_val, pxp->base + HW_PXP_LUT_DATA);
+               }
+       }
+
+       pxp->lut_state = lut_op;
+}
+
+static void pxp_set_csc(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *s0_params = &pxp_conf->s0_param;
+       struct pxp_layer_param *ol_params = &pxp_conf->ol_param[0];
+       struct pxp_layer_param *out_params = &pxp_conf->out_param;
+
+       bool input_is_YUV = is_yuv(s0_params->pixel_fmt);
+       bool output_is_YUV = is_yuv(out_params->pixel_fmt);
+
+       if (input_is_YUV && output_is_YUV) {
+               /*
+                * Input = YUV, Output = YUV
+                * No CSC unless we need to do combining
+                */
+               if (ol_params->combine_enable) {
+                       /* Must convert to RGB for combining with RGB overlay */
+
+                       /* CSC1 - YUV->RGB */
+                       __raw_writel(0x04030000, pxp->base + HW_PXP_CSC1_COEF0);
+                       __raw_writel(0x01230208, pxp->base + HW_PXP_CSC1_COEF1);
+                       __raw_writel(0x076b079c, pxp->base + HW_PXP_CSC1_COEF2);
+
+                       /* CSC2 - RGB->YUV */
+                       __raw_writel(0x4, pxp->base + HW_PXP_CSC2_CTRL);
+                       __raw_writel(0x0096004D, pxp->base + HW_PXP_CSC2_COEF0);
+                       __raw_writel(0x05DA001D, pxp->base + HW_PXP_CSC2_COEF1);
+                       __raw_writel(0x007005B6, pxp->base + HW_PXP_CSC2_COEF2);
+                       __raw_writel(0x057C009E, pxp->base + HW_PXP_CSC2_COEF3);
+                       __raw_writel(0x000005E6, pxp->base + HW_PXP_CSC2_COEF4);
+                       __raw_writel(0x00000000, pxp->base + HW_PXP_CSC2_COEF5);
+               } else {
+                       /* Input & Output both YUV, so bypass both CSCs */
+
+                       /* CSC1 - Bypass */
+                       __raw_writel(0x40000000, pxp->base + HW_PXP_CSC1_COEF0);
+
+                       /* CSC2 - Bypass */
+                       __raw_writel(0x1, pxp->base + HW_PXP_CSC2_CTRL);
+               }
+       } else if (input_is_YUV && !output_is_YUV) {
+               /*
+                * Input = YUV, Output = RGB
+                * Use CSC1 to convert to RGB
+                */
+
+               /* CSC1 - YUV->RGB */
+               __raw_writel(0x84ab01f0, pxp->base + HW_PXP_CSC1_COEF0);
+               __raw_writel(0x01980204, pxp->base + HW_PXP_CSC1_COEF1);
+               __raw_writel(0x0730079c, pxp->base + HW_PXP_CSC1_COEF2);
+
+               /* CSC2 - Bypass */
+               __raw_writel(0x1, pxp->base + HW_PXP_CSC2_CTRL);
+       } else if (!input_is_YUV && output_is_YUV) {
+               /*
+                * Input = RGB, Output = YUV
+                * Use CSC2 to convert to YUV
+                */
+
+               /* CSC1 - Bypass */
+               __raw_writel(0x40000000, pxp->base + HW_PXP_CSC1_COEF0);
+
+               /* CSC2 - RGB->YUV */
+               __raw_writel(0x4, pxp->base + HW_PXP_CSC2_CTRL);
+               __raw_writel(0x0096004D, pxp->base + HW_PXP_CSC2_COEF0);
+               __raw_writel(0x05DA001D, pxp->base + HW_PXP_CSC2_COEF1);
+               __raw_writel(0x007005B6, pxp->base + HW_PXP_CSC2_COEF2);
+               __raw_writel(0x057C009E, pxp->base + HW_PXP_CSC2_COEF3);
+               __raw_writel(0x000005E6, pxp->base + HW_PXP_CSC2_COEF4);
+               __raw_writel(0x00000000, pxp->base + HW_PXP_CSC2_COEF5);
+       } else {
+               /*
+                * Input = RGB, Output = RGB
+                * Input & Output both RGB, so bypass both CSCs
+                */
+
+               /* CSC1 - Bypass */
+               __raw_writel(0x40000000, pxp->base + HW_PXP_CSC1_COEF0);
+
+               /* CSC2 - Bypass */
+               __raw_writel(0x1, pxp->base + HW_PXP_CSC2_CTRL);
+       }
+
+       /* YCrCb colorspace */
+       /* Not sure when we use this...no YCrCb formats are defined for PxP */
+       /*
+          __raw_writel(0x84ab01f0, HW_PXP_CSCCOEFF0_ADDR);
+          __raw_writel(0x01230204, HW_PXP_CSCCOEFF1_ADDR);
+          __raw_writel(0x0730079c, HW_PXP_CSCCOEFF2_ADDR);
+        */
+
+}
+
+static void pxp_set_s0buf(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *s0_params = &pxp_conf->s0_param;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+       dma_addr_t Y, U, V;
+       dma_addr_t Y1, U1, V1;
+       u32 offset, bpp = 1;
+       u32 pitch = s0_params->stride ? s0_params->stride :
+                                       s0_params->width;
+
+       Y = s0_params->paddr;
+
+       if ((s0_params->pixel_fmt == PXP_PIX_FMT_RGB565) ||
+               (s0_params->pixel_fmt == PXP_PIX_FMT_RGB555))
+               bpp = 2;
+       else if (s0_params->pixel_fmt == PXP_PIX_FMT_RGB32)
+               bpp = 4;
+       offset = (proc_data->srect.top * s0_params->width +
+                proc_data->srect.left) * bpp;
+       /* clipping or cropping */
+       Y1 = Y + offset;
+       __raw_writel(Y1, pxp->base + HW_PXP_PS_BUF);
+       if ((s0_params->pixel_fmt == PXP_PIX_FMT_YUV420P) ||
+           (s0_params->pixel_fmt == PXP_PIX_FMT_YVU420P) ||
+           (s0_params->pixel_fmt == PXP_PIX_FMT_GREY)    ||
+           (s0_params->pixel_fmt == PXP_PIX_FMT_YUV422P)) {
+               /* Set to 1 if YUV format is 4:2:2 rather than 4:2:0 */
+               int s = 2;
+               if (s0_params->pixel_fmt == PXP_PIX_FMT_YUV422P)
+                       s = 1;
+
+               offset = proc_data->srect.top * s0_params->width / 4 +
+                        proc_data->srect.left / 2;
+               U = Y + (s0_params->width * s0_params->height);
+               U1 = U + offset;
+               V = U + ((s0_params->width * s0_params->height) >> s);
+               V1 = V + offset;
+               if (s0_params->pixel_fmt == PXP_PIX_FMT_YVU420P) {
+                       __raw_writel(V1, pxp->base + HW_PXP_PS_UBUF);
+                       __raw_writel(U1, pxp->base + HW_PXP_PS_VBUF);
+               } else {
+                       __raw_writel(U1, pxp->base + HW_PXP_PS_UBUF);
+                       __raw_writel(V1, pxp->base + HW_PXP_PS_VBUF);
+               }
+       } else if ((s0_params->pixel_fmt == PXP_PIX_FMT_NV12) ||
+                (s0_params->pixel_fmt == PXP_PIX_FMT_NV21) ||
+                (s0_params->pixel_fmt == PXP_PIX_FMT_NV16) ||
+                (s0_params->pixel_fmt == PXP_PIX_FMT_NV61)) {
+               int s = 2;
+               if ((s0_params->pixel_fmt == PXP_PIX_FMT_NV16) ||
+                   (s0_params->pixel_fmt == PXP_PIX_FMT_NV61))
+                       s = 1;
+
+               offset = (proc_data->srect.top * s0_params->width +
+                         proc_data->srect.left) / s;
+               U = Y + (s0_params->width * s0_params->height);
+               U1 = U + offset;
+
+               __raw_writel(U1, pxp->base + HW_PXP_PS_UBUF);
+       }
+
+       /* TODO: only support RGB565, Y8, Y4, YUV420 */
+       if (s0_params->pixel_fmt == PXP_PIX_FMT_GREY ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_YUV420P ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_YVU420P ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_NV12 ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_NV21 ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_NV16 ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_NV61 ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_YUV422P) {
+               __raw_writel(pitch, pxp->base + HW_PXP_PS_PITCH);
+       }
+       else if (s0_params->pixel_fmt == PXP_PIX_FMT_GY04)
+               __raw_writel(pitch >> 1,
+                               pxp->base + HW_PXP_PS_PITCH);
+       else if (s0_params->pixel_fmt == PXP_PIX_FMT_RGB32 ||
+                        s0_params->pixel_fmt == PXP_PIX_FMT_VUY444)
+               __raw_writel(pitch << 2,
+                               pxp->base + HW_PXP_PS_PITCH);
+       else if (s0_params->pixel_fmt == PXP_PIX_FMT_UYVY ||
+                s0_params->pixel_fmt == PXP_PIX_FMT_YUYV ||
+                s0_params->pixel_fmt == PXP_PIX_FMT_VYUY ||
+                s0_params->pixel_fmt == PXP_PIX_FMT_YVYU)
+               __raw_writel(pitch << 1,
+                               pxp->base + HW_PXP_PS_PITCH);
+       else if ((s0_params->pixel_fmt == PXP_PIX_FMT_RGB565) ||
+                (s0_params->pixel_fmt == PXP_PIX_FMT_RGB555))
+               __raw_writel(pitch << 1,
+                               pxp->base + HW_PXP_PS_PITCH);
+       else
+               __raw_writel(0, pxp->base + HW_PXP_PS_PITCH);
+}
+
+/**
+ * pxp_config() - configure PxP for a processing task
+ * @pxps:      PXP context.
+ * @pxp_chan:  PXP channel.
+ * @return:    0 on success or negative error code on failure.
+ */
+static int pxp_config(struct pxps *pxp, struct pxp_channel *pxp_chan)
+{
+       struct pxp_config_data *pxp_conf_data = &pxp->pxp_conf_state;
+       int ol_nr;
+       int i;
+
+       /* Configure PxP regs */
+       pxp_set_ctrl(pxp);
+       pxp_set_s0param(pxp);
+       pxp_set_s0crop(pxp);
+       pxp_set_scaling(pxp);
+       ol_nr = pxp_conf_data->layer_nr - 2;
+       while (ol_nr > 0) {
+               i = pxp_conf_data->layer_nr - 2 - ol_nr;
+               pxp_set_oln(i, pxp);
+               pxp_set_olparam(i, pxp);
+               /* only the color key in higher overlay will take effect. */
+               pxp_set_olcolorkey(i, pxp);
+               ol_nr--;
+       }
+       pxp_set_s0colorkey(pxp);
+       pxp_set_csc(pxp);
+       pxp_set_bg(pxp);
+       pxp_set_lut(pxp);
+
+       pxp_set_s0buf(pxp);
+       pxp_set_outbuf(pxp);
+
+       return 0;
+}
+
+static void pxp_clk_enable(struct pxps *pxp)
+{
+       mutex_lock(&pxp->clk_mutex);
+
+       if (pxp->clk_stat == CLK_STAT_ON) {
+               mutex_unlock(&pxp->clk_mutex);
+               return;
+       }
+
+       pm_runtime_get_sync(pxp->dev);
+
+       if (pxp->clk_disp_axi)
+               clk_prepare_enable(pxp->clk_disp_axi);
+       clk_prepare_enable(pxp->clk);
+       pxp->clk_stat = CLK_STAT_ON;
+
+       mutex_unlock(&pxp->clk_mutex);
+}
+
+static void pxp_clk_disable(struct pxps *pxp)
+{
+       unsigned long flags;
+
+       mutex_lock(&pxp->clk_mutex);
+
+       if (pxp->clk_stat == CLK_STAT_OFF) {
+               mutex_unlock(&pxp->clk_mutex);
+               return;
+       }
+
+       spin_lock_irqsave(&pxp->lock, flags);
+       if ((pxp->pxp_ongoing == 0) && list_empty(&head)) {
+               spin_unlock_irqrestore(&pxp->lock, flags);
+               clk_disable_unprepare(pxp->clk);
+               if (pxp->clk_disp_axi)
+                       clk_disable_unprepare(pxp->clk_disp_axi);
+               pxp->clk_stat = CLK_STAT_OFF;
+       } else
+               spin_unlock_irqrestore(&pxp->lock, flags);
+
+       pm_runtime_put_sync_suspend(pxp->dev);
+
+       mutex_unlock(&pxp->clk_mutex);
+}
+
+static inline void clkoff_callback(struct work_struct *w)
+{
+       struct pxps *pxp = container_of(w, struct pxps, work);
+
+       pxp_clk_disable(pxp);
+}
+
+static void pxp_clkoff_timer(unsigned long arg)
+{
+       struct pxps *pxp = (struct pxps *)arg;
+
+       if ((pxp->pxp_ongoing == 0) && list_empty(&head))
+               schedule_work(&pxp->work);
+       else
+               mod_timer(&pxp->clk_timer,
+                         jiffies + msecs_to_jiffies(timeout_in_ms));
+}
+
+static struct pxp_tx_desc *pxpdma_first_queued(struct pxp_channel *pxp_chan)
+{
+       return list_entry(pxp_chan->queue.next, struct pxp_tx_desc, list);
+}
+
+/* called with pxp_chan->lock held */
+static void __pxpdma_dostart(struct pxp_channel *pxp_chan)
+{
+       struct pxp_dma *pxp_dma = to_pxp_dma(pxp_chan->dma_chan.device);
+       struct pxps *pxp = to_pxp(pxp_dma);
+       struct pxp_tx_desc *desc;
+       struct pxp_tx_desc *child;
+       int i = 0;
+
+       memset(&pxp->pxp_conf_state.s0_param, 0,  sizeof(struct pxp_layer_param));
+       memset(&pxp->pxp_conf_state.out_param, 0,  sizeof(struct pxp_layer_param));
+       memset(pxp->pxp_conf_state.ol_param, 0,  sizeof(struct pxp_layer_param) * 8);
+       memset(&pxp->pxp_conf_state.proc_data, 0,  sizeof(struct pxp_proc_data));
+       /* S0 */
+       desc = list_first_entry(&head, struct pxp_tx_desc, list);
+       memcpy(&pxp->pxp_conf_state.s0_param,
+              &desc->layer_param.s0_param, sizeof(struct pxp_layer_param));
+       memcpy(&pxp->pxp_conf_state.proc_data,
+              &desc->proc_data, sizeof(struct pxp_proc_data));
+
+       /* Save PxP configuration */
+       list_for_each_entry(child, &desc->tx_list, list) {
+               if (i == 0) {   /* Output */
+                       memcpy(&pxp->pxp_conf_state.out_param,
+                              &child->layer_param.out_param,
+                              sizeof(struct pxp_layer_param));
+               } else {        /* Overlay */
+                       memcpy(&pxp->pxp_conf_state.ol_param[i - 1],
+                              &child->layer_param.ol_param,
+                              sizeof(struct pxp_layer_param));
+               }
+
+               i++;
+       }
+       pr_debug("%s:%d S0 w/h %d/%d paddr %08x\n", __func__, __LINE__,
+                pxp->pxp_conf_state.s0_param.width,
+                pxp->pxp_conf_state.s0_param.height,
+                pxp->pxp_conf_state.s0_param.paddr);
+       pr_debug("%s:%d OUT w/h %d/%d paddr %08x\n", __func__, __LINE__,
+                pxp->pxp_conf_state.out_param.width,
+                pxp->pxp_conf_state.out_param.height,
+                pxp->pxp_conf_state.out_param.paddr);
+}
+
+static void pxpdma_dostart_work(struct pxps *pxp)
+{
+       struct pxp_channel *pxp_chan = NULL;
+       unsigned long flags;
+       struct pxp_tx_desc *desc = NULL;
+
+       spin_lock_irqsave(&pxp->lock, flags);
+
+       desc = list_entry(head.next, struct pxp_tx_desc, list);
+       pxp_chan = to_pxp_channel(desc->txd.chan);
+
+       __pxpdma_dostart(pxp_chan);
+
+       /* Configure PxP */
+       pxp_config(pxp, pxp_chan);
+
+       pxp_start(pxp);
+
+       spin_unlock_irqrestore(&pxp->lock, flags);
+}
+
+static void pxpdma_dequeue(struct pxp_channel *pxp_chan, struct pxps *pxp)
+{
+       unsigned long flags;
+       struct pxp_tx_desc *desc = NULL;
+
+       do {
+               desc = pxpdma_first_queued(pxp_chan);
+               spin_lock_irqsave(&pxp->lock, flags);
+               list_move_tail(&desc->list, &head);
+               spin_unlock_irqrestore(&pxp->lock, flags);
+       } while (!list_empty(&pxp_chan->queue));
+}
+
+static dma_cookie_t pxp_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+       struct pxp_tx_desc *desc = to_tx_desc(tx);
+       struct pxp_channel *pxp_chan = to_pxp_channel(tx->chan);
+       dma_cookie_t cookie;
+
+       dev_dbg(&pxp_chan->dma_chan.dev->device, "received TX\n");
+
+       /* pxp_chan->lock can be taken under ichan->lock, but not v.v. */
+       spin_lock(&pxp_chan->lock);
+
+       cookie = pxp_chan->dma_chan.cookie;
+
+       if (++cookie < 0)
+               cookie = 1;
+
+       /* from dmaengine.h: "last cookie value returned to client" */
+       pxp_chan->dma_chan.cookie = cookie;
+       tx->cookie = cookie;
+
+       /* Here we add the tx descriptor to our PxP task queue. */
+       list_add_tail(&desc->list, &pxp_chan->queue);
+
+       spin_unlock(&pxp_chan->lock);
+
+       dev_dbg(&pxp_chan->dma_chan.dev->device, "done TX\n");
+
+       return cookie;
+}
+
+/**
+ * pxp_init_channel() - initialize a PXP channel.
+ * @pxp_dma:   PXP DMA context.
+ * @pchan:  pointer to the channel object.
+ * @return      0 on success or negative error code on failure.
+ */
+static int pxp_init_channel(struct pxp_dma *pxp_dma,
+                           struct pxp_channel *pxp_chan)
+{
+       int ret = 0;
+
+       /*
+        * We are using _virtual_ channel here.
+        * Each channel contains all parameters of corresponding layers
+        * for one transaction; each layer is represented as one descriptor
+        * (i.e., pxp_tx_desc) here.
+        */
+
+       INIT_LIST_HEAD(&pxp_chan->queue);
+
+       return ret;
+}
+
+static irqreturn_t pxp_irq(int irq, void *dev_id)
+{
+       struct pxps *pxp = dev_id;
+       struct pxp_channel *pxp_chan;
+       struct pxp_tx_desc *desc;
+       struct pxp_tx_desc *child, *_child;
+       dma_async_tx_callback callback;
+       void *callback_param;
+       unsigned long flags;
+       u32 hist_status;
+
+       dump_pxp_reg(pxp);
+
+       hist_status =
+           __raw_readl(pxp->base + HW_PXP_HIST_CTRL) & BM_PXP_HIST_CTRL_STATUS;
+
+       __raw_writel(BM_PXP_STAT_IRQ, pxp->base + HW_PXP_STAT_CLR);
+
+       /* set the SFTRST bit to be 1 to reset
+        * the PXP block to its default state.
+        */
+       pxp_soft_reset(pxp);
+
+       spin_lock_irqsave(&pxp->lock, flags);
+
+       if (list_empty(&head)) {
+               pxp->pxp_ongoing = 0;
+               spin_unlock_irqrestore(&pxp->lock, flags);
+               return IRQ_NONE;
+       }
+
+       /* Get descriptor and call callback */
+       desc = list_entry(head.next, struct pxp_tx_desc, list);
+       pxp_chan = to_pxp_channel(desc->txd.chan);
+
+       pxp_chan->completed = desc->txd.cookie;
+
+       callback = desc->txd.callback;
+       callback_param = desc->txd.callback_param;
+
+       /* Send histogram status back to caller */
+       desc->hist_status = hist_status;
+
+       if ((desc->txd.flags & DMA_PREP_INTERRUPT) && callback)
+               callback(callback_param);
+
+       pxp_chan->status = PXP_CHANNEL_INITIALIZED;
+
+       list_for_each_entry_safe(child, _child, &desc->tx_list, list) {
+               list_del_init(&child->list);
+               kmem_cache_free(tx_desc_cache, (void *)child);
+       }
+       list_del_init(&desc->list);
+       kmem_cache_free(tx_desc_cache, (void *)desc);
+
+       complete(&pxp->complete);
+       pxp->pxp_ongoing = 0;
+       mod_timer(&pxp->clk_timer, jiffies + msecs_to_jiffies(timeout_in_ms));
+
+       spin_unlock_irqrestore(&pxp->lock, flags);
+
+       return IRQ_HANDLED;
+}
+
+/* allocate/free dma tx descriptor dynamically*/
+static struct pxp_tx_desc *pxpdma_desc_alloc(struct pxp_channel *pxp_chan)
+{
+       struct pxp_tx_desc *desc = NULL;
+       struct dma_async_tx_descriptor *txd = NULL;
+
+       desc = kmem_cache_alloc(tx_desc_cache, GFP_KERNEL | __GFP_ZERO);
+       if (desc == NULL)
+               return NULL;
+
+       INIT_LIST_HEAD(&desc->list);
+       INIT_LIST_HEAD(&desc->tx_list);
+       txd = &desc->txd;
+       dma_async_tx_descriptor_init(txd, &pxp_chan->dma_chan);
+       txd->tx_submit = pxp_tx_submit;
+
+       return desc;
+}
+
+/* Allocate and initialise a transfer descriptor. */
+static struct dma_async_tx_descriptor *pxp_prep_slave_sg(struct dma_chan *chan,
+                                                        struct scatterlist
+                                                        *sgl,
+                                                        unsigned int sg_len,
+                                                        enum
+                                                        dma_transfer_direction
+                                                        direction,
+                                                        unsigned long tx_flags,
+                                                        void *context)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+       struct pxp_dma *pxp_dma = to_pxp_dma(chan->device);
+       struct pxps *pxp = to_pxp(pxp_dma);
+       struct pxp_tx_desc *desc = NULL;
+       struct pxp_tx_desc *first = NULL, *prev = NULL;
+       struct scatterlist *sg;
+       dma_addr_t phys_addr;
+       int i;
+
+       if (direction != DMA_DEV_TO_MEM && direction != DMA_MEM_TO_DEV) {
+               dev_err(chan->device->dev, "Invalid DMA direction %d!\n",
+                       direction);
+               return NULL;
+       }
+
+       if (unlikely(sg_len < 2))
+               return NULL;
+
+       for_each_sg(sgl, sg, sg_len, i) {
+               desc = pxpdma_desc_alloc(pxp_chan);
+               if (!desc) {
+                       dev_err(chan->device->dev, "no enough memory to allocate tx descriptor\n");
+                       return NULL;
+               }
+
+               phys_addr = sg_dma_address(sg);
+
+               if (!first) {
+                       first = desc;
+
+                       desc->layer_param.s0_param.paddr = phys_addr;
+               } else {
+                       list_add_tail(&desc->list, &first->tx_list);
+                       prev->next = desc;
+                       desc->next = NULL;
+
+                       if (i == 1)
+                               desc->layer_param.out_param.paddr = phys_addr;
+                       else
+                               desc->layer_param.ol_param.paddr = phys_addr;
+               }
+
+               prev = desc;
+       }
+
+       pxp->pxp_conf_state.layer_nr = sg_len;
+       first->txd.flags = tx_flags;
+       first->len = sg_len;
+       pr_debug("%s:%d first %p, first->len %d, flags %08x\n",
+                __func__, __LINE__, first, first->len, first->txd.flags);
+
+       return &first->txd;
+}
+
+static void pxp_issue_pending(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+       struct pxp_dma *pxp_dma = to_pxp_dma(chan->device);
+       struct pxps *pxp = to_pxp(pxp_dma);
+
+       spin_lock(&pxp_chan->lock);
+
+       if (list_empty(&pxp_chan->queue)) {
+               spin_unlock(&pxp_chan->lock);
+               return;
+       }
+
+       pxpdma_dequeue(pxp_chan, pxp);
+       pxp_chan->status = PXP_CHANNEL_READY;
+
+       spin_unlock(&pxp_chan->lock);
+
+       pxp_clk_enable(pxp);
+       wake_up_interruptible(&pxp->thread_waitq);
+}
+
+static void __pxp_terminate_all(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+
+       pxp_chan->status = PXP_CHANNEL_INITIALIZED;
+}
+
+static int pxp_device_terminate_all(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+
+       spin_lock(&pxp_chan->lock);
+       __pxp_terminate_all(chan);
+       spin_unlock(&pxp_chan->lock);
+
+       return 0;
+}
+
+static int pxp_alloc_chan_resources(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+       struct pxp_dma *pxp_dma = to_pxp_dma(chan->device);
+       int ret;
+
+       /* dmaengine.c now guarantees to only offer free channels */
+       BUG_ON(chan->client_count > 1);
+       WARN_ON(pxp_chan->status != PXP_CHANNEL_FREE);
+
+       chan->cookie = 1;
+       pxp_chan->completed = -ENXIO;
+
+       pr_debug("%s dma_chan.chan_id %d\n", __func__, chan->chan_id);
+       ret = pxp_init_channel(pxp_dma, pxp_chan);
+       if (ret < 0)
+               goto err_chan;
+
+       pxp_chan->status = PXP_CHANNEL_INITIALIZED;
+
+       dev_dbg(&chan->dev->device, "Found channel 0x%x, irq %d\n",
+               chan->chan_id, pxp_chan->eof_irq);
+
+       return ret;
+
+err_chan:
+       return ret;
+}
+
+static void pxp_free_chan_resources(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+
+       spin_lock(&pxp_chan->lock);
+
+       __pxp_terminate_all(chan);
+
+       pxp_chan->status = PXP_CHANNEL_FREE;
+
+       spin_unlock(&pxp_chan->lock);
+}
+
+static enum dma_status pxp_tx_status(struct dma_chan *chan,
+                                    dma_cookie_t cookie,
+                                    struct dma_tx_state *txstate)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+
+       if (cookie != chan->cookie)
+               return DMA_ERROR;
+
+       if (txstate) {
+               txstate->last = pxp_chan->completed;
+               txstate->used = chan->cookie;
+               txstate->residue = 0;
+       }
+       return DMA_COMPLETE;
+}
+
+static int pxp_dma_init(struct pxps *pxp)
+{
+       struct pxp_dma *pxp_dma = &pxp->pxp_dma;
+       struct dma_device *dma = &pxp_dma->dma;
+       int i;
+
+       dma_cap_set(DMA_SLAVE, dma->cap_mask);
+       dma_cap_set(DMA_PRIVATE, dma->cap_mask);
+
+       /* Compulsory common fields */
+       dma->dev = pxp->dev;
+       dma->device_alloc_chan_resources = pxp_alloc_chan_resources;
+       dma->device_free_chan_resources = pxp_free_chan_resources;
+       dma->device_tx_status = pxp_tx_status;
+       dma->device_issue_pending = pxp_issue_pending;
+
+       /* Compulsory for DMA_SLAVE fields */
+       dma->device_prep_slave_sg = pxp_prep_slave_sg;
+       dma->device_terminate_all = pxp_device_terminate_all;
+
+       /* Initialize PxP Channels */
+       INIT_LIST_HEAD(&dma->channels);
+       for (i = 0; i < NR_PXP_VIRT_CHANNEL; i++) {
+               struct pxp_channel *pxp_chan = pxp->channel + i;
+               struct dma_chan *dma_chan = &pxp_chan->dma_chan;
+
+               spin_lock_init(&pxp_chan->lock);
+
+               /* Only one EOF IRQ for PxP, shared by all channels */
+               pxp_chan->eof_irq = pxp->irq;
+               pxp_chan->status = PXP_CHANNEL_FREE;
+               pxp_chan->completed = -ENXIO;
+               snprintf(pxp_chan->eof_name, sizeof(pxp_chan->eof_name),
+                        "PXP EOF %d", i);
+
+               dma_chan->device = &pxp_dma->dma;
+               dma_chan->cookie = 1;
+               dma_chan->chan_id = i;
+               list_add_tail(&dma_chan->device_node, &dma->channels);
+       }
+
+       return dma_async_device_register(&pxp_dma->dma);
+}
+
+static ssize_t clk_off_timeout_show(struct device *dev,
+                                   struct device_attribute *attr, char *buf)
+{
+       return sprintf(buf, "%d\n", timeout_in_ms);
+}
+
+static ssize_t clk_off_timeout_store(struct device *dev,
+                                    struct device_attribute *attr,
+                                    const char *buf, size_t count)
+{
+       int val;
+       if (sscanf(buf, "%d", &val) > 0) {
+               timeout_in_ms = val;
+               return count;
+       }
+       return -EINVAL;
+}
+
+static DEVICE_ATTR(clk_off_timeout, 0644, clk_off_timeout_show,
+                  clk_off_timeout_store);
+
+static ssize_t block_size_show(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+       return sprintf(buf, "%d\n", block_size);
+}
+
+static ssize_t block_size_store(struct device *dev,
+                               struct device_attribute *attr,
+                               const char *buf, size_t count)
+{
+       char **last = NULL;
+
+       block_size = simple_strtoul(buf, last, 0);
+       if (block_size > 1)
+               block_size = 1;
+
+       return count;
+}
+static DEVICE_ATTR(block_size, S_IWUSR | S_IRUGO,
+                  block_size_show, block_size_store);
+
+static const struct of_device_id imx_pxpdma_dt_ids[] = {
+       { .compatible = "fsl,imx6dl-pxp-dma", },
+       { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, imx_pxpdma_dt_ids);
+
+static int has_pending_task(struct pxps *pxp, struct pxp_channel *task)
+{
+       int found;
+       unsigned long flags;
+
+       spin_lock_irqsave(&pxp->lock, flags);
+       found = !list_empty(&head);
+       spin_unlock_irqrestore(&pxp->lock, flags);
+
+       return found;
+}
+
+static int pxp_dispatch_thread(void *argv)
+{
+       struct pxps *pxp = (struct pxps *)argv;
+       struct pxp_channel *pending = NULL;
+       unsigned long flags;
+
+       set_freezable();
+
+       while (!kthread_should_stop()) {
+               int ret;
+               ret = wait_event_freezable(pxp->thread_waitq,
+                                       has_pending_task(pxp, pending) ||
+                                       kthread_should_stop());
+               if (ret < 0)
+                       continue;
+
+               if (kthread_should_stop())
+                       break;
+
+               spin_lock_irqsave(&pxp->lock, flags);
+               pxp->pxp_ongoing = 1;
+               spin_unlock_irqrestore(&pxp->lock, flags);
+               init_completion(&pxp->complete);
+               pxpdma_dostart_work(pxp);
+               ret = wait_for_completion_timeout(&pxp->complete, 2 * HZ);
+               if (ret == 0) {
+                       printk(KERN_EMERG "%s: task is timeout\n\n", __func__);
+                       break;
+               }
+       }
+
+       return 0;
+}
+
+static int pxp_probe(struct platform_device *pdev)
+{
+       struct pxps *pxp;
+       struct resource *res;
+       int irq;
+       int err = 0;
+
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       irq = platform_get_irq(pdev, 0);
+       if (!res || irq < 0) {
+               err = -ENODEV;
+               goto exit;
+       }
+
+       pxp = devm_kzalloc(&pdev->dev, sizeof(*pxp), GFP_KERNEL);
+       if (!pxp) {
+               dev_err(&pdev->dev, "failed to allocate control object\n");
+               err = -ENOMEM;
+               goto exit;
+       }
+
+       pxp->dev = &pdev->dev;
+
+       platform_set_drvdata(pdev, pxp);
+       pxp->irq = irq;
+
+       pxp->pxp_ongoing = 0;
+       pxp->lut_state = 0;
+
+       spin_lock_init(&pxp->lock);
+       mutex_init(&pxp->clk_mutex);
+
+       pxp->base = devm_ioremap_resource(&pdev->dev, res);
+       if (pxp->base == NULL) {
+               dev_err(&pdev->dev, "Couldn't ioremap regs\n");
+               err = -ENODEV;
+               goto exit;
+       }
+
+       pxp->pdev = pdev;
+
+       pxp->clk_disp_axi = devm_clk_get(&pdev->dev, "disp-axi");
+       if (IS_ERR(pxp->clk_disp_axi))
+               pxp->clk_disp_axi = NULL;
+       pxp->clk = devm_clk_get(&pdev->dev, "pxp-axi");
+
+       err = devm_request_irq(&pdev->dev, pxp->irq, pxp_irq, 0,
+                               "pxp-dmaengine", pxp);
+       if (err)
+               goto exit;
+       /* Initialize DMA engine */
+       err = pxp_dma_init(pxp);
+       if (err < 0)
+               goto exit;
+
+       if (device_create_file(&pdev->dev, &dev_attr_clk_off_timeout)) {
+               dev_err(&pdev->dev,
+                       "Unable to create file from clk_off_timeout\n");
+               goto exit;
+       }
+
+       device_create_file(&pdev->dev, &dev_attr_block_size);
+       pxp_clk_enable(pxp);
+       dump_pxp_reg(pxp);
+       pxp_clk_disable(pxp);
+
+       INIT_WORK(&pxp->work, clkoff_callback);
+       init_timer(&pxp->clk_timer);
+       pxp->clk_timer.function = pxp_clkoff_timer;
+       pxp->clk_timer.data = (unsigned long)pxp;
+
+       init_waitqueue_head(&pxp->thread_waitq);
+       /* allocate a kernel thread to dispatch pxp conf */
+       pxp->dispatch = kthread_run(pxp_dispatch_thread, pxp, "pxp_dispatch");
+       if (IS_ERR(pxp->dispatch)) {
+               err = PTR_ERR(pxp->dispatch);
+               goto exit;
+       }
+       tx_desc_cache = kmem_cache_create("tx_desc", sizeof(struct pxp_tx_desc),
+                                         0, SLAB_HWCACHE_ALIGN, NULL);
+       if (!tx_desc_cache) {
+               err = -ENOMEM;
+               goto exit;
+       }
+
+       register_pxp_device();
+
+       pm_runtime_enable(pxp->dev);
+
+exit:
+       if (err)
+               dev_err(&pdev->dev, "Exiting (unsuccessfully) pxp_probe()\n");
+       return err;
+}
+
+static int pxp_remove(struct platform_device *pdev)
+{
+       struct pxps *pxp = platform_get_drvdata(pdev);
+
+       unregister_pxp_device();
+       kmem_cache_destroy(tx_desc_cache);
+       kthread_stop(pxp->dispatch);
+       cancel_work_sync(&pxp->work);
+       del_timer_sync(&pxp->clk_timer);
+       clk_disable_unprepare(pxp->clk);
+       if (pxp->clk_disp_axi)
+               clk_disable_unprepare(pxp->clk_disp_axi);
+       device_remove_file(&pdev->dev, &dev_attr_clk_off_timeout);
+       device_remove_file(&pdev->dev, &dev_attr_block_size);
+       dma_async_device_unregister(&(pxp->pxp_dma.dma));
+
+       return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int pxp_suspend(struct device *dev)
+{
+       struct pxps *pxp = dev_get_drvdata(dev);
+
+       pxp_clk_enable(pxp);
+       while (__raw_readl(pxp->base + HW_PXP_CTRL) & BM_PXP_CTRL_ENABLE)
+               ;
+
+       __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL);
+       pxp_clk_disable(pxp);
+
+       return 0;
+}
+
+static int pxp_resume(struct device *dev)
+{
+       struct pxps *pxp = dev_get_drvdata(dev);
+
+       pxp_clk_enable(pxp);
+       /* Pull PxP out of reset */
+       __raw_writel(0, pxp->base + HW_PXP_CTRL);
+       pxp_clk_disable(pxp);
+
+       return 0;
+}
+#else
+#define        pxp_suspend     NULL
+#define        pxp_resume      NULL
+#endif
+
+#ifdef CONFIG_PM_RUNTIME
+static int pxp_runtime_suspend(struct device *dev)
+{
+       dev_dbg(dev, "pxp busfreq high release.\n");
+       return 0;
+}
+
+static int pxp_runtime_resume(struct device *dev)
+{
+       dev_dbg(dev, "pxp busfreq high request.\n");
+       return 0;
+}
+#else
+#define        pxp_runtime_suspend     NULL
+#define        pxp_runtime_resume      NULL
+#endif
+
+static const struct dev_pm_ops pxp_pm_ops = {
+       SET_RUNTIME_PM_OPS(pxp_runtime_suspend, pxp_runtime_resume, NULL)
+       SET_SYSTEM_SLEEP_PM_OPS(pxp_suspend, pxp_resume)
+};
+
+static struct platform_driver pxp_driver = {
+       .driver = {
+                       .name = "imx-pxp",
+                       .of_match_table = of_match_ptr(imx_pxpdma_dt_ids),
+                       .pm = &pxp_pm_ops,
+                  },
+       .probe = pxp_probe,
+       .remove = pxp_remove,
+};
+
+module_platform_driver(pxp_driver);
+
+
+MODULE_DESCRIPTION("i.MX PxP driver");
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_LICENSE("GPL");

diff --git a/drivers/dma/pxp/pxp_dma_v3.c b/drivers/dma/pxp/pxp_dma_v3.c
new file mode 100644 (file)
index 0000000..52c61cb
--- /dev/null
+++ b/drivers/dma/pxp/pxp_dma_v3.c
@@ -0,0 +1,4481 @@
+/*
+ * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+/*
+ * Based on STMP378X PxP driver
+ * Copyright 2008-2009 Embedded Alley Solutions, Inc All Rights Reserved.
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/semaphore.h>
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+#include <linux/dmaengine.h>
+#include <linux/pxp_dma.h>
+#include <linux/timer.h>
+#include <linux/clk.h>
+#include <linux/workqueue.h>
+#include <linux/sched.h>
+#include <linux/of.h>
+
+#include "regs-pxp_v3.h"
+
+#ifdef CONFIG_MXC_FPGA_M4_TEST
+#include "cm4_image.c"
+#define FPGA_TCML_ADDR        0x0C7F8000
+#define PINCTRL               0x0C018000
+#define PIN_DOUT              0x700
+void __iomem *fpga_tcml_base;
+void __iomem *pinctrl_base;
+#endif
+
+
+#define PXP_FILL_TIMEOUT       3000
+#define busy_wait(cond)                                                        \
+       ({                                                              \
+       unsigned long end_jiffies = jiffies +                           \
+                       msecs_to_jiffies(PXP_FILL_TIMEOUT);             \
+       bool succeeded = false;                                         \
+       do {                                                            \
+               if (cond) {                                             \
+                       succeeded = true;                               \
+                       break;                                          \
+               }                                                       \
+               cpu_relax();                                            \
+       } while (time_after(end_jiffies, jiffies));                     \
+               succeeded;                                              \
+       })
+
+#define        PXP_DOWNSCALE_THRESHOLD         0x4000
+
+#define CONFIG_FB_MXC_EINK_FPGA
+
+static LIST_HEAD(head);
+static int timeout_in_ms = 600;
+static unsigned int block_size;
+static struct pxp_collision_info col_info;
+
+struct pxp_dma {
+       struct dma_device dma;
+};
+
+struct pxps {
+       struct platform_device *pdev;
+       struct clk *clk;
+       void __iomem *base;
+       int irq;                /* PXP IRQ to the CPU */
+
+       spinlock_t lock;
+       struct mutex clk_mutex;
+       int clk_stat;
+#define        CLK_STAT_OFF            0
+#define        CLK_STAT_ON             1
+       int pxp_ongoing;
+       int lut_state;
+
+       struct device *dev;
+       struct pxp_dma pxp_dma;
+       struct pxp_channel channel[NR_PXP_VIRT_CHANNEL];
+       struct work_struct work;
+
+       /* describes most recent processing configuration */
+       struct pxp_config_data pxp_conf_state;
+
+       /* to turn clock off when pxp is inactive */
+       struct timer_list clk_timer;
+       struct semaphore sema;
+};
+
+#define to_pxp_dma(d) container_of(d, struct pxp_dma, dma)
+#define to_tx_desc(tx) container_of(tx, struct pxp_tx_desc, txd)
+#define to_pxp_channel(d) container_of(d, struct pxp_channel, dma_chan)
+#define to_pxp(id) container_of(id, struct pxps, pxp_dma)
+
+#define PXP_DEF_BUFS   2
+#define PXP_MIN_PIX    8
+static void __iomem *pxp_reg_base;
+
+static __attribute__((aligned (1024*4))) unsigned int active_matrix_data_8x8[64]={
+   0x06050100, 0x04030207, 0x06050100, 0x04030207,
+   0x00040302, 0x07060501, 0x00040302, 0x07060501,
+   0x02070605, 0x01000403, 0x02070605, 0x01000403,
+   0x05010004, 0x03020706, 0x05010004, 0x03020706,
+   0x04030207, 0x06050100, 0x04030207, 0x06050100,
+   0x07060501, 0x00040302, 0x07060501, 0x00040302,
+   0x01000403, 0x02070605, 0x01000403, 0x02070605,
+   0x03020706, 0x05010004, 0x03020706, 0x05010004,
+   0x06050100, 0x04030207, 0x06050100, 0x04030207,
+   0x00040302, 0x07060501, 0x00040302, 0x07060501,
+   0x02070605, 0x01000403, 0x02070605, 0x01000403,
+   0x05010004, 0x03020706, 0x05010004, 0x03020706,
+   0x04030207, 0x06050100, 0x04030207, 0x06050100,
+   0x07060501, 0x00040302, 0x07060501, 0x00040302,
+   0x01000403, 0x02070605, 0x01000403, 0x02070605,
+   0x03020706, 0x05010004, 0x03020706, 0x05010004
+    };
+
+static __attribute__((aligned (1024*4))) unsigned int dither_data_8x8[64]={
+               1,
+               49*2,
+               13*2,
+               61*2,
+               4*2,
+               52*2,
+               16*2,
+               64*2,
+               33*2,
+               17*2,
+               45*2,
+               29*2,
+               36*2,
+               20*2,
+               48*2,
+               32*2,
+               9*2,
+               57*2,
+               5*2,
+               53*2,
+               12*2,
+               60*2,
+               8*2,
+               56*2,
+               41*2,
+               25*2,
+               37*2,
+               21*2,
+               44*2,
+               28*2,
+               40*2,
+               24*2,
+               3*2,
+               51*2,
+               15*2,
+               63*2,
+               2*2,
+               50*2,
+               14*2,
+               62*2,
+               35*2,
+               19*2,
+               47*2,
+               31*2,
+               34*2,
+               18*2,
+               46*2,
+               30*2,
+               11*2,
+               59*2,
+               7*2,
+               55*2,
+               10*2,
+               58*2,
+               6*2,
+               54*2,
+               43*2,
+               27*2,
+               39*2,
+               23*2,
+               42*2,
+               26*2,
+               38*2,
+               22*2
+               };
+
+static void pxp_dithering_process(struct pxps *pxp);
+static void pxp_wfe_a_process(struct pxps *pxp);
+static void pxp_wfe_a_configure(struct pxps *pxp);
+static void pxp_wfe_b_process(struct pxps *pxp);
+static void pxp_wfe_b_configure(struct pxps *pxp);
+static void pxp_start2(struct pxps *pxp);
+static void pxp_soft_reset(struct pxps *pxp);
+static void pxp_collision_detection_disable(struct pxps *pxp);
+static void pxp_collision_detection_enable(struct pxps *pxp,
+                                          unsigned int width,
+                                          unsigned int height);
+static void pxp_luts_activate(struct pxps *pxp, u64 lut_status);
+static bool pxp_collision_status_report(struct pxps *pxp, struct pxp_collision_info *info);
+static void pxp_histogram_status_report(struct pxps *pxp, u32 *hist_status);
+static void pxp_histogram_enable(struct pxps *pxp,
+                                unsigned int width,
+                                unsigned int height);
+static void pxp_histogram_disable(struct pxps *pxp);
+
+enum {
+       DITHER0_LUT = 0x0,      /* Select the LUT memory for access */
+       DITHER0_ERR0 = 0x1,     /* Select the ERR0 memory for access */
+       DITHER0_ERR1 = 0x2,     /* Select the ERR1 memory for access */
+       DITHER1_LUT = 0x3,      /* Select the LUT memory for access */
+       DITHER2_LUT = 0x4,      /* Select the LUT memory for access */
+       ALU_A = 0x5,            /* Select the ALU instr memory for access */
+       ALU_b = 0x6,            /* Select the ALU instr memory for access */
+       WFE_A = 0x7,            /* Select the WFE_A instr memory for access */
+       WFE_B = 0x8,            /* Select the WFE_B instr memory for access */
+       RESERVED = 0x15,
+};
+
+/*
+ * PXP common functions
+ */
+static void dump_pxp_reg(struct pxps *pxp)
+{
+       dev_dbg(pxp->dev, "PXP_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CTRL));
+       dev_dbg(pxp->dev, "PXP_STAT 0x%x",
+               __raw_readl(pxp->base + HW_PXP_STAT));
+       dev_dbg(pxp->dev, "PXP_OUT_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_CTRL));
+       dev_dbg(pxp->dev, "PXP_OUT_BUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_BUF));
+       dev_dbg(pxp->dev, "PXP_OUT_BUF2 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_BUF2));
+       dev_dbg(pxp->dev, "PXP_OUT_PITCH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_PITCH));
+       dev_dbg(pxp->dev, "PXP_OUT_LRC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_LRC));
+       dev_dbg(pxp->dev, "PXP_OUT_PS_ULC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_PS_ULC));
+       dev_dbg(pxp->dev, "PXP_OUT_PS_LRC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_PS_LRC));
+       dev_dbg(pxp->dev, "PXP_OUT_AS_ULC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_AS_ULC));
+       dev_dbg(pxp->dev, "PXP_OUT_AS_LRC 0x%x",
+               __raw_readl(pxp->base + HW_PXP_OUT_AS_LRC));
+       dev_dbg(pxp->dev, "PXP_PS_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_CTRL));
+       dev_dbg(pxp->dev, "PXP_PS_BUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_BUF));
+       dev_dbg(pxp->dev, "PXP_PS_UBUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_UBUF));
+       dev_dbg(pxp->dev, "PXP_PS_VBUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_VBUF));
+       dev_dbg(pxp->dev, "PXP_PS_PITCH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_PITCH));
+       dev_dbg(pxp->dev, "PXP_PS_BACKGROUND_0 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_BACKGROUND_0));
+       dev_dbg(pxp->dev, "PXP_PS_SCALE 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_SCALE));
+       dev_dbg(pxp->dev, "PXP_PS_OFFSET 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_OFFSET));
+       dev_dbg(pxp->dev, "PXP_PS_CLRKEYLOW_0 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_CLRKEYLOW_0));
+       dev_dbg(pxp->dev, "PXP_PS_CLRKEYHIGH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_PS_CLRKEYHIGH_0));
+       dev_dbg(pxp->dev, "PXP_AS_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_CTRL));
+       dev_dbg(pxp->dev, "PXP_AS_BUF 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_BUF));
+       dev_dbg(pxp->dev, "PXP_AS_PITCH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_PITCH));
+       dev_dbg(pxp->dev, "PXP_AS_CLRKEYLOW 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_CLRKEYLOW_0));
+       dev_dbg(pxp->dev, "PXP_AS_CLRKEYHIGH 0x%x",
+               __raw_readl(pxp->base + HW_PXP_AS_CLRKEYHIGH_0));
+       dev_dbg(pxp->dev, "PXP_CSC1_COEF0 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC1_COEF0));
+       dev_dbg(pxp->dev, "PXP_CSC1_COEF1 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC1_COEF1));
+       dev_dbg(pxp->dev, "PXP_CSC1_COEF2 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC1_COEF2));
+       dev_dbg(pxp->dev, "PXP_CSC2_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_CTRL));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF0 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF0));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF1 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF1));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF2 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF2));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF3 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF3));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF4 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF4));
+       dev_dbg(pxp->dev, "PXP_CSC2_COEF5 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CSC2_COEF5));
+       dev_dbg(pxp->dev, "PXP_LUT_CTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_LUT_CTRL));
+       dev_dbg(pxp->dev, "PXP_LUT_ADDR 0x%x",
+               __raw_readl(pxp->base + HW_PXP_LUT_ADDR));
+       dev_dbg(pxp->dev, "PXP_LUT_DATA 0x%x",
+               __raw_readl(pxp->base + HW_PXP_LUT_DATA));
+       dev_dbg(pxp->dev, "PXP_LUT_EXTMEM 0x%x",
+               __raw_readl(pxp->base + HW_PXP_LUT_EXTMEM));
+       dev_dbg(pxp->dev, "PXP_CFA 0x%x",
+               __raw_readl(pxp->base + HW_PXP_CFA));
+       dev_dbg(pxp->dev, "PXP_POWER_REG0 0x%x",
+               __raw_readl(pxp->base + HW_PXP_POWER_REG0));
+       dev_dbg(pxp->dev, "PXP_NEXT 0x%x",
+               __raw_readl(pxp->base + HW_PXP_NEXT));
+       dev_dbg(pxp->dev, "PXP_DEBUGCTRL 0x%x",
+               __raw_readl(pxp->base + HW_PXP_DEBUGCTRL));
+       dev_dbg(pxp->dev, "PXP_DEBUG 0x%x",
+               __raw_readl(pxp->base + HW_PXP_DEBUG));
+       dev_dbg(pxp->dev, "PXP_VERSION 0x%x",
+               __raw_readl(pxp->base + HW_PXP_VERSION));
+}
+
+static void dump_pxp_reg2(struct pxps *pxp)
+{
+#ifdef DEBUG
+       int i = 0;
+
+       for (i=0; i< ((0x33C0/0x10) + 1);i++) {
+               printk("0x%08x: 0x%08x\n", 0x10*i, __raw_readl(pxp->base + 0x10*i));
+       }
+#endif
+}
+
+static void print_param(struct pxp_layer_param *p, char *s)
+{
+       pr_debug("%s: t/l/w/h/s %d/%d/%d/%d/%d, addr %x\n", s,
+               p->top, p->left, p->width, p->height, p->stride, p->paddr);
+}
+
+static bool is_yuv(u32 pix_fmt)
+{
+       if ((pix_fmt == PXP_PIX_FMT_YUYV) |
+           (pix_fmt == PXP_PIX_FMT_UYVY) |
+           (pix_fmt == PXP_PIX_FMT_YVYU) |
+           (pix_fmt == PXP_PIX_FMT_VYUY) |
+           (pix_fmt == PXP_PIX_FMT_Y41P) |
+           (pix_fmt == PXP_PIX_FMT_VUY444) |
+           (pix_fmt == PXP_PIX_FMT_NV12) |
+           (pix_fmt == PXP_PIX_FMT_NV21) |
+           (pix_fmt == PXP_PIX_FMT_NV16) |
+           (pix_fmt == PXP_PIX_FMT_NV61) |
+           (pix_fmt == PXP_PIX_FMT_GREY) |
+           (pix_fmt == PXP_PIX_FMT_GY04) |
+           (pix_fmt == PXP_PIX_FMT_YVU410P) |
+           (pix_fmt == PXP_PIX_FMT_YUV410P) |
+           (pix_fmt == PXP_PIX_FMT_YVU420P) |
+           (pix_fmt == PXP_PIX_FMT_YUV420P) |
+           (pix_fmt == PXP_PIX_FMT_YUV420P2) |
+           (pix_fmt == PXP_PIX_FMT_YVU422P) |
+           (pix_fmt == PXP_PIX_FMT_YUV422P)) {
+               return true;
+       } else {
+               return false;
+       }
+}
+
+
+static void pxp_set_ctrl(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+       u32 ctrl;
+       u32 fmt_ctrl;
+       int need_swap = 0;   /* to support YUYV and YVYU formats */
+
+       /* Configure S0 input format */
+       switch (pxp_conf->s0_param.pixel_fmt) {
+       case PXP_PIX_FMT_RGB32:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__RGB888;
+               break;
+       case PXP_PIX_FMT_RGB565:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__RGB565;
+               break;
+       case PXP_PIX_FMT_RGB555:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__RGB555;
+               break;
+       case PXP_PIX_FMT_YUV420P:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV420;
+               break;
+       case PXP_PIX_FMT_YVU420P:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV420;
+               break;
+       case PXP_PIX_FMT_GREY:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__Y8;
+               break;
+       case PXP_PIX_FMT_GY04:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__Y4;
+               break;
+       case PXP_PIX_FMT_VUY444:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV1P444;
+               break;
+       case PXP_PIX_FMT_YUV422P:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV422;
+               break;
+       case PXP_PIX_FMT_UYVY:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__UYVY1P422;
+               break;
+       case PXP_PIX_FMT_YUYV:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__UYVY1P422;
+               need_swap = 1;
+               break;
+       case PXP_PIX_FMT_VYUY:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__VYUY1P422;
+               break;
+       case PXP_PIX_FMT_YVYU:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__VYUY1P422;
+               need_swap = 1;
+               break;
+       case PXP_PIX_FMT_NV12:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV2P420;
+               break;
+       case PXP_PIX_FMT_NV21:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YVU2P420;
+               break;
+       case PXP_PIX_FMT_NV16:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV2P422;
+               break;
+       case PXP_PIX_FMT_NV61:
+               fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YVU2P422;
+               break;
+       default:
+               fmt_ctrl = 0;
+       }
+
+       ctrl = BF_PXP_PS_CTRL_FORMAT(fmt_ctrl) |
+               (need_swap ? BM_PXP_PS_CTRL_WB_SWAP : 0);
+       __raw_writel(ctrl, pxp->base + HW_PXP_PS_CTRL_SET);
+
+       /* Configure output format based on out_channel format */
+       switch (pxp_conf->out_param.pixel_fmt) {
+       case PXP_PIX_FMT_RGB32:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__RGB888;
+               break;
+       case PXP_PIX_FMT_BGRA32:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__ARGB8888;
+               break;
+       case PXP_PIX_FMT_RGB24:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__RGB888P;
+               break;
+       case PXP_PIX_FMT_RGB565:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__RGB565;
+               break;
+       case PXP_PIX_FMT_RGB555:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__RGB555;
+               break;
+       case PXP_PIX_FMT_GREY:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__Y8;
+               break;
+       case PXP_PIX_FMT_GY04:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__Y4;
+               break;
+       case PXP_PIX_FMT_UYVY:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__UYVY1P422;
+               break;
+       case PXP_PIX_FMT_VYUY:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__VYUY1P422;
+               break;
+       case PXP_PIX_FMT_NV12:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__YUV2P420;
+               break;
+       case PXP_PIX_FMT_NV21:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__YVU2P420;
+               break;
+       case PXP_PIX_FMT_NV16:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__YUV2P422;
+               break;
+       case PXP_PIX_FMT_NV61:
+               fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__YVU2P422;
+               break;
+       default:
+               fmt_ctrl = 0;
+       }
+
+       ctrl = BF_PXP_OUT_CTRL_FORMAT(fmt_ctrl);
+       __raw_writel(ctrl, pxp->base + HW_PXP_OUT_CTRL);
+
+       ctrl = 0;
+       if (proc_data->scaling)
+               ;
+       if (proc_data->vflip)
+               ctrl |= BM_PXP_CTRL_VFLIP0;
+       if (proc_data->hflip)
+               ctrl |= BM_PXP_CTRL_HFLIP0;
+       if (proc_data->rotate) {
+               ctrl |= BF_PXP_CTRL_ROTATE0(proc_data->rotate / 90);
+#if 0
+               if (proc_data->rot_pos)
+                       ctrl |= BM_PXP_CTRL_ROT_POS;
+#endif
+       }
+
+       /* In default, the block size is set to 8x8
+        * But block size can be set to 16x16 due to
+        * blocksize variable modification
+        */
+       ctrl |= block_size << 23;
+
+       __raw_writel(ctrl, pxp->base + HW_PXP_CTRL);
+}
+
+static int pxp_start(struct pxps *pxp)
+{
+       __raw_writel(BM_PXP_CTRL_IRQ_ENABLE, pxp->base + HW_PXP_CTRL_SET);
+       __raw_writel(BM_PXP_CTRL_ENABLE | BM_PXP_CTRL_ENABLE_CSC2 |
+               BM_PXP_CTRL_ENABLE_LUT | BM_PXP_CTRL_ENABLE_ROTATE0 |
+               BM_PXP_CTRL_ENABLE_PS_AS_OUT, pxp->base + HW_PXP_CTRL_SET);
+       dump_pxp_reg(pxp);
+
+       return 0;
+}
+
+static void pxp_set_outbuf(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *out_params = &pxp_conf->out_param;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+
+       __raw_writel(out_params->paddr, pxp->base + HW_PXP_OUT_BUF);
+
+       if ((out_params->pixel_fmt == PXP_PIX_FMT_NV12) ||
+               (out_params->pixel_fmt == PXP_PIX_FMT_NV21) ||
+               (out_params->pixel_fmt == PXP_PIX_FMT_NV16) ||
+               (out_params->pixel_fmt == PXP_PIX_FMT_NV61)) {
+               dma_addr_t Y, U;
+
+               Y = out_params->paddr;
+               U = Y + (out_params->width * out_params->height);
+
+               __raw_writel(U, pxp->base + HW_PXP_OUT_BUF2);
+       }
+
+       if (proc_data->rotate == 90 || proc_data->rotate == 270)
+               __raw_writel(BF_PXP_OUT_LRC_X(out_params->height - 1) |
+                               BF_PXP_OUT_LRC_Y(out_params->width - 1),
+                               pxp->base + HW_PXP_OUT_LRC);
+       else
+               __raw_writel(BF_PXP_OUT_LRC_X(out_params->width - 1) |
+                               BF_PXP_OUT_LRC_Y(out_params->height - 1),
+                               pxp->base + HW_PXP_OUT_LRC);
+
+       if (out_params->pixel_fmt == PXP_PIX_FMT_RGB24) {
+               __raw_writel(out_params->stride * 3,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if (out_params->pixel_fmt == PXP_PIX_FMT_BGRA32 ||
+                out_params->pixel_fmt == PXP_PIX_FMT_RGB32) {
+               __raw_writel(out_params->stride << 2,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if ((out_params->pixel_fmt == PXP_PIX_FMT_RGB565) ||
+                  (out_params->pixel_fmt == PXP_PIX_FMT_RGB555)) {
+               __raw_writel(out_params->stride << 1,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if (out_params->pixel_fmt == PXP_PIX_FMT_UYVY ||
+               (out_params->pixel_fmt == PXP_PIX_FMT_VYUY)) {
+               __raw_writel(out_params->stride << 1,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if (out_params->pixel_fmt == PXP_PIX_FMT_GREY ||
+                  out_params->pixel_fmt == PXP_PIX_FMT_NV12 ||
+                  out_params->pixel_fmt == PXP_PIX_FMT_NV21 ||
+                  out_params->pixel_fmt == PXP_PIX_FMT_NV16 ||
+                  out_params->pixel_fmt == PXP_PIX_FMT_NV61) {
+               __raw_writel(out_params->stride,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else if (out_params->pixel_fmt == PXP_PIX_FMT_GY04) {
+               __raw_writel(out_params->stride >> 1,
+                               pxp->base + HW_PXP_OUT_PITCH);
+       } else {
+               __raw_writel(0, pxp->base + HW_PXP_OUT_PITCH);
+       }
+
+       /* set global alpha if necessary */
+       if (out_params->global_alpha_enable) {
+               __raw_writel(out_params->global_alpha << 24,
+                               pxp->base + HW_PXP_OUT_CTRL_SET);
+               __raw_writel(BM_PXP_OUT_CTRL_ALPHA_OUTPUT,
+                               pxp->base + HW_PXP_OUT_CTRL_SET);
+       }
+}
+
+static void pxp_set_s0colorkey(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *s0_params = &pxp_conf->s0_param;
+
+       /* Low and high are set equal. V4L does not allow a chromakey range */
+       if (s0_params->color_key_enable == 0 || s0_params->color_key == -1) {
+               /* disable color key */
+               __raw_writel(0xFFFFFF, pxp->base + HW_PXP_PS_CLRKEYLOW_0);
+               __raw_writel(0, pxp->base + HW_PXP_PS_CLRKEYHIGH_0);
+       } else {
+               __raw_writel(s0_params->color_key,
+                            pxp->base + HW_PXP_PS_CLRKEYLOW_0);
+               __raw_writel(s0_params->color_key,
+                            pxp->base + HW_PXP_PS_CLRKEYHIGH_0);
+       }
+}
+
+static void pxp_set_olcolorkey(int layer_no, struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *ol_params = &pxp_conf->ol_param[layer_no];
+
+       /* Low and high are set equal. V4L does not allow a chromakey range */
+       if (ol_params->color_key_enable != 0 && ol_params->color_key != -1) {
+               __raw_writel(ol_params->color_key,
+                            pxp->base + HW_PXP_AS_CLRKEYLOW_0);
+               __raw_writel(ol_params->color_key,
+                            pxp->base + HW_PXP_AS_CLRKEYHIGH_0);
+       } else {
+               /* disable color key */
+               __raw_writel(0xFFFFFF, pxp->base + HW_PXP_AS_CLRKEYLOW_0);
+               __raw_writel(0, pxp->base + HW_PXP_AS_CLRKEYHIGH_0);
+       }
+}
+
+static void pxp_set_oln(int layer_no, struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *olparams_data = &pxp_conf->ol_param[layer_no];
+       dma_addr_t phys_addr = olparams_data->paddr;
+       u32 pitch = olparams_data->stride ? olparams_data->stride :
+                                           olparams_data->width;
+
+       __raw_writel(phys_addr, pxp->base + HW_PXP_AS_BUF);
+
+       /* Fixme */
+       if (olparams_data->width == 0 && olparams_data->height == 0) {
+               __raw_writel(0xffffffff, pxp->base + HW_PXP_OUT_AS_ULC);
+               __raw_writel(0x0, pxp->base + HW_PXP_OUT_AS_LRC);
+       } else {
+               __raw_writel(0x0, pxp->base + HW_PXP_OUT_AS_ULC);
+               __raw_writel(BF_PXP_OUT_AS_LRC_X(olparams_data->width - 1) |
+                               BF_PXP_OUT_AS_LRC_Y(olparams_data->height - 1),
+                               pxp->base + HW_PXP_OUT_AS_LRC);
+       }
+
+       if ((olparams_data->pixel_fmt == PXP_PIX_FMT_BGRA32) ||
+                (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB32)) {
+               __raw_writel(pitch << 2,
+                               pxp->base + HW_PXP_AS_PITCH);
+       } else if ((olparams_data->pixel_fmt == PXP_PIX_FMT_RGB565) ||
+                  (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB555)) {
+               __raw_writel(pitch << 1,
+                               pxp->base + HW_PXP_AS_PITCH);
+       } else {
+               __raw_writel(0, pxp->base + HW_PXP_AS_PITCH);
+       }
+}
+
+static void pxp_set_olparam(int layer_no, struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *olparams_data = &pxp_conf->ol_param[layer_no];
+       u32 olparam;
+
+       olparam = BF_PXP_AS_CTRL_ALPHA(olparams_data->global_alpha);
+       if (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB32) {
+               olparam |=
+                   BF_PXP_AS_CTRL_FORMAT(BV_PXP_AS_CTRL_FORMAT__RGB888);
+       } else if (olparams_data->pixel_fmt == PXP_PIX_FMT_BGRA32) {
+               olparam |=
+                   BF_PXP_AS_CTRL_FORMAT(BV_PXP_AS_CTRL_FORMAT__ARGB8888);
+               if (!olparams_data->combine_enable) {
+                       olparam |=
+                               BF_PXP_AS_CTRL_ALPHA_CTRL
+                               (BV_PXP_AS_CTRL_ALPHA_CTRL__ROPs);
+                       olparam |= 0x3 << 16;
+               }
+       } else if (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB565) {
+               olparam |=
+                   BF_PXP_AS_CTRL_FORMAT(BV_PXP_AS_CTRL_FORMAT__RGB565);
+       } else if (olparams_data->pixel_fmt == PXP_PIX_FMT_RGB555) {
+               olparam |=
+                   BF_PXP_AS_CTRL_FORMAT(BV_PXP_AS_CTRL_FORMAT__RGB555);
+       }
+
+       if (olparams_data->global_alpha_enable) {
+               if (olparams_data->global_override) {
+                       olparam |=
+                               BF_PXP_AS_CTRL_ALPHA_CTRL
+                               (BV_PXP_AS_CTRL_ALPHA_CTRL__Override);
+               } else {
+                       olparam |=
+                               BF_PXP_AS_CTRL_ALPHA_CTRL
+                               (BV_PXP_AS_CTRL_ALPHA_CTRL__Multiply);
+               }
+               if (olparams_data->alpha_invert)
+                       olparam |= BM_PXP_AS_CTRL_ALPHA0_INVERT;
+       }
+       if (olparams_data->color_key_enable)
+               olparam |= BM_PXP_AS_CTRL_ENABLE_COLORKEY;
+
+       __raw_writel(olparam, pxp->base + HW_PXP_AS_CTRL);
+}
+
+static void pxp_set_s0param(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+       struct pxp_layer_param *out_params = &pxp_conf->out_param;
+       u32 s0param_ulc, s0param_lrc;
+
+       /* contains the coordinate for the PS in the OUTPUT buffer. */
+       if ((pxp_conf->s0_param).width == 0 &&
+               (pxp_conf->s0_param).height == 0) {
+               __raw_writel(0xffffffff, pxp->base + HW_PXP_OUT_PS_ULC);
+               __raw_writel(0x0, pxp->base + HW_PXP_OUT_PS_LRC);
+       } else {
+               switch (proc_data->rotate) {
+               case 0:
+                       s0param_ulc = BF_PXP_OUT_PS_ULC_X(proc_data->drect.left);
+                       s0param_ulc |= BF_PXP_OUT_PS_ULC_Y(proc_data->drect.top);
+                       s0param_lrc = BF_PXP_OUT_PS_LRC_X(((s0param_ulc & BM_PXP_OUT_PS_ULC_X) >> 16) + proc_data->drect.width - 1);
+                       s0param_lrc |= BF_PXP_OUT_PS_LRC_Y((s0param_ulc & BM_PXP_OUT_PS_ULC_Y) + proc_data->drect.height - 1);
+                       break;
+               case 90:
+                       s0param_ulc = BF_PXP_OUT_PS_ULC_Y(out_params->width - (proc_data->drect.left + proc_data->drect.width));
+                       s0param_ulc |= BF_PXP_OUT_PS_ULC_X(proc_data->drect.top);
+                       s0param_lrc = BF_PXP_OUT_PS_LRC_X(((s0param_ulc & BM_PXP_OUT_PS_ULC_X) >> 16) + proc_data->drect.height - 1);
+                       s0param_lrc |= BF_PXP_OUT_PS_LRC_Y((s0param_ulc & BM_PXP_OUT_PS_ULC_Y) + proc_data->drect.width - 1);
+                       break;
+               case 180:
+                       s0param_ulc = BF_PXP_OUT_PS_ULC_X(out_params->width - (proc_data->drect.left + proc_data->drect.width));
+                       s0param_ulc |= BF_PXP_OUT_PS_ULC_Y(out_params->height - (proc_data->drect.top + proc_data->drect.height));
+                       s0param_lrc = BF_PXP_OUT_PS_LRC_X(((s0param_ulc & BM_PXP_OUT_PS_ULC_X) >> 16) + proc_data->drect.width - 1);
+                       s0param_lrc |= BF_PXP_OUT_PS_LRC_Y((s0param_ulc & BM_PXP_OUT_PS_ULC_Y) + proc_data->drect.height - 1);
+                       break;
+               case 270:
+                       s0param_ulc = BF_PXP_OUT_PS_ULC_X(out_params->height - (proc_data->drect.top + proc_data->drect.height));
+                       s0param_ulc |= BF_PXP_OUT_PS_ULC_Y(proc_data->drect.left);
+                       s0param_lrc = BF_PXP_OUT_PS_LRC_X(((s0param_ulc & BM_PXP_OUT_PS_ULC_X) >> 16) + proc_data->drect.height - 1);
+                       s0param_lrc |= BF_PXP_OUT_PS_LRC_Y((s0param_ulc & BM_PXP_OUT_PS_ULC_Y) + proc_data->drect.width - 1);
+                       break;
+               default:
+                       return;
+               }
+               __raw_writel(s0param_ulc, pxp->base + HW_PXP_OUT_PS_ULC);
+               __raw_writel(s0param_lrc, pxp->base + HW_PXP_OUT_PS_LRC);
+       }
+
+       /* Since user apps always pass the rotated drect
+        * to this driver, we need to first swap the width
+        * and height which is used to calculate the scale
+        * factors later.
+        */
+       if (proc_data->rotate == 90 || proc_data->rotate == 270) {
+               int temp;
+               temp = proc_data->drect.width;
+               proc_data->drect.width = proc_data->drect.height;
+               proc_data->drect.height = temp;
+       }
+}
+
+/* crop behavior is re-designed in h/w. */
+static void pxp_set_s0crop(struct pxps *pxp)
+{
+       /*
+        * place-holder, it's implemented in other functions in this driver.
+        * Refer to "Clipping source images" section in RM for detail.
+        */
+}
+
+static int pxp_set_scaling(struct pxps *pxp)
+{
+       int ret = 0;
+       u32 xscale, yscale, s0scale;
+       u32 decx, decy, xdec = 0, ydec = 0;
+       struct pxp_proc_data *proc_data = &pxp->pxp_conf_state.proc_data;
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *s0_params = &pxp_conf->s0_param;
+       struct pxp_layer_param *out_params = &pxp_conf->out_param;
+
+       proc_data->scaling = 1;
+       decx = proc_data->srect.width / proc_data->drect.width;
+       decy = proc_data->srect.height / proc_data->drect.height;
+       if (decx > 1) {
+               if (decx >= 2 && decx < 4) {
+                       decx = 2;
+                       xdec = 1;
+               } else if (decx >= 4 && decx < 8) {
+                       decx = 4;
+                       xdec = 2;
+               } else if (decx >= 8) {
+                       decx = 8;
+                       xdec = 3;
+               }
+               xscale = proc_data->srect.width * 0x1000 /
+                        (proc_data->drect.width * decx);
+       } else {
+               if (!is_yuv(s0_params->pixel_fmt) ||
+                   (is_yuv(s0_params->pixel_fmt) ==
+                    is_yuv(out_params->pixel_fmt)) ||
+                   (s0_params->pixel_fmt == PXP_PIX_FMT_GREY) ||
+                   (s0_params->pixel_fmt == PXP_PIX_FMT_GY04) ||
+                   (s0_params->pixel_fmt == PXP_PIX_FMT_VUY444)) {
+                       if ((proc_data->srect.width > 1) &&
+                           (proc_data->drect.width > 1))
+                               xscale = (proc_data->srect.width - 1) * 0x1000 /
+                                        (proc_data->drect.width - 1);
+                       else
+                               xscale = proc_data->srect.width * 0x1000 /
+                                        proc_data->drect.width;
+               } else {
+                       if ((proc_data->srect.width > 2) &&
+                           (proc_data->drect.width > 1))
+                               xscale = (proc_data->srect.width - 2) * 0x1000 /
+                                        (proc_data->drect.width - 1);
+                       else
+                               xscale = proc_data->srect.width * 0x1000 /
+                                        proc_data->drect.width;
+               }
+       }
+       if (decy > 1) {
+               if (decy >= 2 && decy < 4) {
+                       decy = 2;
+                       ydec = 1;
+               } else if (decy >= 4 && decy < 8) {
+                       decy = 4;
+                       ydec = 2;
+               } else if (decy >= 8) {
+                       decy = 8;
+                       ydec = 3;
+               }
+               yscale = proc_data->srect.height * 0x1000 /
+                        (proc_data->drect.height * decy);
+       } else {
+               if ((proc_data->srect.height > 1) &&
+                   (proc_data->drect.height > 1))
+                       yscale = (proc_data->srect.height - 1) * 0x1000 /
+                                (proc_data->drect.height - 1);
+               else
+                       yscale = proc_data->srect.height * 0x1000 /
+                                proc_data->drect.height;
+       }
+
+       __raw_writel((xdec << 10) | (ydec << 8), pxp->base + HW_PXP_PS_CTRL);
+
+       if (xscale > PXP_DOWNSCALE_THRESHOLD)
+               xscale = PXP_DOWNSCALE_THRESHOLD;
+       if (yscale > PXP_DOWNSCALE_THRESHOLD)
+               yscale = PXP_DOWNSCALE_THRESHOLD;
+       s0scale = BF_PXP_PS_SCALE_YSCALE(yscale) |
+               BF_PXP_PS_SCALE_XSCALE(xscale);
+       __raw_writel(s0scale, pxp->base + HW_PXP_PS_SCALE);
+
+       pxp_set_ctrl(pxp);
+
+       return ret;
+}
+
+static void pxp_set_bg(struct pxps *pxp)
+{
+       __raw_writel(pxp->pxp_conf_state.proc_data.bgcolor,
+                    pxp->base + HW_PXP_PS_BACKGROUND_0);
+}
+
+static void pxp_set_lut(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       int lut_op = pxp_conf->proc_data.lut_transform;
+       u32 reg_val;
+       int i;
+       bool use_cmap = (lut_op & PXP_LUT_USE_CMAP) ? true : false;
+       u8 *cmap = pxp_conf->proc_data.lut_map;
+       u32 entry_src;
+       u32 pix_val;
+       u8 entry[4];
+
+       /*
+        * If LUT already configured as needed, return...
+        * Unless CMAP is needed and it has been updated.
+        */
+       if ((pxp->lut_state == lut_op) &&
+               !(use_cmap && pxp_conf->proc_data.lut_map_updated))
+               return;
+
+       if (lut_op == PXP_LUT_NONE) {
+               __raw_writel(BM_PXP_LUT_CTRL_BYPASS,
+                            pxp->base + HW_PXP_LUT_CTRL);
+       } else if (((lut_op & PXP_LUT_INVERT) != 0)
+               && ((lut_op & PXP_LUT_BLACK_WHITE) != 0)) {
+               /* Fill out LUT table with inverted monochromized values */
+
+               /* clear bypass bit, set lookup mode & out mode */
+               __raw_writel(BF_PXP_LUT_CTRL_LOOKUP_MODE
+                               (BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8) |
+                               BF_PXP_LUT_CTRL_OUT_MODE
+                               (BV_PXP_LUT_CTRL_OUT_MODE__Y8),
+                               pxp->base + HW_PXP_LUT_CTRL);
+
+               /* Initialize LUT address to 0 and set NUM_BYTES to 0 */
+               __raw_writel(0, pxp->base + HW_PXP_LUT_ADDR);
+
+               /* LUT address pointer auto-increments after each data write */
+               for (pix_val = 0; pix_val < 256; pix_val += 4) {
+                       for (i = 0; i < 4; i++) {
+                               entry_src = use_cmap ?
+                                       cmap[pix_val + i] : pix_val + i;
+                               entry[i] = (entry_src < 0x80) ? 0xFF : 0x00;
+                       }
+                       reg_val = (entry[3] << 24) | (entry[2] << 16) |
+                               (entry[1] << 8) | entry[0];
+                       __raw_writel(reg_val, pxp->base + HW_PXP_LUT_DATA);
+               }
+       } else if ((lut_op & PXP_LUT_INVERT) != 0) {
+               /* Fill out LUT table with 8-bit inverted values */
+
+               /* clear bypass bit, set lookup mode & out mode */
+               __raw_writel(BF_PXP_LUT_CTRL_LOOKUP_MODE
+                               (BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8) |
+                               BF_PXP_LUT_CTRL_OUT_MODE
+                               (BV_PXP_LUT_CTRL_OUT_MODE__Y8),
+                               pxp->base + HW_PXP_LUT_CTRL);
+
+               /* Initialize LUT address to 0 and set NUM_BYTES to 0 */
+               __raw_writel(0, pxp->base + HW_PXP_LUT_ADDR);
+
+               /* LUT address pointer auto-increments after each data write */
+               for (pix_val = 0; pix_val < 256; pix_val += 4) {
+                       for (i = 0; i < 4; i++) {
+                               entry_src = use_cmap ?
+                                       cmap[pix_val + i] : pix_val + i;
+                               entry[i] = ~entry_src & 0xFF;
+                       }
+                       reg_val = (entry[3] << 24) | (entry[2] << 16) |
+                               (entry[1] << 8) | entry[0];
+                       __raw_writel(reg_val, pxp->base + HW_PXP_LUT_DATA);
+               }
+       } else if ((lut_op & PXP_LUT_BLACK_WHITE) != 0) {
+               /* Fill out LUT table with 8-bit monochromized values */
+
+               /* clear bypass bit, set lookup mode & out mode */
+               __raw_writel(BF_PXP_LUT_CTRL_LOOKUP_MODE
+                               (BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8) |
+                               BF_PXP_LUT_CTRL_OUT_MODE
+                               (BV_PXP_LUT_CTRL_OUT_MODE__Y8),
+                               pxp->base + HW_PXP_LUT_CTRL);
+
+               /* Initialize LUT address to 0 and set NUM_BYTES to 0 */
+               __raw_writel(0, pxp->base + HW_PXP_LUT_ADDR);
+
+               /* LUT address pointer auto-increments after each data write */
+               for (pix_val = 0; pix_val < 256; pix_val += 4) {
+                       for (i = 0; i < 4; i++) {
+                               entry_src = use_cmap ?
+                                       cmap[pix_val + i] : pix_val + i;
+                               entry[i] = (entry_src < 0x80) ? 0x00 : 0xFF;
+                       }
+                       reg_val = (entry[3] << 24) | (entry[2] << 16) |
+                               (entry[1] << 8) | entry[0];
+                       __raw_writel(reg_val, pxp->base + HW_PXP_LUT_DATA);
+               }
+       } else if (use_cmap) {
+               /* Fill out LUT table using colormap values */
+
+               /* clear bypass bit, set lookup mode & out mode */
+               __raw_writel(BF_PXP_LUT_CTRL_LOOKUP_MODE
+                               (BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8) |
+                               BF_PXP_LUT_CTRL_OUT_MODE
+                               (BV_PXP_LUT_CTRL_OUT_MODE__Y8),
+                               pxp->base + HW_PXP_LUT_CTRL);
+
+               /* Initialize LUT address to 0 and set NUM_BYTES to 0 */
+               __raw_writel(0, pxp->base + HW_PXP_LUT_ADDR);
+
+               /* LUT address pointer auto-increments after each data write */
+               for (pix_val = 0; pix_val < 256; pix_val += 4) {
+                       for (i = 0; i < 4; i++)
+                               entry[i] = cmap[pix_val + i];
+                       reg_val = (entry[3] << 24) | (entry[2] << 16) |
+                               (entry[1] << 8) | entry[0];
+                       __raw_writel(reg_val, pxp->base + HW_PXP_LUT_DATA);
+               }
+       }
+
+       pxp->lut_state = lut_op;
+}
+
+static void pxp_set_csc(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *s0_params = &pxp_conf->s0_param;
+       struct pxp_layer_param *ol_params = &pxp_conf->ol_param[0];
+       struct pxp_layer_param *out_params = &pxp_conf->out_param;
+
+       bool input_is_YUV = is_yuv(s0_params->pixel_fmt);
+       bool output_is_YUV = is_yuv(out_params->pixel_fmt);
+
+       if (input_is_YUV && output_is_YUV) {
+               /*
+                * Input = YUV, Output = YUV
+                * No CSC unless we need to do combining
+                */
+               if (ol_params->combine_enable) {
+                       /* Must convert to RGB for combining with RGB overlay */
+
+                       /* CSC1 - YUV->RGB */
+                       __raw_writel(0x04030000, pxp->base + HW_PXP_CSC1_COEF0);
+                       __raw_writel(0x01230208, pxp->base + HW_PXP_CSC1_COEF1);
+                       __raw_writel(0x076b079c, pxp->base + HW_PXP_CSC1_COEF2);
+
+                       /* CSC2 - RGB->YUV */
+                       __raw_writel(0x4, pxp->base + HW_PXP_CSC2_CTRL);
+                       __raw_writel(0x0096004D, pxp->base + HW_PXP_CSC2_COEF0);
+                       __raw_writel(0x05DA001D, pxp->base + HW_PXP_CSC2_COEF1);
+                       __raw_writel(0x007005B6, pxp->base + HW_PXP_CSC2_COEF2);
+                       __raw_writel(0x057C009E, pxp->base + HW_PXP_CSC2_COEF3);
+                       __raw_writel(0x000005E6, pxp->base + HW_PXP_CSC2_COEF4);
+                       __raw_writel(0x00000000, pxp->base + HW_PXP_CSC2_COEF5);
+               } else {
+                       /* Input & Output both YUV, so bypass both CSCs */
+
+                       /* CSC1 - Bypass */
+                       __raw_writel(0x40000000, pxp->base + HW_PXP_CSC1_COEF0);
+
+                       /* CSC2 - Bypass */
+                       __raw_writel(0x1, pxp->base + HW_PXP_CSC2_CTRL);
+               }
+       } else if (input_is_YUV && !output_is_YUV) {
+               /*
+                * Input = YUV, Output = RGB
+                * Use CSC1 to convert to RGB
+                */
+
+               /* CSC1 - YUV->RGB */
+               __raw_writel(0x84ab01f0, pxp->base + HW_PXP_CSC1_COEF0);
+               __raw_writel(0x01980204, pxp->base + HW_PXP_CSC1_COEF1);
+               __raw_writel(0x0730079c, pxp->base + HW_PXP_CSC1_COEF2);
+
+               /* CSC2 - Bypass */
+               __raw_writel(0x1, pxp->base + HW_PXP_CSC2_CTRL);
+       } else if (!input_is_YUV && output_is_YUV) {
+               /*
+                * Input = RGB, Output = YUV
+                * Use CSC2 to convert to YUV
+                */
+
+               /* CSC1 - Bypass */
+               __raw_writel(0x40000000, pxp->base + HW_PXP_CSC1_COEF0);
+
+               /* CSC2 - RGB->YUV */
+               __raw_writel(0x4, pxp->base + HW_PXP_CSC2_CTRL);
+               __raw_writel(0x0096004D, pxp->base + HW_PXP_CSC2_COEF0);
+               __raw_writel(0x05DA001D, pxp->base + HW_PXP_CSC2_COEF1);
+               __raw_writel(0x007005B6, pxp->base + HW_PXP_CSC2_COEF2);
+               __raw_writel(0x057C009E, pxp->base + HW_PXP_CSC2_COEF3);
+               __raw_writel(0x000005E6, pxp->base + HW_PXP_CSC2_COEF4);
+               __raw_writel(0x00000000, pxp->base + HW_PXP_CSC2_COEF5);
+       } else {
+               /*
+                * Input = RGB, Output = RGB
+                * Input & Output both RGB, so bypass both CSCs
+                */
+
+               /* CSC1 - Bypass */
+               __raw_writel(0x40000000, pxp->base + HW_PXP_CSC1_COEF0);
+
+               /* CSC2 - Bypass */
+               __raw_writel(0x1, pxp->base + HW_PXP_CSC2_CTRL);
+       }
+
+       /* YCrCb colorspace */
+       /* Not sure when we use this...no YCrCb formats are defined for PxP */
+       /*
+          __raw_writel(0x84ab01f0, HW_PXP_CSCCOEFF0_ADDR);
+          __raw_writel(0x01230204, HW_PXP_CSCCOEFF1_ADDR);
+          __raw_writel(0x0730079c, HW_PXP_CSCCOEFF2_ADDR);
+        */
+
+}
+
+static void pxp_set_s0buf(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_layer_param *s0_params = &pxp_conf->s0_param;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+       dma_addr_t Y, U, V;
+       dma_addr_t Y1, U1, V1;
+       u32 offset, bpp = 1;
+       u32 pitch = s0_params->stride ? s0_params->stride :
+                                       s0_params->width;
+
+       Y = s0_params->paddr;
+
+       if ((s0_params->pixel_fmt == PXP_PIX_FMT_RGB565) ||
+               (s0_params->pixel_fmt == PXP_PIX_FMT_RGB555))
+               bpp = 2;
+       else if (s0_params->pixel_fmt == PXP_PIX_FMT_RGB32)
+               bpp = 4;
+       offset = (proc_data->srect.top * s0_params->width +
+                proc_data->srect.left) * bpp;
+       /* clipping or cropping */
+       Y1 = Y + offset;
+       __raw_writel(Y1, pxp->base + HW_PXP_PS_BUF);
+       if ((s0_params->pixel_fmt == PXP_PIX_FMT_YUV420P) ||
+           (s0_params->pixel_fmt == PXP_PIX_FMT_YVU420P) ||
+           (s0_params->pixel_fmt == PXP_PIX_FMT_GREY)    ||
+           (s0_params->pixel_fmt == PXP_PIX_FMT_YUV422P)) {
+               /* Set to 1 if YUV format is 4:2:2 rather than 4:2:0 */
+               int s = 2;
+               if (s0_params->pixel_fmt == PXP_PIX_FMT_YUV422P)
+                       s = 1;
+
+               offset = proc_data->srect.top * s0_params->width / 4 +
+                        proc_data->srect.left / 2;
+               U = Y + (s0_params->width * s0_params->height);
+               U1 = U + offset;
+               V = U + ((s0_params->width * s0_params->height) >> s);
+               V1 = V + offset;
+               if (s0_params->pixel_fmt == PXP_PIX_FMT_YVU420P) {
+                       __raw_writel(V1, pxp->base + HW_PXP_PS_UBUF);
+                       __raw_writel(U1, pxp->base + HW_PXP_PS_VBUF);
+               } else {
+                       __raw_writel(U1, pxp->base + HW_PXP_PS_UBUF);
+                       __raw_writel(V1, pxp->base + HW_PXP_PS_VBUF);
+               }
+       } else if ((s0_params->pixel_fmt == PXP_PIX_FMT_NV12) ||
+                (s0_params->pixel_fmt == PXP_PIX_FMT_NV21) ||
+                (s0_params->pixel_fmt == PXP_PIX_FMT_NV16) ||
+                (s0_params->pixel_fmt == PXP_PIX_FMT_NV61)) {
+               int s = 2;
+               if ((s0_params->pixel_fmt == PXP_PIX_FMT_NV16) ||
+                   (s0_params->pixel_fmt == PXP_PIX_FMT_NV61))
+                       s = 1;
+
+               offset = (proc_data->srect.top * s0_params->width +
+                         proc_data->srect.left) / s;
+               U = Y + (s0_params->width * s0_params->height);
+               U1 = U + offset;
+
+               __raw_writel(U1, pxp->base + HW_PXP_PS_UBUF);
+       }
+
+       /* TODO: only support RGB565, Y8, Y4, YUV420 */
+       if (s0_params->pixel_fmt == PXP_PIX_FMT_GREY ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_YUV420P ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_YVU420P ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_NV12 ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_NV21 ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_NV16 ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_NV61 ||
+           s0_params->pixel_fmt == PXP_PIX_FMT_YUV422P) {
+               __raw_writel(pitch, pxp->base + HW_PXP_PS_PITCH);
+       }
+       else if (s0_params->pixel_fmt == PXP_PIX_FMT_GY04)
+               __raw_writel(pitch >> 1,
+                               pxp->base + HW_PXP_PS_PITCH);
+       else if (s0_params->pixel_fmt == PXP_PIX_FMT_RGB32 ||
+                        s0_params->pixel_fmt == PXP_PIX_FMT_VUY444)
+               __raw_writel(pitch << 2,
+                               pxp->base + HW_PXP_PS_PITCH);
+       else if (s0_params->pixel_fmt == PXP_PIX_FMT_UYVY ||
+                s0_params->pixel_fmt == PXP_PIX_FMT_YUYV ||
+                s0_params->pixel_fmt == PXP_PIX_FMT_VYUY ||
+                s0_params->pixel_fmt == PXP_PIX_FMT_YVYU)
+               __raw_writel(pitch << 1,
+                               pxp->base + HW_PXP_PS_PITCH);
+       else if ((s0_params->pixel_fmt == PXP_PIX_FMT_RGB565) ||
+                (s0_params->pixel_fmt == PXP_PIX_FMT_RGB555))
+               __raw_writel(pitch << 1,
+                               pxp->base + HW_PXP_PS_PITCH);
+       else
+               __raw_writel(0, pxp->base + HW_PXP_PS_PITCH);
+}
+
+/**
+ * pxp_config() - configure PxP for a processing task
+ * @pxps:      PXP context.
+ * @pxp_chan:  PXP channel.
+ * @return:    0 on success or negative error code on failure.
+ */
+static int pxp_config(struct pxps *pxp, struct pxp_channel *pxp_chan)
+{
+       struct pxp_config_data *pxp_conf_data = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &pxp_conf_data->proc_data;
+       int ol_nr;
+       int i;
+
+       if ((proc_data->working_mode & PXP_MODE_STANDARD) == PXP_MODE_STANDARD) {
+
+               /* now only test dithering feature */
+               if ((proc_data->engine_enable & PXP_ENABLE_DITHER) == PXP_ENABLE_DITHER)
+                       pxp_dithering_process(pxp);
+
+               if ((proc_data->engine_enable & PXP_ENABLE_WFE_A) == PXP_ENABLE_WFE_A)
+               {
+                       /* We should enable histogram in standard mode 
+                        * in wfe_a processing for waveform mode selection
+                        */
+                       pxp_histogram_enable(pxp, pxp_conf_data->wfe_a_fetch_param[0].width,
+                                       pxp_conf_data->wfe_a_fetch_param[0].height);
+
+                       /* collision detection should be always enable in standard mode */
+                       pxp_luts_activate(pxp, (u64)proc_data->lut_status_1 |
+                                       ((u64)proc_data->lut_status_2 << 32));
+
+                       pxp_collision_detection_enable(pxp, pxp_conf_data->wfe_a_fetch_param[0].width,
+                                               pxp_conf_data->wfe_a_fetch_param[0].height);
+
+                       pxp_wfe_a_configure(pxp);
+                       pxp_wfe_a_process(pxp);
+               }
+
+               if ((proc_data->engine_enable & PXP_ENABLE_WFE_B) == PXP_ENABLE_WFE_B) {
+                       pxp_wfe_b_configure(pxp);
+                       pxp_wfe_b_process(pxp);
+               }
+
+               pxp_start2(pxp);
+
+               return 0;
+       }
+
+       /* Configure PxP regs */
+       pxp_set_ctrl(pxp);
+       pxp_set_s0param(pxp);
+       pxp_set_s0crop(pxp);
+       pxp_set_scaling(pxp);
+       ol_nr = pxp_conf_data->layer_nr - 2;
+       while (ol_nr > 0) {
+               i = pxp_conf_data->layer_nr - 2 - ol_nr;
+               pxp_set_oln(i, pxp);
+               pxp_set_olparam(i, pxp);
+               /* only the color key in higher overlay will take effect. */
+               pxp_set_olcolorkey(i, pxp);
+               ol_nr--;
+       }
+       pxp_set_s0colorkey(pxp);
+       pxp_set_csc(pxp);
+       pxp_set_bg(pxp);
+       pxp_set_lut(pxp);
+
+       pxp_set_s0buf(pxp);
+       pxp_set_outbuf(pxp);
+
+       pxp_start(pxp);
+
+       return 0;
+}
+
+static void pxp_clk_enable(struct pxps *pxp)
+{
+       mutex_lock(&pxp->clk_mutex);
+
+       if (pxp->clk_stat == CLK_STAT_ON) {
+               mutex_unlock(&pxp->clk_mutex);
+               return;
+       }
+
+       pm_runtime_get_sync(pxp->dev);
+
+       clk_prepare_enable(pxp->clk);
+       pxp->clk_stat = CLK_STAT_ON;
+
+       mutex_unlock(&pxp->clk_mutex);
+}
+
+static void pxp_clk_disable(struct pxps *pxp)
+{
+       unsigned long flags;
+
+       mutex_lock(&pxp->clk_mutex);
+
+       if (pxp->clk_stat == CLK_STAT_OFF) {
+               mutex_unlock(&pxp->clk_mutex);
+               return;
+       }
+
+       spin_lock_irqsave(&pxp->lock, flags);
+       if ((pxp->pxp_ongoing == 0) && list_empty(&head)) {
+               spin_unlock_irqrestore(&pxp->lock, flags);
+               clk_disable_unprepare(pxp->clk);
+               pxp->clk_stat = CLK_STAT_OFF;
+       } else
+               spin_unlock_irqrestore(&pxp->lock, flags);
+
+       pm_runtime_put_sync_suspend(pxp->dev);
+
+       mutex_unlock(&pxp->clk_mutex);
+}
+
+static inline void clkoff_callback(struct work_struct *w)
+{
+       struct pxps *pxp = container_of(w, struct pxps, work);
+
+       pxp_clk_disable(pxp);
+}
+
+static void pxp_clkoff_timer(unsigned long arg)
+{
+       struct pxps *pxp = (struct pxps *)arg;
+
+       if ((pxp->pxp_ongoing == 0) && list_empty(&head))
+               schedule_work(&pxp->work);
+       else
+               mod_timer(&pxp->clk_timer,
+                         jiffies + msecs_to_jiffies(timeout_in_ms));
+}
+
+static struct pxp_tx_desc *pxpdma_first_active(struct pxp_channel *pxp_chan)
+{
+       return list_entry(pxp_chan->active_list.next, struct pxp_tx_desc, list);
+}
+
+static struct pxp_tx_desc *pxpdma_first_queued(struct pxp_channel *pxp_chan)
+{
+       return list_entry(pxp_chan->queue.next, struct pxp_tx_desc, list);
+}
+
+/* called with pxp_chan->lock held */
+static void __pxpdma_dostart(struct pxp_channel *pxp_chan)
+{
+       struct pxp_dma *pxp_dma = to_pxp_dma(pxp_chan->dma_chan.device);
+       struct pxps *pxp = to_pxp(pxp_dma);
+       struct pxp_config_data *config_data = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &config_data->proc_data;
+       struct pxp_tx_desc *desc;
+       struct pxp_tx_desc *child;
+       int i = 0;
+
+       /* so far we presume only one transaction on active_list */
+       /* S0 */
+       desc = pxpdma_first_active(pxp_chan);
+       memcpy(&pxp->pxp_conf_state.s0_param,
+              &desc->layer_param.s0_param, sizeof(struct pxp_layer_param));
+       memcpy(&pxp->pxp_conf_state.proc_data,
+              &desc->proc_data, sizeof(struct pxp_proc_data));
+
+       /* Save PxP configuration */
+       list_for_each_entry(child, &desc->tx_list, list) {
+               if (i == 0) {   /* Output */
+                       memcpy(&pxp->pxp_conf_state.out_param,
+                              &child->layer_param.out_param,
+                              sizeof(struct pxp_layer_param));
+               } else if (i == 1) {    /* Overlay */
+                       memcpy(&pxp->pxp_conf_state.ol_param[i - 1],
+                              &child->layer_param.ol_param,
+                              sizeof(struct pxp_layer_param));
+               }
+
+               if (proc_data->engine_enable & PXP_ENABLE_DITHER) {
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_DITHER_FETCH0)
+                               memcpy(&pxp->pxp_conf_state.dither_fetch_param[0],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_DITHER_FETCH1)
+                               memcpy(&pxp->pxp_conf_state.dither_fetch_param[1],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_DITHER_STORE0)
+                               memcpy(&pxp->pxp_conf_state.dither_store_param[0],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_DITHER_STORE1)
+                               memcpy(&pxp->pxp_conf_state.dither_store_param[1],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+               }
+
+               if (proc_data->engine_enable & PXP_ENABLE_WFE_A) {
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_WFE_A_FETCH0)
+                               memcpy(&pxp->pxp_conf_state.wfe_a_fetch_param[0],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_WFE_A_FETCH1)
+                               memcpy(&pxp->pxp_conf_state.wfe_a_fetch_param[1],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_WFE_A_STORE0)
+                               memcpy(&pxp->pxp_conf_state.wfe_a_store_param[0],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_WFE_A_STORE1)
+                               memcpy(&pxp->pxp_conf_state.wfe_a_store_param[1],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+               }
+
+               if (proc_data->engine_enable & PXP_ENABLE_WFE_B) {
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_WFE_B_FETCH0)
+                               memcpy(&pxp->pxp_conf_state.wfe_b_fetch_param[0],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_WFE_B_FETCH1)
+                               memcpy(&pxp->pxp_conf_state.wfe_b_fetch_param[1],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_WFE_B_STORE0)
+                               memcpy(&pxp->pxp_conf_state.wfe_b_store_param[0],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+                       if (child->layer_param.processing_param.flag & PXP_BUF_FLAG_WFE_B_STORE1)
+                               memcpy(&pxp->pxp_conf_state.wfe_b_store_param[1],
+                                      &child->layer_param.processing_param,
+                                      sizeof(struct pxp_layer_param));
+               }
+
+               i++;
+       }
+       pr_debug("%s:%d S0 w/h %d/%d paddr %08x\n", __func__, __LINE__,
+                pxp->pxp_conf_state.s0_param.width,
+                pxp->pxp_conf_state.s0_param.height,
+                pxp->pxp_conf_state.s0_param.paddr);
+       pr_debug("%s:%d OUT w/h %d/%d paddr %08x\n", __func__, __LINE__,
+                pxp->pxp_conf_state.out_param.width,
+                pxp->pxp_conf_state.out_param.height,
+                pxp->pxp_conf_state.out_param.paddr);
+}
+
+static void pxpdma_dostart_work(struct pxps *pxp)
+{
+       struct pxp_channel *pxp_chan = NULL;
+       unsigned long flags, flags1;
+
+       spin_lock_irqsave(&pxp->lock, flags);
+       if (list_empty(&head)) {
+               pxp->pxp_ongoing = 0;
+               spin_unlock_irqrestore(&pxp->lock, flags);
+               return;
+       }
+
+       pxp_chan = list_entry(head.next, struct pxp_channel, list);
+
+       spin_lock_irqsave(&pxp_chan->lock, flags1);
+       if (!list_empty(&pxp_chan->active_list)) {
+               struct pxp_tx_desc *desc;
+               /* REVISIT */
+               desc = pxpdma_first_active(pxp_chan);
+               __pxpdma_dostart(pxp_chan);
+       }
+       spin_unlock_irqrestore(&pxp_chan->lock, flags1);
+
+       /* Configure PxP */
+       pxp_config(pxp, pxp_chan);
+
+       spin_unlock_irqrestore(&pxp->lock, flags);
+}
+
+static void pxpdma_dequeue(struct pxp_channel *pxp_chan, struct list_head *list)
+{
+       struct pxp_tx_desc *desc = NULL;
+       do {
+               desc = pxpdma_first_queued(pxp_chan);
+               list_move_tail(&desc->list, list);
+       } while (!list_empty(&pxp_chan->queue));
+}
+
+static dma_cookie_t pxp_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+       struct pxp_tx_desc *desc = to_tx_desc(tx);
+       struct pxp_channel *pxp_chan = to_pxp_channel(tx->chan);
+       dma_cookie_t cookie;
+       unsigned long flags;
+
+       dev_dbg(&pxp_chan->dma_chan.dev->device, "received TX\n");
+
+       mutex_lock(&pxp_chan->chan_mutex);
+
+       cookie = pxp_chan->dma_chan.cookie;
+
+       if (++cookie < 0)
+               cookie = 1;
+
+       /* from dmaengine.h: "last cookie value returned to client" */
+       pxp_chan->dma_chan.cookie = cookie;
+       tx->cookie = cookie;
+
+       /* pxp_chan->lock can be taken under ichan->lock, but not v.v. */
+       spin_lock_irqsave(&pxp_chan->lock, flags);
+
+       /* Here we add the tx descriptor to our PxP task queue. */
+       list_add_tail(&desc->list, &pxp_chan->queue);
+
+       spin_unlock_irqrestore(&pxp_chan->lock, flags);
+
+       dev_dbg(&pxp_chan->dma_chan.dev->device, "done TX\n");
+
+       mutex_unlock(&pxp_chan->chan_mutex);
+       return cookie;
+}
+
+/* Called with pxp_chan->chan_mutex held */
+static int pxp_desc_alloc(struct pxp_channel *pxp_chan, int n)
+{
+       struct pxp_tx_desc *desc = vmalloc(n * sizeof(struct pxp_tx_desc));
+
+       if (!desc)
+               return -ENOMEM;
+
+       memset(desc, 0, n * sizeof(struct pxp_tx_desc));
+
+       pxp_chan->n_tx_desc = n;
+       pxp_chan->desc = desc;
+       INIT_LIST_HEAD(&pxp_chan->active_list);
+       INIT_LIST_HEAD(&pxp_chan->queue);
+       INIT_LIST_HEAD(&pxp_chan->free_list);
+
+       while (n--) {
+               struct dma_async_tx_descriptor *txd = &desc->txd;
+
+               memset(txd, 0, sizeof(*txd));
+               INIT_LIST_HEAD(&desc->tx_list);
+               dma_async_tx_descriptor_init(txd, &pxp_chan->dma_chan);
+               txd->tx_submit = pxp_tx_submit;
+
+               list_add(&desc->list, &pxp_chan->free_list);
+
+               desc++;
+       }
+
+       return 0;
+}
+
+/**
+ * pxp_init_channel() - initialize a PXP channel.
+ * @pxp_dma:   PXP DMA context.
+ * @pchan:  pointer to the channel object.
+ * @return      0 on success or negative error code on failure.
+ */
+static int pxp_init_channel(struct pxp_dma *pxp_dma,
+                           struct pxp_channel *pxp_chan)
+{
+       unsigned long flags;
+       struct pxps *pxp = to_pxp(pxp_dma);
+       int ret = 0, n_desc = 0;
+
+       /*
+        * We are using _virtual_ channel here.
+        * Each channel contains all parameters of corresponding layers
+        * for one transaction; each layer is represented as one descriptor
+        * (i.e., pxp_tx_desc) here.
+        */
+
+       spin_lock_irqsave(&pxp->lock, flags);
+
+       /* max desc nr: S0+OL+OUT = 1+8+1 */
+       n_desc = 24;
+
+       spin_unlock_irqrestore(&pxp->lock, flags);
+
+       if (n_desc && !pxp_chan->desc)
+               ret = pxp_desc_alloc(pxp_chan, n_desc);
+
+       return ret;
+}
+
+/**
+ * pxp_uninit_channel() - uninitialize a PXP channel.
+ * @pxp_dma:   PXP DMA context.
+ * @pchan:  pointer to the channel object.
+ * @return      0 on success or negative error code on failure.
+ */
+static int pxp_uninit_channel(struct pxp_dma *pxp_dma,
+                             struct pxp_channel *pxp_chan)
+{
+       int ret = 0;
+
+       if (pxp_chan->desc)
+               vfree(pxp_chan->desc);
+
+       pxp_chan->desc = NULL;
+
+       return ret;
+}
+
+static irqreturn_t pxp_irq(int irq, void *dev_id)
+{
+       struct pxps *pxp = dev_id;
+       struct pxp_channel *pxp_chan;
+       struct pxp_tx_desc *desc;
+       dma_async_tx_callback callback;
+       void *callback_param;
+       unsigned long flags, flags0;
+       u32 hist_status;
+       int pxp_irq_status = 0;
+
+       dump_pxp_reg(pxp);
+
+       spin_lock_irqsave(&pxp->lock, flags);
+
+       if (__raw_readl(pxp->base + HW_PXP_STAT) & BM_PXP_STAT_IRQ0)
+               __raw_writel(BM_PXP_STAT_IRQ0, pxp->base + HW_PXP_STAT_CLR);
+       else {
+               int irq_clr = 0;
+
+               pxp_irq_status = __raw_readl(pxp->base + HW_PXP_IRQ);
+               BUG_ON(!pxp_irq_status);
+
+               if (pxp_irq_status & BM_PXP_IRQ_WFE_B_STORE_IRQ)
+                       irq_clr |= BM_PXP_IRQ_WFE_B_STORE_IRQ;
+               if (pxp_irq_status & BM_PXP_IRQ_WFE_A_STORE_IRQ)
+                       irq_clr |= BM_PXP_IRQ_WFE_A_STORE_IRQ;
+               if (pxp_irq_status & BM_PXP_IRQ_DITHER_STORE_IRQ)
+                       irq_clr |= BM_PXP_IRQ_DITHER_STORE_IRQ;
+
+               if (pxp_irq_status & BM_PXP_IRQ_WFE_A_CH0_STORE_IRQ)
+                       irq_clr |= BM_PXP_IRQ_WFE_A_CH0_STORE_IRQ;
+               if (pxp_irq_status & BM_PXP_IRQ_WFE_A_CH1_STORE_IRQ)
+                       irq_clr |= BM_PXP_IRQ_WFE_A_CH1_STORE_IRQ;
+
+               if (pxp_irq_status & BM_PXP_IRQ_WFE_B_CH0_STORE_IRQ)
+                       irq_clr |= BM_PXP_IRQ_WFE_B_CH0_STORE_IRQ;
+               if (pxp_irq_status & BM_PXP_IRQ_WFE_B_CH1_STORE_IRQ)
+                       irq_clr |= BM_PXP_IRQ_WFE_B_CH1_STORE_IRQ;
+
+               if (pxp_irq_status & BM_PXP_IRQ_DITHER_CH0_PREFETCH_IRQ)
+                       irq_clr |= BM_PXP_IRQ_DITHER_CH0_PREFETCH_IRQ;
+               if (pxp_irq_status & BM_PXP_IRQ_DITHER_CH1_PREFETCH_IRQ)
+                       irq_clr |= BM_PXP_IRQ_DITHER_CH1_PREFETCH_IRQ;
+               if (pxp_irq_status & BM_PXP_IRQ_DITHER_CH0_STORE_IRQ)
+                       irq_clr |= BM_PXP_IRQ_DITHER_CH0_STORE_IRQ;
+               if (pxp_irq_status & BM_PXP_IRQ_DITHER_CH1_STORE_IRQ)
+                       irq_clr |= BM_PXP_IRQ_DITHER_CH1_STORE_IRQ;
+               /*XXX other irqs status clear should be added below */
+
+               __raw_writel(irq_clr, pxp->base + HW_PXP_IRQ_CLR);
+       }
+       pxp_collision_status_report(pxp, &col_info);
+       pxp_histogram_status_report(pxp, &hist_status);
+       /*XXX before a new update operation, we should
+        * always clear all the collision information
+        */
+       pxp_collision_detection_disable(pxp);
+       pxp_histogram_disable(pxp);
+
+       pxp_soft_reset(pxp);
+       __raw_writel(0xffff, pxp->base + HW_PXP_IRQ_MASK);
+
+       if (list_empty(&head)) {
+               pxp->pxp_ongoing = 0;
+               spin_unlock_irqrestore(&pxp->lock, flags);
+               return IRQ_NONE;
+       }
+
+       pxp_chan = list_entry(head.next, struct pxp_channel, list);
+       spin_lock_irqsave(&pxp_chan->lock, flags0);
+       list_del_init(&pxp_chan->list);
+
+       if (list_empty(&pxp_chan->active_list)) {
+               pr_debug("PXP_IRQ pxp_chan->active_list empty. chan_id %d\n",
+                        pxp_chan->dma_chan.chan_id);
+               pxp->pxp_ongoing = 0;
+               spin_unlock_irqrestore(&pxp_chan->lock, flags0);
+               spin_unlock_irqrestore(&pxp->lock, flags);
+               return IRQ_NONE;
+       }
+
+       /* Get descriptor and call callback */
+       desc = pxpdma_first_active(pxp_chan);
+
+       pxp_chan->completed = desc->txd.cookie;
+
+       callback = desc->txd.callback;
+       callback_param = desc->txd.callback_param;
+
+       /* Send histogram status back to caller */
+       desc->hist_status = hist_status;
+
+       if ((desc->txd.flags & DMA_PREP_INTERRUPT) && callback)
+               callback(callback_param);
+
+       pxp_chan->status = PXP_CHANNEL_INITIALIZED;
+
+       list_splice_init(&desc->tx_list, &pxp_chan->free_list);
+       list_move(&desc->list, &pxp_chan->free_list);
+       spin_unlock_irqrestore(&pxp_chan->lock, flags0);
+
+       up(&pxp->sema);
+       pxp->pxp_ongoing = 0;
+       mod_timer(&pxp->clk_timer, jiffies + msecs_to_jiffies(timeout_in_ms));
+
+       spin_unlock_irqrestore(&pxp->lock, flags);
+
+       return IRQ_HANDLED;
+}
+
+/* called with pxp_chan->lock held */
+static struct pxp_tx_desc *pxpdma_desc_get(struct pxp_channel *pxp_chan)
+{
+       struct pxp_tx_desc *desc, *_desc;
+       struct pxp_tx_desc *ret = NULL;
+
+       list_for_each_entry_safe(desc, _desc, &pxp_chan->free_list, list) {
+               list_del_init(&desc->list);
+               ret = desc;
+               break;
+       }
+
+       return ret;
+}
+
+/* called with pxp_chan->lock held */
+static void pxpdma_desc_put(struct pxp_channel *pxp_chan,
+                           struct pxp_tx_desc *desc)
+{
+       if (desc) {
+               struct device *dev = &pxp_chan->dma_chan.dev->device;
+               struct pxp_tx_desc *child;
+
+               list_for_each_entry(child, &desc->tx_list, list)
+                   dev_info(dev, "moving child desc %p to freelist\n", child);
+               list_splice_init(&desc->tx_list, &pxp_chan->free_list);
+               dev_info(dev, "moving desc %p to freelist\n", desc);
+               list_add(&desc->list, &pxp_chan->free_list);
+       }
+}
+
+/* Allocate and initialise a transfer descriptor. */
+static struct dma_async_tx_descriptor *pxp_prep_slave_sg(struct dma_chan *chan,
+                                                        struct scatterlist
+                                                        *sgl,
+                                                        unsigned int sg_len,
+                                                        enum
+                                                        dma_transfer_direction
+                                                        direction,
+                                                        unsigned long tx_flags,
+                                                        void *context)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+       struct pxp_dma *pxp_dma = to_pxp_dma(chan->device);
+       struct pxps *pxp = to_pxp(pxp_dma);
+       struct pxp_tx_desc *desc = NULL;
+       struct pxp_tx_desc *first = NULL, *prev = NULL;
+       struct scatterlist *sg;
+       unsigned long flags;
+       dma_addr_t phys_addr;
+       int i;
+
+       if (direction != DMA_DEV_TO_MEM && direction != DMA_MEM_TO_DEV) {
+               dev_err(chan->device->dev, "Invalid DMA direction %d!\n",
+                       direction);
+               return NULL;
+       }
+
+       if (unlikely(sg_len < 2))
+               return NULL;
+
+       spin_lock_irqsave(&pxp_chan->lock, flags);
+       for_each_sg(sgl, sg, sg_len, i) {
+               desc = pxpdma_desc_get(pxp_chan);
+               if (!desc) {
+                       pxpdma_desc_put(pxp_chan, first);
+                       dev_err(chan->device->dev, "Can't get DMA desc.\n");
+                       spin_unlock_irqrestore(&pxp_chan->lock, flags);
+                       return NULL;
+               }
+
+               phys_addr = sg_dma_address(sg);
+
+               if (!first) {
+                       first = desc;
+
+                       desc->layer_param.s0_param.paddr = phys_addr;
+               } else {
+                       list_add_tail(&desc->list, &first->tx_list);
+                       prev->next = desc;
+                       desc->next = NULL;
+
+                       if (i == 1)
+                               desc->layer_param.out_param.paddr = phys_addr;
+                       else
+                               desc->layer_param.ol_param.paddr = phys_addr;
+               }
+
+               prev = desc;
+       }
+       spin_unlock_irqrestore(&pxp_chan->lock, flags);
+
+       pxp->pxp_conf_state.layer_nr = sg_len;
+       first->txd.flags = tx_flags;
+       first->len = sg_len;
+       pr_debug("%s:%d first %p, first->len %d, flags %08x\n",
+                __func__, __LINE__, first, first->len, first->txd.flags);
+
+       return &first->txd;
+}
+
+static void pxp_issue_pending(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+       struct pxp_dma *pxp_dma = to_pxp_dma(chan->device);
+       struct pxps *pxp = to_pxp(pxp_dma);
+       unsigned long flags0, flags;
+
+       spin_lock_irqsave(&pxp->lock, flags0);
+       spin_lock_irqsave(&pxp_chan->lock, flags);
+
+       if (!list_empty(&pxp_chan->queue)) {
+               pxpdma_dequeue(pxp_chan, &pxp_chan->active_list);
+               pxp_chan->status = PXP_CHANNEL_READY;
+               list_add_tail(&pxp_chan->list, &head);
+       } else {
+               spin_unlock_irqrestore(&pxp_chan->lock, flags);
+               spin_unlock_irqrestore(&pxp->lock, flags0);
+               return;
+       }
+       spin_unlock_irqrestore(&pxp_chan->lock, flags);
+       spin_unlock_irqrestore(&pxp->lock, flags0);
+
+       pxp_clk_enable(pxp);
+       down(&pxp->sema);
+
+       spin_lock_irqsave(&pxp->lock, flags);
+       pxp->pxp_ongoing = 1;
+       spin_unlock_irqrestore(&pxp->lock, flags);
+       pxpdma_dostart_work(pxp);
+}
+
+static void __pxp_terminate_all(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+       unsigned long flags;
+
+       /* pchan->queue is modified in ISR, have to spinlock */
+       spin_lock_irqsave(&pxp_chan->lock, flags);
+       list_splice_init(&pxp_chan->queue, &pxp_chan->free_list);
+       list_splice_init(&pxp_chan->active_list, &pxp_chan->free_list);
+
+       spin_unlock_irqrestore(&pxp_chan->lock, flags);
+
+       pxp_chan->status = PXP_CHANNEL_INITIALIZED;
+}
+
+static int pxp_device_terminate_all(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+
+       spin_lock(&pxp_chan->lock);
+       __pxp_terminate_all(chan);
+       spin_unlock(&pxp_chan->lock);
+
+       return 0;
+}
+
+static int pxp_alloc_chan_resources(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+       struct pxp_dma *pxp_dma = to_pxp_dma(chan->device);
+       int ret;
+
+       /* dmaengine.c now guarantees to only offer free channels */
+       BUG_ON(chan->client_count > 1);
+       WARN_ON(pxp_chan->status != PXP_CHANNEL_FREE);
+
+       chan->cookie = 1;
+       pxp_chan->completed = -ENXIO;
+
+       pr_debug("%s dma_chan.chan_id %d\n", __func__, chan->chan_id);
+       ret = pxp_init_channel(pxp_dma, pxp_chan);
+       if (ret < 0)
+               goto err_chan;
+
+       pxp_chan->status = PXP_CHANNEL_INITIALIZED;
+
+       dev_dbg(&chan->dev->device, "Found channel 0x%x, irq %d\n",
+               chan->chan_id, pxp_chan->eof_irq);
+
+       return ret;
+
+err_chan:
+       return ret;
+}
+
+static void pxp_free_chan_resources(struct dma_chan *chan)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+       struct pxp_dma *pxp_dma = to_pxp_dma(chan->device);
+
+       mutex_lock(&pxp_chan->chan_mutex);
+
+       __pxp_terminate_all(chan);
+
+       pxp_chan->status = PXP_CHANNEL_FREE;
+
+       pxp_uninit_channel(pxp_dma, pxp_chan);
+
+       mutex_unlock(&pxp_chan->chan_mutex);
+}
+
+static enum dma_status pxp_tx_status(struct dma_chan *chan,
+                                    dma_cookie_t cookie,
+                                    struct dma_tx_state *txstate)
+{
+       struct pxp_channel *pxp_chan = to_pxp_channel(chan);
+
+       if (cookie != chan->cookie)
+               return DMA_ERROR;
+
+       if (txstate) {
+               txstate->last = pxp_chan->completed;
+               txstate->used = chan->cookie;
+               txstate->residue = 0;
+       }
+       return DMA_COMPLETE;
+}
+
+static void pxp_soft_reset(struct pxps *pxp)
+{
+       __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL_CLR);
+       __raw_writel(BM_PXP_CTRL_CLKGATE, pxp->base + HW_PXP_CTRL_CLR);
+
+       __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL_SET);
+       while (!(__raw_readl(pxp->base + HW_PXP_CTRL) & BM_PXP_CTRL_CLKGATE))
+               dev_dbg(pxp->dev, "%s: wait for clock gate off", __func__);
+
+       __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL_CLR);
+       __raw_writel(BM_PXP_CTRL_CLKGATE, pxp->base + HW_PXP_CTRL_CLR);
+}
+
+static void pxp_sram_init(struct pxps *pxp, u32 select,
+                       u32 buffer_addr, u32 length)
+{
+       u32 i;
+
+       __raw_writel(
+               BF_PXP_INIT_MEM_CTRL_ADDR(0) |
+               BF_PXP_INIT_MEM_CTRL_SELECT(select) |
+               BF_PXP_INIT_MEM_CTRL_START(1),
+               pxp->base + HW_PXP_INIT_MEM_CTRL);
+
+       if ((select == WFE_A) || (select == WFE_B)) {
+               for (i = 0; i < length / 2; i++) {
+                       __raw_writel(*(((u32*)buffer_addr) + 2 * i + 1),
+                               pxp->base + HW_PXP_INIT_MEM_DATA_HIGH);
+
+                       __raw_writel(*(((u32*)buffer_addr) + 2 * i),
+                               pxp->base + HW_PXP_INIT_MEM_DATA);
+               }
+       } else {
+               for (i = 0; i < length; i++) {
+                       __raw_writel(*(((u32*) buffer_addr) + i),
+                               pxp->base + HW_PXP_INIT_MEM_DATA);
+               }
+       }
+
+       __raw_writel(
+               BF_PXP_INIT_MEM_CTRL_ADDR(0) |
+               BF_PXP_INIT_MEM_CTRL_SELECT(select) |
+               BF_PXP_INIT_MEM_CTRL_START(0),
+               pxp->base + HW_PXP_INIT_MEM_CTRL);
+}
+
+/*
+ * wfe a configuration
+ * configure wfe a engine for waveform processing
+ * including its fetch and store module
+ */
+static void pxp_wfe_a_configure(struct pxps *pxp)
+{
+       /* FETCH */
+       __raw_writel(
+               BF_PXP_WFA_FETCH_CTRL_BF1_EN(1) |
+               BF_PXP_WFA_FETCH_CTRL_BF1_HSK_MODE(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF1_BYTES_PP(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF1_SRAM_IF(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF1_BURST_LEN(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF1_BYPASS_MODE(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF2_EN(1) |
+               BF_PXP_WFA_FETCH_CTRL_BF2_HSK_MODE(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF2_BYTES_PP(1) |
+               BF_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF2_SRAM_IF(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF2_BURST_LEN(0) |
+               BF_PXP_WFA_FETCH_CTRL_BF2_BYPASS_MODE(0),
+               pxp->base + HW_PXP_WFA_FETCH_CTRL);
+
+       __raw_writel(
+               BF_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL0_MASK_BUF_SEL(1) |
+               BF_PXP_WFA_ARRAY_PIXEL0_MASK_H_OFS(0) |
+               BF_PXP_WFA_ARRAY_PIXEL0_MASK_L_OFS(3),
+               pxp->base + HW_PXP_WFA_ARRAY_PIXEL0_MASK);
+
+        __raw_writel(
+               BF_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL1_MASK_BUF_SEL(1) |
+               BF_PXP_WFA_ARRAY_PIXEL1_MASK_H_OFS(4) |
+               BF_PXP_WFA_ARRAY_PIXEL1_MASK_L_OFS(7),
+               pxp->base + HW_PXP_WFA_ARRAY_PIXEL1_MASK);
+
+        __raw_writel(
+               BF_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL3_MASK_BUF_SEL(1) |
+               BF_PXP_WFA_ARRAY_PIXEL3_MASK_H_OFS(8) |
+               BF_PXP_WFA_ARRAY_PIXEL3_MASK_L_OFS(9),
+               pxp->base + HW_PXP_WFA_ARRAY_PIXEL2_MASK);
+
+       __raw_writel(
+               BF_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL4_MASK_BUF_SEL(1) |
+               BF_PXP_WFA_ARRAY_PIXEL4_MASK_H_OFS(10) |
+               BF_PXP_WFA_ARRAY_PIXEL4_MASK_L_OFS(15),
+               pxp->base + HW_PXP_WFA_ARRAY_PIXEL3_MASK);
+
+       __raw_writel(
+               BF_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_Y(0) |
+               BF_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_X(0) |
+               BF_PXP_WFA_ARRAY_PIXEL2_MASK_BUF_SEL(0) |
+               BF_PXP_WFA_ARRAY_PIXEL2_MASK_H_OFS(4) |
+               BF_PXP_WFA_ARRAY_PIXEL2_MASK_L_OFS(7),
+               pxp->base + HW_PXP_WFA_ARRAY_PIXEL4_MASK);
+
+       __raw_writel(1, pxp->base + HW_PXP_WFA_ARRAY_REG2);
+
+       /* STORE */
+       __raw_writel(
+               BF_PXP_WFE_A_STORE_CTRL_CH0_CH_EN(1)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_EN(0)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_16(0)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_HANDSHAKE_EN(0)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_EN(0)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_LINE_NUM(0)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_STORE_BYPASS_EN(0)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_STORE_MEMORY_EN(1)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_PACK_IN_SEL(1)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_FILL_DATA_EN(0)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_WR_NUM_BYTES(8)|
+               BF_PXP_WFE_A_STORE_CTRL_CH0_COMBINE_2CHANNEL(1) |
+               BF_PXP_WFE_A_STORE_CTRL_CH0_ARBIT_EN(0),
+               pxp->base + HW_PXP_WFE_A_STORE_CTRL_CH0);
+
+       __raw_writel(
+                BF_PXP_WFE_A_STORE_CTRL_CH1_CH_EN(1)|
+                BF_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_EN(0)|
+                BF_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_16(0)|
+                BF_PXP_WFE_A_STORE_CTRL_CH1_HANDSHAKE_EN(0)|
+                BF_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_EN(0)|
+                BF_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM(0)|
+                BF_PXP_WFE_A_STORE_CTRL_CH1_STORE_BYPASS_EN(0)|
+                BF_PXP_WFE_A_STORE_CTRL_CH1_STORE_MEMORY_EN(1)|
+                BF_PXP_WFE_A_STORE_CTRL_CH1_PACK_IN_SEL(1)|
+                BF_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES(16),
+               pxp->base + HW_PXP_WFE_A_STORE_CTRL_CH1);
+
+       __raw_writel(
+               BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP(0)|
+               BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN(0)|
+               BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN(0)|
+               BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS(0),
+               pxp->base + HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH0);
+
+
+       __raw_writel(
+               BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP(1)|
+               BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN(0)|
+               BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN(0),
+               pxp->base + HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH1);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_FILL_DATA_CH0_FILL_DATA_CH0(0),
+               pxp->base + HW_PXP_WFE_A_STORE_FILL_DATA_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0(0x0),
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK0_H_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0(0xf), /* fetch CP */
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK0_L_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(0x0),
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK1_H_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(0xf00), /* fetch NP */
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK1_L_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0(0x0),
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK2_H_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0(0x00000),
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK2_L_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0(0x0),
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK3_H_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0(0x3f000000), /* fetch LUT */
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK3_L_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0(0xf),
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK4_H_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0(0x0), /* fetch Y4 */
+               pxp->base + HW_PXP_WFE_A_STORE_D_MASK4_L_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0(32) |
+               BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0(1) |
+               BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1(28)|
+               BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1(1) |
+               BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2(24)|
+               BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2(1)|
+               BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3(18)|
+               BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3(1),
+               pxp->base + HW_PXP_WFE_A_STORE_D_SHIFT_L_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4(28) |
+               BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4(0) |
+               BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5(0)|
+               BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5(0) |
+               BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6(0)|
+               BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6(0) |
+               BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7(0),
+               pxp->base + HW_PXP_WFE_A_STORE_D_SHIFT_H_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0(1)|
+               BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0(1)|
+               BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1(1)|
+               BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1(0)|
+               BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2(32+6)|
+               BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2(1)|
+               BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3(32+6)|
+               BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3(1),
+               pxp->base + HW_PXP_WFE_A_STORE_F_SHIFT_L_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK4(0)|
+               BF_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK5(0)|
+               BF_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK6(0)|
+               BF_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK7(0),
+               pxp->base + HW_PXP_WFE_A_STORE_F_MASK_H_CH0);
+
+
+       __raw_writel(
+               BF_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK0(0x1) |
+               BF_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK1(0x2) |
+               BF_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK2(0x4) |
+               BF_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK3(0x8),
+               pxp->base + HW_PXP_WFE_A_STORE_F_MASK_L_CH0);
+
+       /* ALU */
+       __raw_writel(BF_PXP_ALU_A_INST_ENTRY_ENTRY_ADDR(0),
+               pxp->base + HW_PXP_ALU_A_INST_ENTRY);
+
+       __raw_writel(BF_PXP_ALU_A_PARAM_PARAM0(0) |
+               BF_PXP_ALU_A_PARAM_PARAM1(0),
+               pxp->base + HW_PXP_ALU_A_PARAM);
+
+       __raw_writel(BF_PXP_ALU_A_CONFIG_BUF_ADDR(0),
+               pxp->base + HW_PXP_ALU_A_CONFIG);
+
+       __raw_writel(BF_PXP_ALU_A_LUT_CONFIG_MODE(0) |
+               BF_PXP_ALU_A_LUT_CONFIG_EN(0),
+               pxp->base + HW_PXP_ALU_A_LUT_CONFIG);
+
+       __raw_writel(BF_PXP_ALU_A_LUT_DATA0_LUT_DATA_L(0),
+               pxp->base + HW_PXP_ALU_A_LUT_DATA0);
+
+       __raw_writel(BF_PXP_ALU_A_LUT_DATA1_LUT_DATA_H(0),
+               pxp->base + HW_PXP_ALU_A_LUT_DATA1);
+
+       __raw_writel(BF_PXP_ALU_A_CTRL_BYPASS    (1) |
+               BF_PXP_ALU_A_CTRL_ENABLE    (1) |
+               BF_PXP_ALU_A_CTRL_START     (0) |
+               BF_PXP_ALU_A_CTRL_SW_RESET  (0),
+               pxp->base + HW_PXP_ALU_A_CTRL);
+
+       /* WFE A */
+       __raw_writel(0x3F3F3F03, pxp->base + HW_PXP_WFE_A_STAGE1_MUX0);
+       __raw_writel(0x0C00000C, pxp->base + HW_PXP_WFE_A_STAGE1_MUX1);
+       __raw_writel(0x01040000, pxp->base + HW_PXP_WFE_A_STAGE1_MUX2);
+       __raw_writel(0x0A0A0904, pxp->base + HW_PXP_WFE_A_STAGE1_MUX3);
+       __raw_writel(0x00000B0B, pxp->base + HW_PXP_WFE_A_STAGE1_MUX4);
+
+       __raw_writel(0x1800280E, pxp->base + HW_PXP_WFE_A_STAGE2_MUX0);
+       __raw_writel(0x00280E00, pxp->base + HW_PXP_WFE_A_STAGE2_MUX1);
+       __raw_writel(0x280E0018, pxp->base + HW_PXP_WFE_A_STAGE2_MUX2);
+       __raw_writel(0x00001800, pxp->base + HW_PXP_WFE_A_STAGE2_MUX3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STAGE2_MUX4);
+       __raw_writel(0x1800280E, pxp->base + HW_PXP_WFE_A_STAGE2_MUX5);
+       __raw_writel(0x00280E00, pxp->base + HW_PXP_WFE_A_STAGE2_MUX6);
+       __raw_writel(0x1A0E0018, pxp->base + HW_PXP_WFE_A_STAGE2_MUX7);
+       __raw_writel(0x1B002911, pxp->base + HW_PXP_WFE_A_STAGE2_MUX8);
+       __raw_writel(0x00002911, pxp->base + HW_PXP_WFE_A_STAGE2_MUX9);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STAGE2_MUX10);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STAGE2_MUX11);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STAGE2_MUX12);
+
+       __raw_writel(0x07060504, pxp->base + HW_PXP_WFE_A_STAGE3_MUX0);
+       __raw_writel(0x3F3F3F08, pxp->base + HW_PXP_WFE_A_STAGE3_MUX1);
+       __raw_writel(0x03020100, pxp->base + HW_PXP_WFE_A_STAGE3_MUX2);
+       __raw_writel(0x3F3F3F3F, pxp->base + HW_PXP_WFE_A_STAGE3_MUX3);
+
+       __raw_writel(0x000F0F0F, pxp->base + HW_PXP_WFE_A_STAGE2_5X6_MASKS_0);
+       __raw_writel(0x3f030100, pxp->base + HW_PXP_WFE_A_STAGE2_5X6_ADDR_0);
+
+       __raw_writel(0x00000700, pxp->base + HW_PXP_WFE_A_STG2_5X1_OUT0);
+       __raw_writel(0x0000F000, pxp->base + HW_PXP_WFE_A_STG2_5X1_OUT1);
+       __raw_writel(0x0000A000, pxp->base + HW_PXP_WFE_A_STG2_5X1_OUT2);
+       __raw_writel(0x000000C0, pxp->base + HW_PXP_WFE_A_STG2_5X1_OUT3);
+       __raw_writel(0x070F0F0F, pxp->base + HW_PXP_WFE_A_STG2_5X1_MASKS);
+
+       __raw_writel(0xFFFFFFFF, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT0_2);
+       __raw_writel(0xFFFFFFFF, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT0_3);
+       __raw_writel(0xFFFFFFFF, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT0_4);
+       __raw_writel(0xFFFFFFFF, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT0_5);
+       __raw_writel(0xFFFFFFFF, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT0_6);
+       __raw_writel(0xFFFFFFFF, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT0_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT1_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT1_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT1_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT1_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT1_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT1_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT1_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT1_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT2_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT2_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT2_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT2_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT2_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT2_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT2_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT2_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT3_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT3_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT3_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT3_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT3_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT3_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT3_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT3_7);
+
+       __raw_writel(0x04040404, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT0_0);
+       __raw_writel(0x04040404, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT0_1);
+       __raw_writel(0x04050505, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT0_2);
+       __raw_writel(0x04040404, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT0_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT0_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT0_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT0_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT0_7);
+
+       __raw_writel(0x05050505, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT1_0);
+       __raw_writel(0x05050505, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT1_1);
+       __raw_writel(0x05080808, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT1_2);
+       __raw_writel(0x05050505, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT1_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT1_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT1_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT1_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT1_7);
+
+       __raw_writel(0x07070707, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT2_0);
+       __raw_writel(0x07070707, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT2_1);
+       __raw_writel(0x070C0C0C, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT2_2);
+       __raw_writel(0x07070707, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT2_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT2_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT2_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT2_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT2_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT3_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT3_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT3_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT3_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT3_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT3_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT3_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_A_STG2_5X6_OUT3_7);
+}
+
+/*
+ *  wfe a processing
+ * use wfe a to process an update
+ * x,y,width,height:
+ *         coordinate and size of the update region
+ * wb:
+ *         working buffer, 16bpp
+ * upd:
+ *         update buffer, in Y4 with or without alpha, 8bpp
+ * twb:
+ *         temp working buffer, 16bpp
+ *         only used when reagl_en is 1
+ * y4c:
+ *         y4c buffer, {Y4[3:0],3'b000,collision}, 8bpp
+ * lut:
+ *         valid value 0-63
+ *         set to the lut used for next update
+ * partial:
+ *         0 - full update
+ *         1 - partial update
+ * reagl_en:
+ *         0 - use normal waveform algorithm
+ *         1 - enable reagl/-d waveform algorithm
+ * detection_only:
+ *         0 - write working buffer
+ *         1 - do no write working buffer, detection only
+ * alpha_en:
+ *         0 - upd is {Y4[3:0],4'b0000} format
+ *         1 - upd is {Y4[3:0],3'b000,alpha} format
+ */
+static void pxp_wfe_a_process(struct pxps *pxp)
+{
+       struct pxp_config_data *config_data = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &config_data->proc_data;
+       struct pxp_layer_param *fetch_ch0 = &config_data->wfe_a_fetch_param[0];
+       struct pxp_layer_param *fetch_ch1 = &config_data->wfe_a_fetch_param[1];
+       struct pxp_layer_param *store_ch0 = &config_data->wfe_a_store_param[0];
+       struct pxp_layer_param *store_ch1 = &config_data->wfe_a_store_param[1];
+       int v;
+
+       if (fetch_ch0->width != fetch_ch1->width ||
+               fetch_ch0->height != fetch_ch1->height) {
+               dev_err(pxp->dev, "width/height should be same for two fetch "
+                               "channels\n");
+       }
+
+       print_param(fetch_ch0, "wfe_a fetch_ch0");
+       print_param(fetch_ch1, "wfe_a fetch_ch1");
+       print_param(store_ch0, "wfe_a store_ch0");
+       print_param(store_ch1, "wfe_a store_ch1");
+
+       /* Fetch */
+       __raw_writel(fetch_ch0->paddr, pxp->base + HW_PXP_WFA_FETCH_BUF1_ADDR);
+
+       __raw_writel(BF_PXP_WFA_FETCH_BUF1_CORD_YCORD(fetch_ch0->top) |
+               BF_PXP_WFA_FETCH_BUF1_CORD_XCORD(fetch_ch0->left),
+               pxp->base + HW_PXP_WFA_FETCH_BUF1_CORD);
+
+       __raw_writel(fetch_ch0->stride, pxp->base + HW_PXP_WFA_FETCH_BUF1_PITCH);
+
+       __raw_writel(BF_PXP_WFA_FETCH_BUF1_SIZE_BUF_HEIGHT(fetch_ch0->height - 1) |
+               BF_PXP_WFA_FETCH_BUF1_SIZE_BUF_WIDTH(fetch_ch0->width - 1),
+               pxp->base + HW_PXP_WFA_FETCH_BUF1_SIZE);
+
+       __raw_writel(fetch_ch1->paddr, pxp->base + HW_PXP_WFA_FETCH_BUF2_ADDR);
+
+       __raw_writel(BF_PXP_WFA_FETCH_BUF2_CORD_YCORD(fetch_ch1->top) |
+               BF_PXP_WFA_FETCH_BUF2_CORD_XCORD(fetch_ch1->left),
+               pxp->base + HW_PXP_WFA_FETCH_BUF2_CORD);
+
+       __raw_writel(fetch_ch1->stride * 2, pxp->base + HW_PXP_WFA_FETCH_BUF2_PITCH);
+
+       __raw_writel(BF_PXP_WFA_FETCH_BUF2_SIZE_BUF_HEIGHT(fetch_ch1->height - 1) |
+               BF_PXP_WFA_FETCH_BUF2_SIZE_BUF_WIDTH(fetch_ch1->width - 1),
+               pxp->base + HW_PXP_WFA_FETCH_BUF2_SIZE);
+
+       /* Store */
+       __raw_writel(BF_PXP_WFE_A_STORE_SIZE_CH0_OUT_WIDTH(store_ch0->width - 1) |
+               BF_PXP_WFE_A_STORE_SIZE_CH0_OUT_HEIGHT(store_ch0->height - 1),
+               pxp->base + HW_PXP_WFE_A_STORE_SIZE_CH0);
+
+
+       __raw_writel(BF_PXP_WFE_A_STORE_SIZE_CH1_OUT_WIDTH(store_ch1->width - 1) |
+               BF_PXP_WFE_A_STORE_SIZE_CH1_OUT_HEIGHT(store_ch1->height - 1),
+               pxp->base + HW_PXP_WFE_A_STORE_SIZE_CH1);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_PITCH_CH0_OUT_PITCH(store_ch0->stride) |
+               BF_PXP_WFE_A_STORE_PITCH_CH1_OUT_PITCH(store_ch1->stride * 2),
+               pxp->base + HW_PXP_WFE_A_STORE_PITCH);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_ADDR_0_CH0_OUT_BASE_ADDR0(store_ch0->paddr),
+               pxp->base + HW_PXP_WFE_A_STORE_ADDR_0_CH0);
+       __raw_writel(BF_PXP_WFE_A_STORE_ADDR_1_CH0_OUT_BASE_ADDR1(0),
+               pxp->base + HW_PXP_WFE_A_STORE_ADDR_1_CH0);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_ADDR_0_CH1_OUT_BASE_ADDR0(
+               store_ch1->paddr + (store_ch1->left + store_ch1->top *
+               store_ch1->stride) * 2),
+               pxp->base + HW_PXP_WFE_A_STORE_ADDR_0_CH1);
+
+       __raw_writel(BF_PXP_WFE_A_STORE_ADDR_1_CH1_OUT_BASE_ADDR1(0),
+               pxp->base + HW_PXP_WFE_A_STORE_ADDR_1_CH1);
+
+       /* ALU */
+       __raw_writel(BF_PXP_ALU_A_BUF_SIZE_BUF_WIDTH(fetch_ch0->width) |
+               BF_PXP_ALU_A_BUF_SIZE_BUF_HEIGHT(fetch_ch0->height),
+               pxp->base + HW_PXP_ALU_A_BUF_SIZE);
+
+       /* WFE */
+       __raw_writel(BF_PXP_WFE_A_DIMENSIONS_WIDTH(fetch_ch0->width) |
+               BF_PXP_WFE_A_DIMENSIONS_HEIGHT(fetch_ch0->height),
+               pxp->base + HW_PXP_WFE_A_DIMENSIONS);
+
+       /* Here it should be fetch_ch1 */
+       __raw_writel(BF_PXP_WFE_A_OFFSET_X_OFFSET(fetch_ch1->left) |
+               BF_PXP_WFE_A_OFFSET_Y_OFFSET(fetch_ch1->top),
+               pxp->base + HW_PXP_WFE_A_OFFSET);
+
+       __raw_writel((proc_data->lut & 0x000000FF) | 0x00000F00,
+                       pxp->base + HW_PXP_WFE_A_SW_DATA_REGS);
+       __raw_writel((proc_data->partial_update | (proc_data->reagl_en << 1)),
+                       pxp->base + HW_PXP_WFE_A_SW_FLAG_REGS);
+
+       __raw_writel(
+               BF_PXP_WFE_A_CTRL_ENABLE(1) |
+               BF_PXP_WFE_A_CTRL_SW_RESET(1),
+               pxp->base + HW_PXP_WFE_A_CTRL);
+
+       /* disable CH1 when only doing detection */
+       v = __raw_readl(pxp->base + HW_PXP_WFE_A_STORE_CTRL_CH1);
+       if (proc_data->detection_only) {
+               v &= ~BF_PXP_WFE_A_STORE_CTRL_CH1_CH_EN(1);
+               printk(KERN_EMERG "%s: detection only happens\n", __func__);
+       } else
+               v |= BF_PXP_WFE_A_STORE_CTRL_CH1_CH_EN(1);
+       __raw_writel(v, pxp->base + HW_PXP_WFE_A_STORE_CTRL_CH1);
+}
+
+/*
+ * wfe b configuration
+ *
+ * configure wfe b engnine for reagl/-d waveform processing
+ */
+static void pxp_wfe_b_configure(struct pxps *pxp)
+{
+       /* Fetch */
+       __raw_writel(
+               BF_PXP_WFB_FETCH_CTRL_BF1_EN(1) |
+               BF_PXP_WFB_FETCH_CTRL_BF1_HSK_MODE(0) |
+               BF_PXP_WFB_FETCH_CTRL_BF1_BYTES_PP(0) |
+               BF_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE(1) |
+               BF_PXP_WFB_FETCH_CTRL_BF1_SRAM_IF(1) |
+               BF_PXP_WFB_FETCH_CTRL_BF1_BURST_LEN(0) |
+               BF_PXP_WFB_FETCH_CTRL_BF1_BYPASS_MODE(0) |
+               BF_PXP_WFB_FETCH_CTRL_BF1_BORDER_MODE(1) |
+               BF_PXP_WFB_FETCH_CTRL_BF2_EN(1) |
+               BF_PXP_WFB_FETCH_CTRL_BF2_HSK_MODE(0) |
+               BF_PXP_WFB_FETCH_CTRL_BF2_BYTES_PP(1) |
+               BF_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE(1) |
+               BF_PXP_WFB_FETCH_CTRL_BF2_SRAM_IF(0) |
+               BF_PXP_WFB_FETCH_CTRL_BF2_BURST_LEN(0) |
+               BF_PXP_WFB_FETCH_CTRL_BF2_BORDER_MODE(1) |
+               BF_PXP_WFB_FETCH_CTRL_BF2_BYPASS_MODE(0),
+               pxp->base + HW_PXP_WFB_FETCH_CTRL);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL0_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_PIXEL0_MASK_H_OFS(0) |
+               BF_PXP_WFB_ARRAY_PIXEL0_MASK_L_OFS(7),
+               pxp->base + HW_PXP_WFB_ARRAY_PIXEL0_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL1_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_PIXEL1_MASK_H_OFS(10) |
+               BF_PXP_WFB_ARRAY_PIXEL1_MASK_L_OFS(15),
+               pxp->base + HW_PXP_WFB_ARRAY_PIXEL1_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL2_MASK_BUF_SEL(0) |
+               BF_PXP_WFB_ARRAY_PIXEL2_MASK_H_OFS(2) |
+               BF_PXP_WFB_ARRAY_PIXEL2_MASK_L_OFS(7),
+               pxp->base + HW_PXP_WFB_ARRAY_PIXEL2_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL3_MASK_BUF_SEL(0) |
+               BF_PXP_WFB_ARRAY_PIXEL3_MASK_H_OFS(0) |
+               BF_PXP_WFB_ARRAY_PIXEL3_MASK_L_OFS(7),
+               pxp->base + HW_PXP_WFB_ARRAY_PIXEL3_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_X(1) |
+               BF_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_X(1) |
+               BF_PXP_WFB_ARRAY_PIXEL4_MASK_BUF_SEL(0) |
+               BF_PXP_WFB_ARRAY_PIXEL4_MASK_H_OFS(0) |
+               BF_PXP_WFB_ARRAY_PIXEL4_MASK_L_OFS(7),
+               pxp->base + HW_PXP_WFB_ARRAY_PIXEL4_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_X(1) |
+               BF_PXP_WFB_ARRAY_PIXEL5_MASK_BUF_SEL(0) |
+               BF_PXP_WFB_ARRAY_PIXEL5_MASK_H_OFS(0) |
+               BF_PXP_WFB_ARRAY_PIXEL5_MASK_L_OFS(7),
+               pxp->base + HW_PXP_WFB_ARRAY_PIXEL5_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_Y(1) |
+               BF_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_Y(1) |
+               BF_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL6_MASK_BUF_SEL(0) |
+               BF_PXP_WFB_ARRAY_PIXEL6_MASK_H_OFS(0) |
+               BF_PXP_WFB_ARRAY_PIXEL6_MASK_L_OFS(7),
+               pxp->base + HW_PXP_WFB_ARRAY_PIXEL6_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_Y(1) |
+               BF_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_PIXEL7_MASK_BUF_SEL(0) |
+               BF_PXP_WFB_ARRAY_PIXEL7_MASK_H_OFS(0) |
+               BF_PXP_WFB_ARRAY_PIXEL7_MASK_L_OFS(7),
+               pxp->base + HW_PXP_WFB_ARRAY_PIXEL7_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG0_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG0_MASK_H_OFS(8) |
+               BF_PXP_WFB_ARRAY_FLAG0_MASK_L_OFS(8),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG0_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG1_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG1_MASK_H_OFS(9) |
+               BF_PXP_WFB_ARRAY_FLAG1_MASK_L_OFS(9),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG1_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_X(1) |
+               BF_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_X(1) |
+               BF_PXP_WFB_ARRAY_FLAG2_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG2_MASK_H_OFS(8) |
+               BF_PXP_WFB_ARRAY_FLAG2_MASK_L_OFS(8),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG2_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_X(1) |
+               BF_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_X(1) |
+               BF_PXP_WFB_ARRAY_FLAG3_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG3_MASK_H_OFS(9) |
+               BF_PXP_WFB_ARRAY_FLAG3_MASK_L_OFS(9),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG3_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_X(1) |
+               BF_PXP_WFB_ARRAY_FLAG4_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG4_MASK_H_OFS(8) |
+               BF_PXP_WFB_ARRAY_FLAG4_MASK_L_OFS(8),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG4_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_X(1) |
+               BF_PXP_WFB_ARRAY_FLAG5_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG5_MASK_H_OFS(9) |
+               BF_PXP_WFB_ARRAY_FLAG5_MASK_L_OFS(9),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG5_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_Y(1) |
+               BF_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_Y(1) |
+               BF_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG6_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG6_MASK_H_OFS(8) |
+               BF_PXP_WFB_ARRAY_FLAG6_MASK_L_OFS(8),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG6_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_Y(1) |
+               BF_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_Y(1) |
+               BF_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG7_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG7_MASK_H_OFS(9) |
+               BF_PXP_WFB_ARRAY_FLAG7_MASK_L_OFS(9),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG7_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_Y(1) |
+               BF_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG8_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG8_MASK_H_OFS(8) |
+               BF_PXP_WFB_ARRAY_FLAG8_MASK_L_OFS(8),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG8_MASK);
+
+       __raw_writel(
+               BF_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_Y(0) |
+               BF_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_Y(1) |
+               BF_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_X(0) |
+               BF_PXP_WFB_ARRAY_FLAG9_MASK_BUF_SEL(1) |
+               BF_PXP_WFB_ARRAY_FLAG9_MASK_H_OFS(9) |
+               BF_PXP_WFB_ARRAY_FLAG9_MASK_L_OFS(9),
+               pxp->base + HW_PXP_WFB_ARRAY_FLAG9_MASK);
+
+       pxp_sram_init(pxp, WFE_B, (u32)active_matrix_data_8x8, 64);
+
+
+       /* Store */
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_CTRL_CH0_CH_EN(1)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_16(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_HANDSHAKE_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_STORE_BYPASS_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_STORE_MEMORY_EN(1)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_PACK_IN_SEL(1)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_FILL_DATA_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES(32)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_COMBINE_2CHANNEL(1) |
+               BF_PXP_WFE_B_STORE_CTRL_CH0_ARBIT_EN(0),
+               pxp->base + HW_PXP_WFE_B_STORE_CTRL_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_CTRL_CH1_CH_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_16(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_HANDSHAKE_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_STORE_BYPASS_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_STORE_MEMORY_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_PACK_IN_SEL(1)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES(32),
+               pxp->base + HW_PXP_WFE_B_STORE_CTRL_CH1);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP(1)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN(0)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN(0)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS(0),
+               pxp->base + HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP(1)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN(0)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN(0)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS(0),
+               pxp->base + HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH1);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_ADDR_1_CH0_OUT_BASE_ADDR1(0),
+               pxp->base + HW_PXP_WFE_B_STORE_ADDR_1_CH0);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_ADDR_0_CH1_OUT_BASE_ADDR0(0),
+               pxp->base + HW_PXP_WFE_B_STORE_ADDR_0_CH1);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_ADDR_1_CH1_OUT_BASE_ADDR1(0),
+               pxp->base + HW_PXP_WFE_B_STORE_ADDR_1_CH1);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_FILL_DATA_CH0_FILL_DATA_CH0(0),
+               pxp->base + HW_PXP_WFE_B_STORE_FILL_DATA_CH0);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0(0x00000000),
+               pxp->base + HW_PXP_WFE_B_STORE_D_MASK0_H_CH0);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0(0xff),
+               pxp->base + HW_PXP_WFE_B_STORE_D_MASK0_L_CH0);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(0x0),
+               pxp->base + HW_PXP_WFE_B_STORE_D_MASK1_H_CH0);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(0x3f00),
+               pxp->base + HW_PXP_WFE_B_STORE_D_MASK1_L_CH0);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0(0x0),
+               pxp->base + HW_PXP_WFE_B_STORE_D_MASK2_H_CH0);
+
+       __raw_writel(BF_PXP_WFE_B_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0(0x0),
+               pxp->base + HW_PXP_WFE_B_STORE_D_MASK2_L_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4(0) |
+               BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4(0) |
+               BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5(0)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5(0) |
+               BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6(0)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6(0)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7(0)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7(0),
+               pxp->base + HW_PXP_WFE_B_STORE_D_SHIFT_H_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0(0) |
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0(0) |
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1(2)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1(1) |
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2(6)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2(0)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3(0)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3(0),
+               pxp->base + HW_PXP_WFE_B_STORE_D_SHIFT_L_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0(8)|
+               BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0(1)|
+               BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1(0)|
+               BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1(0)|
+               BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2(0)|
+               BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2(0)|
+               BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3(0)|
+               BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3(0),
+               pxp->base + HW_PXP_WFE_B_STORE_F_SHIFT_L_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK4(0)|
+               BF_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK5(0)|
+               BF_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK6(0)|
+               BF_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK7(0),
+               pxp->base + HW_PXP_WFE_B_STORE_F_MASK_H_CH0);
+
+       /* ALU */
+       __raw_writel(BF_PXP_ALU_B_INST_ENTRY_ENTRY_ADDR(0),
+               pxp->base + HW_PXP_ALU_B_INST_ENTRY);
+
+       __raw_writel(BF_PXP_ALU_B_PARAM_PARAM0(0) |
+               BF_PXP_ALU_B_PARAM_PARAM1(0),
+               pxp->base + HW_PXP_ALU_B_PARAM);
+
+       __raw_writel(BF_PXP_ALU_B_CONFIG_BUF_ADDR(0),
+               pxp->base + HW_PXP_ALU_B_CONFIG);
+
+       __raw_writel(BF_PXP_ALU_B_LUT_CONFIG_MODE(0) |
+               BF_PXP_ALU_B_LUT_CONFIG_EN(0),
+               pxp->base + HW_PXP_ALU_B_LUT_CONFIG);
+
+       __raw_writel(BF_PXP_ALU_B_LUT_DATA0_LUT_DATA_L(0),
+               pxp->base + HW_PXP_ALU_B_LUT_DATA0);
+
+       __raw_writel(BF_PXP_ALU_B_LUT_DATA1_LUT_DATA_H(0),
+               pxp->base + HW_PXP_ALU_B_LUT_DATA1);
+
+       __raw_writel(
+               BF_PXP_ALU_B_CTRL_BYPASS    (1) |
+               BF_PXP_ALU_B_CTRL_ENABLE    (1) |
+               BF_PXP_ALU_B_CTRL_START     (0) |
+               BF_PXP_ALU_B_CTRL_SW_RESET  (0),
+               pxp->base + HW_PXP_ALU_B_CTRL);
+
+       /* WFE */
+       __raw_writel(0x00000402, pxp->base + HW_PXP_WFE_B_SW_DATA_REGS);
+
+       __raw_writel(0x02040608, pxp->base + HW_PXP_WFE_B_STAGE1_MUX0);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE1_MUX1);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE1_MUX2);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE1_MUX3);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE1_MUX4);
+       __raw_writel(0x03000000, pxp->base + HW_PXP_WFE_B_STAGE1_MUX5);
+       __raw_writel(0x050A040A, pxp->base + HW_PXP_WFE_B_STAGE1_MUX6);
+       __raw_writel(0x070A060A, pxp->base + HW_PXP_WFE_B_STAGE1_MUX7);
+       __raw_writel(0x0000000A, pxp->base + HW_PXP_WFE_B_STAGE1_MUX8);
+
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE2_MUX0);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE2_MUX1);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE2_MUX2);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE2_MUX3);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE2_MUX4);
+       __raw_writel(0x1C1E2022, pxp->base + HW_PXP_WFE_B_STAGE2_MUX5);
+       __raw_writel(0x1215181A, pxp->base + HW_PXP_WFE_B_STAGE2_MUX6);
+       __raw_writel(0x00000C0F, pxp->base + HW_PXP_WFE_B_STAGE2_MUX7);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE2_MUX8);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE2_MUX9);
+       __raw_writel(0x01000000, pxp->base + HW_PXP_WFE_B_STAGE2_MUX10);
+       __raw_writel(0x000C010B, pxp->base + HW_PXP_WFE_B_STAGE2_MUX11);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE2_MUX12);
+
+       __raw_writel(0x09000C01, pxp->base + HW_PXP_WFE_B_STAGE3_MUX0);
+       __raw_writel(0x003A2A1D, pxp->base + HW_PXP_WFE_B_STAGE3_MUX1);
+       __raw_writel(0x09000C01, pxp->base + HW_PXP_WFE_B_STAGE3_MUX2);
+       __raw_writel(0x003A2A1D, pxp->base + HW_PXP_WFE_B_STAGE3_MUX3);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE3_MUX4);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE3_MUX5);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE3_MUX6);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STAGE3_MUX7);
+       __raw_writel(0x07060504, pxp->base + HW_PXP_WFE_B_STAGE3_MUX8);
+       __raw_writel(0x00000008, pxp->base + HW_PXP_WFE_B_STAGE3_MUX9);
+       __raw_writel(0x00001211, pxp->base + HW_PXP_WFE_B_STAGE3_MUX10);
+
+       __raw_writel(0x02010100, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT0_0);
+       __raw_writel(0x03020201, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT0_1);
+       __raw_writel(0x03020201, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT0_2);
+       __raw_writel(0x04030302, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT0_3);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT0_4);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT0_5);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT0_6);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT0_7);
+
+       __raw_writel(0x02010100, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT1_0);
+       __raw_writel(0x03020201, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT1_1);
+       __raw_writel(0x03020201, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT1_2);
+       __raw_writel(0x04030302, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT1_3);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT1_4);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT1_5);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT1_6);
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STG1_5X8_OUT1_7);
+
+       __raw_writel(0x0000000F, pxp->base + HW_PXP_WFE_B_STAGE1_5X8_MASKS_0);
+
+       __raw_writel(0x00000000, pxp->base + HW_PXP_WFE_B_STG1_5X1_OUT0);
+       __raw_writel(0x0000000F, pxp->base + HW_PXP_WFE_B_STG1_5X1_MASKS);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT0_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT0_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT0_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT0_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT0_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT0_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT0_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT0_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT1_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT1_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT1_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT1_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT1_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT1_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT1_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT1_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT2_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT2_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT2_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT2_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT2_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT2_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT2_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT2_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT3_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT3_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT3_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT3_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT3_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT3_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT3_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT3_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT4_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT4_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT4_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT4_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT4_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT4_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT4_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG1_8X1_OUT4_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STAGE2_5X6_MASKS_0);
+       __raw_writel(0x3F3F3F3F, pxp->base + HW_PXP_WFE_B_STAGE2_5X6_ADDR_0);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT0_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT0_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT0_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT0_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT0_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT0_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT0_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT0_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT1_0);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT1_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT1_2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT1_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT1_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT1_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT1_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X6_OUT1_7);
+
+       __raw_writel(0x00008000, pxp->base + HW_PXP_WFE_B_STG2_5X1_OUT0);
+       __raw_writel(0x0000FFFE, pxp->base + HW_PXP_WFE_B_STG2_5X1_OUT1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X1_OUT2);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG2_5X1_OUT3);
+       __raw_writel(0x00000F0F, pxp->base + HW_PXP_WFE_B_STG2_5X1_MASKS);
+
+       __raw_writel(0x00007F7F, pxp->base + HW_PXP_WFE_B_STG3_F8X1_MASKS);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT0_0);
+       __raw_writel(0x00FF00FF, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT0_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT0_2);
+       __raw_writel(0x000000FF, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT0_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT0_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT0_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT0_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT0_7);
+
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT1_0);
+       __raw_writel(0xFF3FFF3F, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT1_1);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT1_2);
+       __raw_writel(0xFFFFFF1F, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT1_3);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT1_4);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT1_5);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT1_6);
+       __raw_writel(0, pxp->base + HW_PXP_WFE_B_STG3_F8X1_OUT1_7);
+
+       __raw_writel(
+               BF_PXP_WFE_B_CTRL_ENABLE(1) |
+               BF_PXP_WFE_B_CTRL_SW_RESET(1),
+               pxp->base + HW_PXP_WFE_B_CTRL);
+}
+
+/* wfe b processing
+ * use wfe b to process an update
+ * call this function only after pxp_wfe_a_processing
+ * x,y,width,height:
+ *         coordinate and size of the update region
+ * twb:
+ *         temp working buffer, 16bpp
+ *         only used when reagl_en is 1
+ * wb:
+ *         working buffer, 16bpp
+ * lut:
+ *         lut buffer, 8bpp
+ * lut_update:
+ *         0 - wfe_b is used for reagl/reagl-d operation
+ *         1 - wfe_b is used for lut update operation
+ * reagl_d_en:
+ *         0 - use reagl waveform algorithm
+ *         1 - use reagl/-d waveform algorithm
+ */
+static void pxp_wfe_b_process(struct pxps *pxp)
+{
+       struct pxp_config_data *config_data = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &config_data->proc_data;
+       struct pxp_layer_param *fetch_ch0 = &config_data->wfe_b_fetch_param[0];
+       struct pxp_layer_param *fetch_ch1 = &config_data->wfe_b_fetch_param[1];
+       struct pxp_layer_param *store_ch0 = &config_data->wfe_b_store_param[0];
+       struct pxp_layer_param *store_ch1 = &config_data->wfe_b_store_param[1];
+       static int comp_mask;
+       /* Fetch */
+
+       print_param(fetch_ch0, "wfe_b fetch_ch0");
+       print_param(fetch_ch1, "wfe_b fetch_ch1");
+       print_param(store_ch0, "wfe_b store_ch0");
+       print_param(store_ch1, "wfe_b store_ch1");
+
+       __raw_writel(fetch_ch0->paddr, pxp->base + HW_PXP_WFB_FETCH_BUF1_ADDR);
+
+       __raw_writel(
+               BF_PXP_WFB_FETCH_BUF1_CORD_YCORD(fetch_ch0->top) |
+               BF_PXP_WFB_FETCH_BUF1_CORD_XCORD(fetch_ch0->left),
+               pxp->base + HW_PXP_WFB_FETCH_BUF1_CORD);
+
+       __raw_writel(fetch_ch0->stride,
+               pxp->base + HW_PXP_WFB_FETCH_BUF1_PITCH);
+
+       __raw_writel(
+               BF_PXP_WFB_FETCH_BUF1_SIZE_BUF_HEIGHT(fetch_ch0->height-1) |
+               BF_PXP_WFB_FETCH_BUF1_SIZE_BUF_WIDTH(fetch_ch0->width-1),
+               pxp->base + HW_PXP_WFB_FETCH_BUF1_SIZE);
+
+       __raw_writel(fetch_ch1->paddr, pxp->base + HW_PXP_WFB_FETCH_BUF2_ADDR);
+
+       __raw_writel(fetch_ch1->stride * 2,
+                       pxp->base + HW_PXP_WFB_FETCH_BUF2_PITCH);
+
+       __raw_writel(
+               BF_PXP_WFB_FETCH_BUF2_CORD_YCORD(fetch_ch1->top) |
+               BF_PXP_WFB_FETCH_BUF2_CORD_XCORD(fetch_ch1->left),
+               pxp->base + HW_PXP_WFB_FETCH_BUF2_CORD);
+
+       __raw_writel(
+               BF_PXP_WFB_FETCH_BUF2_SIZE_BUF_HEIGHT(fetch_ch1->height-1) |
+               BF_PXP_WFB_FETCH_BUF2_SIZE_BUF_WIDTH(fetch_ch1->width-1),
+               pxp->base + HW_PXP_WFB_FETCH_BUF2_SIZE);
+
+       if (!proc_data->lut_update) {
+               __raw_writel(
+                       BF_PXP_WFB_FETCH_CTRL_BF1_EN(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_HSK_MODE(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BYTES_PP(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_SRAM_IF(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BURST_LEN(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BYPASS_MODE(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BORDER_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_EN(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_HSK_MODE(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BYTES_PP(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_SRAM_IF(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BURST_LEN(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BORDER_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BYPASS_MODE(0),
+                       pxp->base + HW_PXP_WFB_FETCH_CTRL);
+       } else {
+               __raw_writel(
+                       BF_PXP_WFB_FETCH_CTRL_BF1_EN(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_HSK_MODE(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BYTES_PP(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_SRAM_IF(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BURST_LEN(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BORDER_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BYPASS_MODE(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_EN(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_HSK_MODE(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BYTES_PP(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_SRAM_IF(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BURST_LEN(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BORDER_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BYPASS_MODE(0),
+                       pxp->base + HW_PXP_WFB_FETCH_CTRL);
+       }
+
+#ifdef CONFIG_REAGLD_ALGO_CHECK
+       __raw_writel(
+                       (__raw_readl(pxp->base + HW_PXP_WFE_B_SW_DATA_REGS) & 0x0000FFFF) | ((fetch_ch0->comp_mask&0x000000FF)<<16),
+                       pxp->base + HW_PXP_WFE_B_SW_DATA_REGS);
+#else
+       __raw_writel(
+                       (__raw_readl(pxp->base + HW_PXP_WFE_B_SW_DATA_REGS) & 0x0000FFFF) | ((comp_mask&0x000000FF)<<16),
+                       pxp->base + HW_PXP_WFE_B_SW_DATA_REGS);
+
+       /* comp_mask only need to be updated upon REAGL-D, 0,1,...7, 0,1,...  */
+       if (proc_data->reagl_d_en) {
+               comp_mask++;
+               if (comp_mask>7)
+                       comp_mask = 0;
+       }
+#endif
+
+       /* Store */
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_SIZE_CH0_OUT_WIDTH(store_ch0->width-1)|
+               BF_PXP_WFE_B_STORE_SIZE_CH0_OUT_HEIGHT(store_ch0->height-1),
+               pxp->base + HW_PXP_WFE_B_STORE_SIZE_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_SIZE_CH1_OUT_WIDTH(store_ch1->width-1)|
+               BF_PXP_WFE_B_STORE_SIZE_CH1_OUT_HEIGHT(store_ch1->height-1),
+               pxp->base + HW_PXP_WFE_B_STORE_SIZE_CH1);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_PITCH_CH0_OUT_PITCH(store_ch0->stride * 2)|
+               BF_PXP_WFE_B_STORE_PITCH_CH1_OUT_PITCH(store_ch1->stride * 2),
+               pxp->base + HW_PXP_WFE_B_STORE_PITCH);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_ADDR_0_CH0_OUT_BASE_ADDR0(store_ch0->paddr
+                       + (store_ch0->left + store_ch0->top * store_ch0->stride) * 2),
+               pxp->base + HW_PXP_WFE_B_STORE_ADDR_0_CH0);
+
+       if (proc_data->lut_update) {
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(0x0),
+                       pxp->base + HW_PXP_WFE_B_STORE_D_MASK1_H_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(0x0),
+                       pxp->base + HW_PXP_WFE_B_STORE_D_MASK1_L_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0(0x0),
+                       pxp->base + HW_PXP_WFE_B_STORE_D_MASK2_H_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0(0x3f0000),
+                       pxp->base + HW_PXP_WFE_B_STORE_D_MASK2_L_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK0(0x30)|
+                       BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK1(0)|
+                       BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK2(0)|
+                       BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK3(0),
+                       pxp->base + HW_PXP_WFE_B_STORE_F_MASK_L_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0(4)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0(1)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3(0),
+                       pxp->base + HW_PXP_WFE_B_STORE_F_SHIFT_L_CH0);
+       } else {
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(0x0),
+                       pxp->base + HW_PXP_WFE_B_STORE_D_MASK1_H_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(0x3f00),
+                       pxp->base + HW_PXP_WFE_B_STORE_D_MASK1_L_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0(0x0),
+                       pxp->base + HW_PXP_WFE_B_STORE_D_MASK2_H_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0(0x0),
+                       pxp->base + HW_PXP_WFE_B_STORE_D_MASK2_L_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK0(3)|
+                       BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK1(0)|
+                       BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK2(0)|
+                       BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK3(0),
+                       pxp->base + HW_PXP_WFE_B_STORE_F_MASK_L_CH0);
+
+               __raw_writel(
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0(8)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0(1)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3(0)|
+                       BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3(0),
+                       pxp->base + HW_PXP_WFE_B_STORE_F_SHIFT_L_CH0);
+       }
+
+       /* ALU */
+       __raw_writel(
+               BF_PXP_ALU_B_BUF_SIZE_BUF_WIDTH(fetch_ch0->width) |
+               BF_PXP_ALU_B_BUF_SIZE_BUF_HEIGHT(fetch_ch0->height),
+               pxp->base + HW_PXP_ALU_B_BUF_SIZE);
+
+       /* WFE */
+       __raw_writel(
+               BF_PXP_WFE_B_DIMENSIONS_WIDTH(fetch_ch0->width) |
+               BF_PXP_WFE_B_DIMENSIONS_HEIGHT(fetch_ch0->height),
+               pxp->base + HW_PXP_WFE_B_DIMENSIONS);
+
+       __raw_writel(   /*TODO check*/
+               BF_PXP_WFE_B_OFFSET_X_OFFSET(fetch_ch0->left) |
+               BF_PXP_WFE_B_OFFSET_Y_OFFSET(fetch_ch0->top),
+               pxp->base + HW_PXP_WFE_B_OFFSET);
+
+       __raw_writel(proc_data->reagl_d_en, pxp->base + HW_PXP_WFE_B_SW_FLAG_REGS);
+}
+
+void pxp_fill(
+        u32 bpp,
+        u32 value,
+        u32 width,
+        u32 height,
+        u32 output_buffer,
+        u32 output_pitch)
+{
+       u32 active_bpp;
+       u32 pitch;
+
+       if (bpp == 8) {
+               active_bpp = 0;
+               pitch = output_pitch;
+       } else if(bpp == 16) {
+               active_bpp = 1;
+               pitch = output_pitch * 2;
+       } else {
+               active_bpp = 2;
+               pitch = output_pitch * 4;
+       }
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_CTRL_CH0_CH_EN(1)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_16(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_HANDSHAKE_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_STORE_BYPASS_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_STORE_MEMORY_EN(1)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_PACK_IN_SEL(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_FILL_DATA_EN(1)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES(32)|
+               BF_PXP_WFE_B_STORE_CTRL_CH0_COMBINE_2CHANNEL(0) |
+               BF_PXP_WFE_B_STORE_CTRL_CH0_ARBIT_EN(0),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_CTRL_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_CTRL_CH1_CH_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_16(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_HANDSHAKE_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_STORE_BYPASS_EN(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_STORE_MEMORY_EN(1)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_PACK_IN_SEL(0)|
+               BF_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES(16),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_CTRL_CH1);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_SIZE_CH0_OUT_WIDTH(width-1)|
+               BF_PXP_WFE_B_STORE_SIZE_CH0_OUT_HEIGHT(height-1),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_SIZE_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_SIZE_CH1_OUT_WIDTH(width-1)|
+               BF_PXP_WFE_B_STORE_SIZE_CH1_OUT_HEIGHT(height-1),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_SIZE_CH1);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_PITCH_CH0_OUT_PITCH(pitch)|
+               BF_PXP_WFE_B_STORE_PITCH_CH1_OUT_PITCH(pitch),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_PITCH);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP(active_bpp)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN(0)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN(0)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS(1),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP(active_bpp)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN(0)|
+               BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN(0),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH1);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_ADDR_0_CH0_OUT_BASE_ADDR0(output_buffer),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_ADDR_0_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_ADDR_1_CH0_OUT_BASE_ADDR1(0),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_ADDR_1_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_ADDR_0_CH1_OUT_BASE_ADDR0(output_buffer),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_ADDR_0_CH1);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_ADDR_1_CH1_OUT_BASE_ADDR1(0),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_ADDR_1_CH1);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_FILL_DATA_CH0_FILL_DATA_CH0(value),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_FILL_DATA_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0(0x00000000),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_D_MASK0_H_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0(0x000000ff),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_D_MASK0_L_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(0x00000000),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_D_MASK1_H_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(0x000000ff),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_D_MASK1_L_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0(0x00000000),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_D_MASK2_H_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0(0x000000ff),
+               pxp_reg_base + HW_PXP_WFE_B_STORE_D_MASK2_L_CH0);
+
+       __raw_writel(
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0(0) |
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0(0) |
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1(32)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1(1) |
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2(40)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2(1)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3(0)|
+               BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3(0),
+               pxp_reg_base +  HW_PXP_WFE_B_STORE_D_SHIFT_L_CH0);
+
+       __raw_writel(
+               BF_PXP_CTRL2_ENABLE                   (1) |
+               BF_PXP_CTRL2_ROTATE0                  (0) |
+               BF_PXP_CTRL2_HFLIP0                   (0) |
+               BF_PXP_CTRL2_VFLIP0                   (0) |
+               BF_PXP_CTRL2_ROTATE1                  (0) |
+               BF_PXP_CTRL2_HFLIP1                   (0) |
+               BF_PXP_CTRL2_VFLIP1                   (0) |
+               BF_PXP_CTRL2_ENABLE_DITHER            (0) |
+               BF_PXP_CTRL2_ENABLE_WFE_A             (0) |
+               BF_PXP_CTRL2_ENABLE_WFE_B             (1) |
+               BF_PXP_CTRL2_ENABLE_INPUT_FETCH_STORE (0) |
+               BF_PXP_CTRL2_ENABLE_ALPHA_B           (0) |
+               BF_PXP_CTRL2_BLOCK_SIZE               (0) |
+               BF_PXP_CTRL2_ENABLE_CSC2              (0) |
+               BF_PXP_CTRL2_ENABLE_LUT               (0) |
+               BF_PXP_CTRL2_ENABLE_ROTATE0           (0) |
+               BF_PXP_CTRL2_ENABLE_ROTATE1           (0),
+               pxp_reg_base + HW_PXP_CTRL2);
+
+       if (busy_wait(BM_PXP_IRQ_WFE_B_CH0_STORE_IRQ &
+                       __raw_readl(pxp_reg_base + HW_PXP_IRQ)) == false)
+               printk("%s: wait for completion timeout\n", __func__);
+}
+EXPORT_SYMBOL(pxp_fill);
+
+#ifdef CONFIG_MXC_FPGA_M4_TEST
+void m4_process(void)
+{
+       __raw_writel(0x7, pinctrl_base + PIN_DOUT);     /* M4 Start */
+
+       while (!(__raw_readl(pxp_reg_base + HW_PXP_HANDSHAKE_CPU_STORE) & BM_PXP_HANDSHAKE_CPU_STORE_SW0_B0_READY));
+
+       __raw_writel(0x3, pinctrl_base + PIN_DOUT);     /* M4 Stop */
+
+
+}
+#else
+void m4_process(void) {}
+#endif
+EXPORT_SYMBOL(m4_process);
+
+static void pxp_lut_status_set(struct pxps *pxp, unsigned int lut)
+{
+       if(lut<32)
+               __raw_writel(
+                               __raw_readl(pxp_reg_base + HW_PXP_WFE_A_STG1_8X1_OUT0_0) | (1 << lut),
+                               pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT0_0);
+       else {
+               lut = lut -32;
+               __raw_writel(
+                               __raw_readl(pxp_reg_base + HW_PXP_WFE_A_STG1_8X1_OUT0_1) | (1 << lut),
+                               pxp->base + HW_PXP_WFE_A_STG1_8X1_OUT0_1);
+       }
+}
+
+static void pxp_luts_activate(struct pxps *pxp, u64 lut_status)
+{
+       int i = 0;
+
+       if (!lut_status)
+               return;
+
+       for (i = 0; i < 64; i++) {
+               if (lut_status & (1ULL << i))
+                       pxp_lut_status_set(pxp, i);
+       }
+}
+
+static void pxp_lut_status_clr(unsigned int lut)
+{
+       if(lut<32)
+               __raw_writel(
+                               __raw_readl(pxp_reg_base + HW_PXP_WFE_A_STG1_8X1_OUT0_0) & (~(1 << lut)),
+                               pxp_reg_base + HW_PXP_WFE_A_STG1_8X1_OUT0_0);
+       else
+       {
+               lut = lut -32;
+               __raw_writel(
+                               __raw_readl(pxp_reg_base + HW_PXP_WFE_A_STG1_8X1_OUT0_1) & (~(1 << lut)),
+                               pxp_reg_base + HW_PXP_WFE_A_STG1_8X1_OUT0_1);
+       }
+}
+
+/* this function should be called in the epdc
+ * driver explicitly when some epdc lut becomes
+ * idle. So it should be exported.
+ */
+void pxp_luts_deactivate(u64 lut_status)
+{
+       int i = 0;
+
+       if (!lut_status)
+               return;
+
+       for (i = 0; i < 64; i++) {
+               if (lut_status & (1ULL << i))
+                       pxp_lut_status_clr(i);
+       }
+}
+
+/* use histogram_B engine to calculate histogram status */
+static void pxp_histogram_enable(struct pxps *pxp,
+                                unsigned int width,
+                                unsigned int height)
+{
+       __raw_writel(
+                       BF_PXP_HIST_B_BUF_SIZE_HEIGHT(height)|
+                       BF_PXP_HIST_B_BUF_SIZE_WIDTH(width),
+                       pxp->base + HW_PXP_HIST_B_BUF_SIZE);
+
+       __raw_writel(
+                       BF_PXP_HIST_B_MASK_MASK_EN(1)|
+                       BF_PXP_HIST_B_MASK_MASK_MODE(0)|
+                       BF_PXP_HIST_B_MASK_MASK_OFFSET(64)|
+                       BF_PXP_HIST_B_MASK_MASK_WIDTH(0)|
+                       BF_PXP_HIST_B_MASK_MASK_VALUE0(1) |
+                       BF_PXP_HIST_B_MASK_MASK_VALUE1(0),
+                       pxp->base + HW_PXP_HIST_B_MASK);
+
+       __raw_writel(
+                       BF_PXP_HIST_B_CTRL_PIXEL_WIDTH(3)|
+                       BF_PXP_HIST_B_CTRL_PIXEL_OFFSET(8)|
+                       BF_PXP_HIST_B_CTRL_CLEAR(0)|
+                       BF_PXP_HIST_B_CTRL_ENABLE(1),
+                       pxp->base + HW_PXP_HIST_B_CTRL);
+}
+
+static void pxp_histogram_status_report(struct pxps *pxp, u32 *hist_status)
+{
+       BUG_ON(!hist_status);
+
+       *hist_status = (__raw_readl(pxp->base + HW_PXP_HIST_B_CTRL) & BM_PXP_HIST_B_CTRL_STATUS)
+                       >> BP_PXP_HIST_B_CTRL_STATUS;
+       dev_dbg(pxp->dev, "%d pixels are used to calculate histogram status %d\n",
+                       __raw_readl(pxp->base + HW_PXP_HIST_B_TOTAL_PIXEL), *hist_status);
+}
+
+static void pxp_histogram_disable(struct pxps *pxp)
+{
+       __raw_writel(
+                       BF_PXP_HIST_B_CTRL_PIXEL_WIDTH(3)|
+                       BF_PXP_HIST_B_CTRL_PIXEL_OFFSET(4)|
+                       BF_PXP_HIST_B_CTRL_CLEAR(1)|
+                       BF_PXP_HIST_B_CTRL_ENABLE(0),
+                       pxp->base + HW_PXP_HIST_B_CTRL);
+}
+
+/* the collision detection function will be
+ * called by epdc driver when required
+ */
+static void pxp_collision_detection_enable(struct pxps *pxp,
+                                          unsigned int width,
+                                          unsigned int height)
+{
+       __raw_writel(
+                       BF_PXP_HIST_A_BUF_SIZE_HEIGHT(height)|
+                       BF_PXP_HIST_A_BUF_SIZE_WIDTH(width),
+                       pxp_reg_base + HW_PXP_HIST_A_BUF_SIZE);
+
+       __raw_writel(
+                       BF_PXP_HIST_A_MASK_MASK_EN(1)|
+                       BF_PXP_HIST_A_MASK_MASK_MODE(0)|
+                       BF_PXP_HIST_A_MASK_MASK_OFFSET(65)|
+                       BF_PXP_HIST_A_MASK_MASK_WIDTH(0)|
+                       BF_PXP_HIST_A_MASK_MASK_VALUE0(1) |
+                       BF_PXP_HIST_A_MASK_MASK_VALUE1(0),
+                       pxp_reg_base + HW_PXP_HIST_A_MASK);
+
+       __raw_writel(
+                       BF_PXP_HIST_A_CTRL_PIXEL_WIDTH(6)|
+                       BF_PXP_HIST_A_CTRL_PIXEL_OFFSET(24)|
+                       BF_PXP_HIST_A_CTRL_CLEAR(0)|
+                       BF_PXP_HIST_A_CTRL_ENABLE(1),
+                       pxp_reg_base + HW_PXP_HIST_A_CTRL);
+}
+
+static void pxp_collision_detection_disable(struct pxps *pxp)
+{
+       __raw_writel(
+                       BF_PXP_HIST_A_CTRL_PIXEL_WIDTH(6)|
+                       BF_PXP_HIST_A_CTRL_PIXEL_OFFSET(24)|
+                       BF_PXP_HIST_A_CTRL_CLEAR(1)|
+                       BF_PXP_HIST_A_CTRL_ENABLE(0),
+                       pxp_reg_base + HW_PXP_HIST_A_CTRL);
+}
+
+/* this function can be called in the epdc callback
+ * function in the pxp_irq() to let the epdc know
+ * the collision information for the previous working
+ * buffer update.
+ */
+static bool pxp_collision_status_report(struct pxps *pxp, struct pxp_collision_info *info)
+{
+       unsigned int count;
+
+       BUG_ON(!info);
+       memset(info, 0x0, sizeof(*info));
+
+       info->pixel_cnt = count = __raw_readl(pxp->base + HW_PXP_HIST_A_TOTAL_PIXEL);
+       if (!count)
+               return false;
+
+       dev_dbg(pxp->dev, "%s: pixel_cnt = %d\n", __func__, info->pixel_cnt);
+       info->rect_min_x = __raw_readl(pxp->base + HW_PXP_HIST_A_ACTIVE_AREA_X) & 0xffff;
+       dev_dbg(pxp->dev, "%s: rect_min_x = %d\n", __func__, info->rect_min_x);
+       info->rect_max_x = (__raw_readl(pxp->base + HW_PXP_HIST_A_ACTIVE_AREA_X) >> 16) & 0xffff;
+       dev_dbg(pxp->dev, "%s: rect_max_x = %d\n", __func__, info->rect_max_x);
+       info->rect_min_y = __raw_readl(pxp->base + HW_PXP_HIST_A_ACTIVE_AREA_Y) & 0xffff;
+       dev_dbg(pxp->dev, "%s: rect_min_y = %d\n", __func__, info->rect_min_y);
+       info->rect_max_y = (__raw_readl(pxp->base + HW_PXP_HIST_A_ACTIVE_AREA_Y) >> 16) & 0xffff;
+       dev_dbg(pxp->dev, "%s: rect_max_y = %d\n", __func__, info->rect_max_y);
+
+       info->victim_luts[0] = __raw_readl(pxp->base + HW_PXP_HIST_A_RAW_STAT0);
+       dev_dbg(pxp->dev, "%s: victim_luts[0] = 0x%x\n", __func__, info->victim_luts[0]);
+       info->victim_luts[1] = __raw_readl(pxp->base + HW_PXP_HIST_A_RAW_STAT1);
+       dev_dbg(pxp->dev, "%s: victim_luts[1] = 0x%x\n", __func__, info->victim_luts[1]);
+
+       return true;
+}
+
+void pxp_get_collision_info(struct pxp_collision_info *info)
+{
+       BUG_ON(!info);
+
+       memcpy(info, &col_info, sizeof(struct pxp_collision_info));
+}
+EXPORT_SYMBOL(pxp_get_collision_info);
+
+static void dither_prefetch_config(struct pxps *pxp)
+{
+       struct pxp_config_data *config_data = &pxp->pxp_conf_state;
+       struct pxp_layer_param *fetch_ch0 = &config_data->dither_fetch_param[0];
+       struct pxp_layer_param *fetch_ch1 = &config_data->dither_fetch_param[1];
+
+       print_param(fetch_ch0, "dither fetch_ch0");
+       print_param(fetch_ch1, "dither fetch_ch1");
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_CH_EN(1) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_16(0)|
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_BYPASS_PIXEL_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_HIGH_BYTE(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_HFLIP(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_VFLIP(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES(32) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_ARBIT_EN(0),
+                       pxp->base + HW_PXP_DITHER_FETCH_CTRL_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_CH_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_16(0)|
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_BYPASS_PIXEL_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_HFLIP(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_VFLIP(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_ROTATION_ANGLE(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_RD_NUM_BYTES(2) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM(0),
+                       pxp->base + HW_PXP_DITHER_FETCH_CTRL_CH1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_X(0) |
+                       BF_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_Y(0),
+                       pxp->base + HW_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0);
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_X(fetch_ch0->width - 1) |
+                       BF_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_Y(fetch_ch0->height - 1),
+                       pxp->base + HW_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_X(0) |
+                       BF_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_Y(0),
+                       pxp->base + HW_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1);
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_X(fetch_ch1->width - 1) |
+                       BF_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_Y(fetch_ch1->height - 1),
+                       pxp->base + HW_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1);
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_WIDTH(fetch_ch0->width - 1) |
+                       BF_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_HEIGHT(fetch_ch0->height - 1),
+                       pxp->base + HW_PXP_DITHER_FETCH_SIZE_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_WIDTH(fetch_ch1->width - 1) |
+                       BF_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_HEIGHT(fetch_ch1->height - 1),
+                       pxp->base + HW_PXP_DITHER_FETCH_SIZE_CH1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_PITCH_CH0_INPUT_PITCH(fetch_ch0->stride) |
+                       BF_PXP_DITHER_FETCH_PITCH_CH1_INPUT_PITCH(fetch_ch1->stride),
+                       pxp->base + HW_PXP_DITHER_FETCH_PITCH);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP(0) |
+                       BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT(0) |
+                       BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_EN(0) |
+                       BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS(1),
+                       pxp->base + HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH0);
+
+       __raw_writel(
+                        BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP(0) |
+                        BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT(0) |
+                        BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_EN(0) |
+                        BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS(1),
+                       pxp->base + HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH1);
+
+       __raw_writel(
+                        BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET0(0) |
+                        BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET1(0) |
+                        BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET2(0) |
+                        BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET3(0),
+                       pxp->base + HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0);
+
+       __raw_writel(
+                        BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET0(0) |
+                        BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET1(0) |
+                        BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET2(0) |
+                        BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET3(0),
+                       pxp->base + HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1);
+
+       __raw_writel(
+                        BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH0(7) |
+                        BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH1(7) |
+                        BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH2(7) |
+                        BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH3(7),
+                       pxp->base + HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0);
+
+       __raw_writel(
+                        BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH0(7) |
+                        BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH1(7) |
+                        BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH2(7) |
+                        BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH3(7),
+                       pxp->base + HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_ADDR_0_CH0_INPUT_BASE_ADDR0(fetch_ch0->paddr),
+                       pxp->base + HW_PXP_DITHER_FETCH_ADDR_0_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_ADDR_1_CH0_INPUT_BASE_ADDR1(0),
+                       pxp->base + HW_PXP_DITHER_FETCH_ADDR_1_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_ADDR_0_CH1_INPUT_BASE_ADDR0(fetch_ch1->paddr),
+                       pxp->base + HW_PXP_DITHER_FETCH_ADDR_0_CH1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FETCH_ADDR_1_CH1_INPUT_BASE_ADDR1(0),
+                       pxp->base + HW_PXP_DITHER_FETCH_ADDR_1_CH1);
+}
+
+static void dither_store_config(struct pxps *pxp)
+{
+       struct pxp_config_data *config_data = &pxp->pxp_conf_state;
+       struct pxp_layer_param *store_ch0 = &config_data->dither_store_param[0];
+       struct pxp_layer_param *store_ch1 = &config_data->dither_store_param[1];
+
+       print_param(store_ch0, "dither store_ch0");
+       print_param(store_ch1, "dither store_ch1");
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_CTRL_CH0_CH_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_BLOCK_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_BLOCK_16(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_HANDSHAKE_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_ARRAY_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_STORE_BYPASS_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_STORE_MEMORY_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_PACK_IN_SEL(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_FILL_DATA_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES(32)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_COMBINE_2CHANNEL(0) |
+                       BF_PXP_DITHER_STORE_CTRL_CH0_ARBIT_EN(0),
+                       pxp->base + HW_PXP_DITHER_STORE_CTRL_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_CTRL_CH1_CH_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH1_BLOCK_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH1_BLOCK_16(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH1_HANDSHAKE_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH1_ARRAY_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH1_ARRAY_LINE_NUM(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH1_STORE_BYPASS_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH1_STORE_MEMORY_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH1_PACK_IN_SEL(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH1_WR_NUM_BYTES(32),
+                       pxp->base + HW_PXP_DITHER_STORE_CTRL_CH1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_SIZE_CH0_OUT_WIDTH(store_ch0->width - 1) |
+                       BF_PXP_DITHER_STORE_SIZE_CH0_OUT_HEIGHT(store_ch0->height - 1),
+                       pxp->base + HW_PXP_DITHER_STORE_SIZE_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_SIZE_CH1_OUT_WIDTH(store_ch1->width - 1) |
+                       BF_PXP_DITHER_STORE_SIZE_CH1_OUT_HEIGHT(store_ch1->height - 1),
+                       pxp->base + HW_PXP_DITHER_STORE_SIZE_CH1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_PITCH_CH0_OUT_PITCH(store_ch0->stride) |
+                       BF_PXP_DITHER_STORE_PITCH_CH1_OUT_PITCH(store_ch1->stride),
+                       pxp->base + HW_PXP_DITHER_STORE_PITCH);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP(0)|
+                       BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN(0)|
+                       BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN(0)|
+                       BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS(1),
+                       pxp->base + HW_PXP_DITHER_STORE_SHIFT_CTRL_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP(0)|
+                       BF_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN(0)|
+                       BF_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN(0),
+                       pxp->base + HW_PXP_DITHER_STORE_SHIFT_CTRL_CH1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_ADDR_0_CH0_OUT_BASE_ADDR0(store_ch0->paddr),
+                       pxp->base + HW_PXP_DITHER_STORE_ADDR_0_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_ADDR_1_CH0_OUT_BASE_ADDR1(0),
+                       pxp->base + HW_PXP_DITHER_STORE_ADDR_1_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_ADDR_0_CH1_OUT_BASE_ADDR0(store_ch1->paddr),
+                       pxp->base + HW_PXP_DITHER_STORE_ADDR_0_CH1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_ADDR_1_CH1_OUT_BASE_ADDR1(0),
+                       pxp->base + HW_PXP_DITHER_STORE_ADDR_1_CH1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_FILL_DATA_CH0_FILL_DATA_CH0(0),
+                       pxp->base + HW_PXP_DITHER_STORE_FILL_DATA_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0(0xffffff),
+                       pxp->base + HW_PXP_DITHER_STORE_D_MASK0_H_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0(0x0),
+                       pxp->base + HW_PXP_DITHER_STORE_D_MASK0_L_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(0x0),
+                       pxp->base + HW_PXP_DITHER_STORE_D_MASK1_H_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(0xff),
+                       pxp->base + HW_PXP_DITHER_STORE_D_MASK1_L_CH0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0(32) |
+                       BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0(0) |
+                       BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1(32)|
+                       BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1(1) |
+                       BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2(0)|
+                       BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2(0)|
+                       BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3(0)|
+                       BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3(0),
+                       pxp->base + HW_PXP_DITHER_STORE_D_SHIFT_L_CH0);
+}
+
+static void pxp_set_final_lut_data(struct pxps *pxp)
+{
+       __raw_writel(
+                       BF_PXP_DITHER_FINAL_LUT_DATA0_DATA0(0x0) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA0_DATA1(0x0) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA0_DATA2(0x0) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA0_DATA3(0x0),
+                       pxp->base + HW_PXP_DITHER_FINAL_LUT_DATA0);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FINAL_LUT_DATA1_DATA4(0x0) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA1_DATA5(0x0) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA1_DATA6(0x0) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA1_DATA7(0x0),
+                       pxp->base + HW_PXP_DITHER_FINAL_LUT_DATA1);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FINAL_LUT_DATA2_DATA8(0xff) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA2_DATA9(0xff) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA2_DATA10(0xff)|
+                       BF_PXP_DITHER_FINAL_LUT_DATA2_DATA11(0xff),
+                       pxp->base + HW_PXP_DITHER_FINAL_LUT_DATA2);
+
+       __raw_writel(
+                       BF_PXP_DITHER_FINAL_LUT_DATA3_DATA12(0xff) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA3_DATA13(0xff) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA3_DATA14(0xff) |
+                       BF_PXP_DITHER_FINAL_LUT_DATA3_DATA15(0xff),
+                       pxp->base + HW_PXP_DITHER_FINAL_LUT_DATA3);
+}
+
+static void pxp_dithering_process(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+
+       dither_prefetch_config(pxp);
+       dither_store_config(pxp);
+       pxp_sram_init(pxp, DITHER0_LUT, (u32)dither_data_8x8, 64);
+
+       __raw_writel(
+                       BF_PXP_INIT_MEM_CTRL_ADDR(0) |
+                       BF_PXP_INIT_MEM_CTRL_SELECT(0) |/*select the lut memory for access */
+                       BF_PXP_INIT_MEM_CTRL_START(1),
+                       pxp->base + HW_PXP_INIT_MEM_CTRL);
+
+
+       {
+               int i;
+               for (i = 0; i < 64; i++)
+                       __raw_writel(
+                                       BF_PXP_INIT_MEM_DATA_DATA(dither_data_8x8[i]),
+                                       pxp->base + HW_PXP_INIT_MEM_DATA);
+       }
+
+       __raw_writel(
+                       BF_PXP_INIT_MEM_CTRL_ADDR(0) |
+                       BF_PXP_INIT_MEM_CTRL_SELECT(0) |/*select the lut memory for access*/
+                       BF_PXP_INIT_MEM_CTRL_START(0),
+                       pxp->base + HW_PXP_INIT_MEM_CTRL);
+
+       __raw_writel(
+                       BF_PXP_DITHER_CTRL_ENABLE0            (1) |
+                       BF_PXP_DITHER_CTRL_ENABLE1            (0) |
+                       BF_PXP_DITHER_CTRL_ENABLE2            (0) |
+                       BF_PXP_DITHER_CTRL_DITHER_MODE2       (0) |
+                       BF_PXP_DITHER_CTRL_DITHER_MODE1       (0) |
+                       BF_PXP_DITHER_CTRL_DITHER_MODE0       (proc_data->dither_mode) |
+                       BF_PXP_DITHER_CTRL_LUT_MODE           (0) |
+                       BF_PXP_DITHER_CTRL_IDX_MATRIX0_SIZE   (1) |
+                       BF_PXP_DITHER_CTRL_IDX_MATRIX1_SIZE   (0) |
+                       BF_PXP_DITHER_CTRL_IDX_MATRIX2_SIZE   (0) |
+                       BF_PXP_DITHER_CTRL_BUSY2              (0) |
+                       BF_PXP_DITHER_CTRL_BUSY1              (0) |
+                       BF_PXP_DITHER_CTRL_BUSY0              (0),
+                       pxp->base + HW_PXP_DITHER_CTRL);
+
+       switch(proc_data->dither_mode) {
+               case PXP_DITHER_PASS_THROUGH:
+                       /* no more settings required */
+                       break;
+               case PXP_DITHER_FLOYD:
+               case PXP_DITHER_ATKINSON:
+               case PXP_DITHER_ORDERED:
+                       if(!proc_data->quant_bit || proc_data->quant_bit > 7) {
+                               dev_err(pxp->dev, "unsupported quantization bit number!\n");
+                               return;
+                       }
+                       __raw_writel(
+                                       BF_PXP_DITHER_CTRL_FINAL_LUT_ENABLE(1) |
+                                       BF_PXP_DITHER_CTRL_NUM_QUANT_BIT(proc_data->quant_bit),
+                                       pxp->base + HW_PXP_DITHER_CTRL_SET);
+                       pxp_set_final_lut_data(pxp);
+
+                       break;
+               case PXP_DITHER_QUANT_ONLY:
+                       if(!proc_data->quant_bit || proc_data->quant_bit > 7) {
+                               dev_err(pxp->dev, "unsupported quantization bit number!\n");
+                               return;
+                       }
+                       __raw_writel(
+                                       BF_PXP_DITHER_CTRL_NUM_QUANT_BIT(proc_data->quant_bit),
+                                       pxp->base + HW_PXP_DITHER_CTRL_SET);
+                       break;
+               default:
+                       /* unknown mode */
+                       dev_err(pxp->dev, "unknown dithering mode passed!\n");
+                       __raw_writel(0x0, pxp->base + HW_PXP_DITHER_CTRL);
+                       return;
+       }
+}
+
+static void pxp_start2(struct pxps *pxp)
+{
+       struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
+       struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
+       int dither_wfe_a_handshake = 0;
+       int wfe_a_b_handshake = 0;
+       int count = 0;
+
+       int wfe_a_enable = ((proc_data->engine_enable & PXP_ENABLE_WFE_A) == PXP_ENABLE_WFE_A);
+       int wfe_b_enable = ((proc_data->engine_enable & PXP_ENABLE_WFE_B) == PXP_ENABLE_WFE_B);
+       int dither_enable = ((proc_data->engine_enable & PXP_ENABLE_DITHER) == PXP_ENABLE_DITHER);
+       int handshake = ((proc_data->engine_enable & PXP_ENABLE_HANDSHAKE) == PXP_ENABLE_HANDSHAKE);
+       int dither_bypass = ((proc_data->engine_enable & PXP_ENABLE_DITHER_BYPASS) == PXP_ENABLE_DITHER_BYPASS);
+
+       if (dither_enable)
+               count++;
+       if (wfe_a_enable)
+               count++;
+       if (wfe_b_enable)
+               count++;
+
+       if (count == 0)
+               return;
+       if (handshake && (count == 1)) {
+               dev_warn(pxp->dev, "Warning: Can not use handshake mode when "
+                               "only one sub-block is enabled!\n");
+               handshake = 0;
+       }
+
+       if (handshake && wfe_b_enable && (wfe_a_enable == 0)) {
+               dev_err(pxp->dev, "WFE_B only works when WFE_A is enabled!\n");
+               return;
+       }
+
+       if (handshake && dither_enable && wfe_a_enable)
+               dither_wfe_a_handshake = 1;
+       if (handshake && wfe_a_enable && wfe_b_enable)
+               wfe_a_b_handshake = 1;
+
+       dev_dbg(pxp->dev, "handshake %d, dither_wfe_a_handshake %d, "
+                               "wfe_a_b_handshake %d, dither_bypass %d\n",
+                               handshake,
+                               dither_wfe_a_handshake,
+                               wfe_a_b_handshake,
+                               dither_bypass);
+
+       if (handshake) {
+               /* for handshake, we only enable the last completion INT */
+               if (wfe_b_enable)
+                       __raw_writel(0x8000, pxp->base + HW_PXP_IRQ_MASK);
+               else if (wfe_a_enable)
+                       __raw_writel(0x4000, pxp->base + HW_PXP_IRQ_MASK);
+
+               /* Dither fetch */
+               __raw_writel(
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_CH_EN(1) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_16(0)|
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_BYPASS_PIXEL_EN(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_HIGH_BYTE(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_HFLIP(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_VFLIP(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES(32) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM(0) |
+                       BF_PXP_DITHER_FETCH_CTRL_CH0_ARBIT_EN(0),
+                       pxp->base + HW_PXP_DITHER_FETCH_CTRL_CH0);
+
+               if (dither_bypass) {
+                       /* Dither store */
+                       __raw_writel(
+                       BF_PXP_DITHER_STORE_CTRL_CH0_CH_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_BLOCK_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_BLOCK_16(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_HANDSHAKE_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_ARRAY_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_STORE_BYPASS_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_STORE_MEMORY_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_PACK_IN_SEL(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_FILL_DATA_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES(32)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_COMBINE_2CHANNEL(0) |
+                       BF_PXP_DITHER_STORE_CTRL_CH0_ARBIT_EN(0),
+                       pxp->base + HW_PXP_DITHER_STORE_CTRL_CH0);
+
+                       /* WFE_A fetch */
+                       __raw_writel(
+                       BF_PXP_WFA_FETCH_CTRL_BF1_EN(1) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_HSK_MODE(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_BYTES_PP(2) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_SRAM_IF(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_BURST_LEN(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_BYPASS_MODE(1) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_EN(1) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_HSK_MODE(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_BYTES_PP(1) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_SRAM_IF(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_BURST_LEN(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_BYPASS_MODE(0),
+                       pxp->base + HW_PXP_WFA_FETCH_CTRL);
+
+               } else if (dither_wfe_a_handshake) {
+                       /* Dither store */
+                       __raw_writel(
+                       BF_PXP_DITHER_STORE_CTRL_CH0_CH_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_BLOCK_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_BLOCK_16(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_HANDSHAKE_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_ARRAY_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_STORE_BYPASS_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_STORE_MEMORY_EN(1)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_PACK_IN_SEL(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_FILL_DATA_EN(0)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES(32)|
+                       BF_PXP_DITHER_STORE_CTRL_CH0_COMBINE_2CHANNEL(0) |
+                       BF_PXP_DITHER_STORE_CTRL_CH0_ARBIT_EN(0),
+                       pxp->base + HW_PXP_DITHER_STORE_CTRL_CH0);
+
+                       /* WFE_A fetch */
+                       __raw_writel(
+                       BF_PXP_WFA_FETCH_CTRL_BF1_EN(1) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_HSK_MODE(1) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_BYTES_PP(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_SRAM_IF(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_BURST_LEN(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF1_BYPASS_MODE(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_EN(1) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_HSK_MODE(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_BYTES_PP(1) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_SRAM_IF(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_BURST_LEN(0) |
+                       BF_PXP_WFA_FETCH_CTRL_BF2_BYPASS_MODE(0),
+                       pxp->base + HW_PXP_WFA_FETCH_CTRL);
+               }
+
+               if (wfe_a_b_handshake) {
+                       /* WFE_A Store */
+                       __raw_writel(
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_CH_EN(1)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_EN(0)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_16(0)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_HANDSHAKE_EN(1)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_EN(1)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM(1)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_STORE_BYPASS_EN(0)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_STORE_MEMORY_EN(1)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_PACK_IN_SEL(1)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES(16),
+                       pxp->base + HW_PXP_WFE_A_STORE_CTRL_CH1);
+
+                       /* WFE_B fetch */
+                       __raw_writel(
+                       BF_PXP_WFB_FETCH_CTRL_BF1_EN(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_HSK_MODE(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BYTES_PP(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_SRAM_IF(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BURST_LEN(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BORDER_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF1_BYPASS_MODE(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_EN(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_HSK_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BYTES_PP(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_SRAM_IF(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BURST_LEN(0) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BORDER_MODE(1) |
+                       BF_PXP_WFB_FETCH_CTRL_BF2_BYPASS_MODE(0),
+                       pxp->base + HW_PXP_WFB_FETCH_CTRL);
+               } else {
+                       /* WFE_A Store */
+                       __raw_writel(
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_CH_EN(1)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_EN(0)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_16(0)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_HANDSHAKE_EN(0)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_EN(0)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM(0)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_STORE_BYPASS_EN(0)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_STORE_MEMORY_EN(1)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_PACK_IN_SEL(1)|
+                       BF_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES(16),
+                       pxp->base + HW_PXP_WFE_A_STORE_CTRL_CH1);
+               }
+
+               /* trigger operation */
+               __raw_writel(
+               BF_PXP_CTRL_ENABLE(1) |
+               BF_PXP_CTRL_IRQ_ENABLE(0) |
+               BF_PXP_CTRL_NEXT_IRQ_ENABLE(0) |
+               BF_PXP_CTRL_LUT_DMA_IRQ_ENABLE(0) |
+               BF_PXP_CTRL_ENABLE_LCD0_HANDSHAKE(1) |
+               BF_PXP_CTRL_HANDSHAKE_ABORT_SKIP(1) |
+               BF_PXP_CTRL_ROTATE0(0) |
+               BF_PXP_CTRL_HFLIP0(0) |
+               BF_PXP_CTRL_VFLIP0(0) |
+               BF_PXP_CTRL_ROTATE1(0) |
+               BF_PXP_CTRL_HFLIP1(0) |
+               BF_PXP_CTRL_VFLIP1(0) |
+               BF_PXP_CTRL_ENABLE_PS_AS_OUT(0) |
+               BF_PXP_CTRL_ENABLE_DITHER(dither_enable) |
+               BF_PXP_CTRL_ENABLE_WFE_A(wfe_a_enable) |
+               BF_PXP_CTRL_ENABLE_WFE_B(wfe_b_enable) |
+               BF_PXP_CTRL_ENABLE_INPUT_FETCH_STORE(0) |
+               BF_PXP_CTRL_ENABLE_ALPHA_B(0) |
+               BF_PXP_CTRL_BLOCK_SIZE(1) |
+               BF_PXP_CTRL_ENABLE_CSC2(0) |
+               BF_PXP_CTRL_ENABLE_LUT(1) |
+               BF_PXP_CTRL_ENABLE_ROTATE0(0) |
+               BF_PXP_CTRL_ENABLE_ROTATE1(0) |
+               BF_PXP_CTRL_EN_REPEAT(0),
+               pxp->base + HW_PXP_CTRL);
+
+               return;
+       }
+
+       __raw_writel(
+                       BF_PXP_CTRL_ENABLE(1) |
+                       BF_PXP_CTRL_IRQ_ENABLE(0) |
+                       BF_PXP_CTRL_NEXT_IRQ_ENABLE(0) |
+                       BF_PXP_CTRL_LUT_DMA_IRQ_ENABLE(0) |
+                       BF_PXP_CTRL_ENABLE_LCD0_HANDSHAKE(0) |
+                       BF_PXP_CTRL_ROTATE0(0) |
+                       BF_PXP_CTRL_HFLIP0(0) |
+                       BF_PXP_CTRL_VFLIP0(0) |
+                       BF_PXP_CTRL_ROTATE1(0) |
+                       BF_PXP_CTRL_HFLIP1(0) |
+                       BF_PXP_CTRL_VFLIP1(0) |
+                       BF_PXP_CTRL_ENABLE_PS_AS_OUT(0) |
+                       BF_PXP_CTRL_ENABLE_DITHER(dither_enable) |
+                       BF_PXP_CTRL_ENABLE_WFE_A(wfe_a_enable) |
+                       BF_PXP_CTRL_ENABLE_WFE_B(wfe_b_enable) |
+                       BF_PXP_CTRL_ENABLE_INPUT_FETCH_STORE(0) |
+                       BF_PXP_CTRL_ENABLE_ALPHA_B(0) |
+                       BF_PXP_CTRL_BLOCK_SIZE(0) |
+                       BF_PXP_CTRL_ENABLE_CSC2(0) |
+                       BF_PXP_CTRL_ENABLE_LUT(0) |
+                       BF_PXP_CTRL_ENABLE_ROTATE0(0) |
+                       BF_PXP_CTRL_ENABLE_ROTATE1(0) |
+                       BF_PXP_CTRL_EN_REPEAT(0),
+                       pxp->base + HW_PXP_CTRL);
+
+       __raw_writel(
+                       BF_PXP_CTRL2_ENABLE                   (0) |
+                       BF_PXP_CTRL2_ROTATE0                  (0) |
+                       BF_PXP_CTRL2_HFLIP0                   (0) |
+                       BF_PXP_CTRL2_VFLIP0                   (0) |
+                       BF_PXP_CTRL2_ROTATE1                  (0) |
+                       BF_PXP_CTRL2_HFLIP1                   (0) |
+                       BF_PXP_CTRL2_VFLIP1                   (0) |
+                       BF_PXP_CTRL2_ENABLE_DITHER            (0) |
+                       BF_PXP_CTRL2_ENABLE_WFE_A             (0) |
+                       BF_PXP_CTRL2_ENABLE_WFE_B             (0) |
+                       BF_PXP_CTRL2_ENABLE_INPUT_FETCH_STORE (0) |
+                       BF_PXP_CTRL2_ENABLE_ALPHA_B           (0) |
+                       BF_PXP_CTRL2_BLOCK_SIZE               (0) |
+                       BF_PXP_CTRL2_ENABLE_CSC2              (0) |
+                       BF_PXP_CTRL2_ENABLE_LUT               (0) |
+                       BF_PXP_CTRL2_ENABLE_ROTATE0           (0) |
+                       BF_PXP_CTRL2_ENABLE_ROTATE1           (0),
+                       pxp->base + HW_PXP_CTRL2);
+
+       dump_pxp_reg2(pxp);
+}
+
+static int pxp_dma_init(struct pxps *pxp)
+{
+       struct pxp_dma *pxp_dma = &pxp->pxp_dma;
+       struct dma_device *dma = &pxp_dma->dma;
+       int i;
+
+       dma_cap_set(DMA_SLAVE, dma->cap_mask);
+       dma_cap_set(DMA_PRIVATE, dma->cap_mask);
+
+       /* Compulsory common fields */
+       dma->dev = pxp->dev;
+       dma->device_alloc_chan_resources = pxp_alloc_chan_resources;
+       dma->device_free_chan_resources = pxp_free_chan_resources;
+       dma->device_tx_status = pxp_tx_status;
+       dma->device_issue_pending = pxp_issue_pending;
+
+       /* Compulsory for DMA_SLAVE fields */
+       dma->device_prep_slave_sg = pxp_prep_slave_sg;
+       dma->device_terminate_all = pxp_device_terminate_all;
+
+       /* Initialize PxP Channels */
+       INIT_LIST_HEAD(&dma->channels);
+       for (i = 0; i < NR_PXP_VIRT_CHANNEL; i++) {
+               struct pxp_channel *pxp_chan = pxp->channel + i;
+               struct dma_chan *dma_chan = &pxp_chan->dma_chan;
+
+               spin_lock_init(&pxp_chan->lock);
+               mutex_init(&pxp_chan->chan_mutex);
+
+               /* Only one EOF IRQ for PxP, shared by all channels */
+               pxp_chan->eof_irq = pxp->irq;
+               pxp_chan->status = PXP_CHANNEL_FREE;
+               pxp_chan->completed = -ENXIO;
+               snprintf(pxp_chan->eof_name, sizeof(pxp_chan->eof_name),
+                        "PXP EOF %d", i);
+
+               dma_chan->device = &pxp_dma->dma;
+               dma_chan->cookie = 1;
+               dma_chan->chan_id = i;
+               list_add_tail(&dma_chan->device_node, &dma->channels);
+       }
+
+       return dma_async_device_register(&pxp_dma->dma);
+}
+
+static ssize_t clk_off_timeout_show(struct device *dev,
+                                   struct device_attribute *attr, char *buf)
+{
+       return sprintf(buf, "%d\n", timeout_in_ms);
+}
+
+static ssize_t clk_off_timeout_store(struct device *dev,
+                                    struct device_attribute *attr,
+                                    const char *buf, size_t count)
+{
+       int val;
+       if (sscanf(buf, "%d", &val) > 0) {
+               timeout_in_ms = val;
+               return count;
+       }
+       return -EINVAL;
+}
+
+static DEVICE_ATTR(clk_off_timeout, 0644, clk_off_timeout_show,
+                  clk_off_timeout_store);
+
+static ssize_t block_size_show(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+       return sprintf(buf, "%d\n", block_size);
+}
+
+static ssize_t block_size_store(struct device *dev,
+                               struct device_attribute *attr,
+                               const char *buf, size_t count)
+{
+       char **last = NULL;
+
+       block_size = simple_strtoul(buf, last, 0);
+       if (block_size > 1)
+               block_size = 1;
+
+       return count;
+}
+static DEVICE_ATTR(block_size, S_IWUSR | S_IRUGO,
+                  block_size_show, block_size_store);
+
+static const struct of_device_id imx_pxpdma_dt_ids[] = {
+       { .compatible = "fsl,imx7d-pxp-dma", },
+       { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, imx_pxpdma_dt_ids);
+
+static int pxp_probe(struct platform_device *pdev)
+{
+       struct pxps *pxp;
+       struct resource *res;
+       int irq, std_irq;
+       int err = 0;
+
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       irq = platform_get_irq(pdev, 0);
+       if (!res || irq < 0) {
+               err = -ENODEV;
+               goto exit;
+       }
+
+       std_irq = platform_get_irq(pdev, 1);
+       if (!res || irq < 0) {
+               err = -ENODEV;
+               goto exit;
+       }
+
+       pxp = devm_kzalloc(&pdev->dev, sizeof(*pxp), GFP_KERNEL);
+       if (!pxp) {
+               dev_err(&pdev->dev, "failed to allocate control object\n");
+               err = -ENOMEM;
+               goto exit;
+       }
+
+       pxp->dev = &pdev->dev;
+
+       platform_set_drvdata(pdev, pxp);
+       pxp->irq = irq;
+
+       pxp->pxp_ongoing = 0;
+       pxp->lut_state = 0;
+
+       spin_lock_init(&pxp->lock);
+       mutex_init(&pxp->clk_mutex);
+       sema_init(&pxp->sema, 1);
+
+       pxp->base = devm_ioremap_resource(&pdev->dev, res);
+       if (pxp->base == NULL) {
+               dev_err(&pdev->dev, "Couldn't ioremap regs\n");
+               err = -ENODEV;
+               goto exit;
+       }
+       pxp_reg_base = pxp->base;
+
+       pxp->pdev = pdev;
+
+       pxp->clk = devm_clk_get(&pdev->dev, "pxp-axi");
+
+       err = devm_request_irq(&pdev->dev, pxp->irq, pxp_irq, 0,
+                               "pxp-dmaengine", pxp);
+       if (err)
+               goto exit;
+
+       err = devm_request_irq(&pdev->dev, std_irq, pxp_irq, 0,
+                               "pxp-dmaengine-std", pxp);
+       if (err)
+               goto exit;
+
+       /* enable all the possible irq raised by PXP */
+       __raw_writel(0xffff, pxp->base + HW_PXP_IRQ_MASK);
+
+       /* Initialize DMA engine */
+       err = pxp_dma_init(pxp);
+       if (err < 0)
+               goto exit;
+
+       if (device_create_file(&pdev->dev, &dev_attr_clk_off_timeout)) {
+               dev_err(&pdev->dev,
+                       "Unable to create file from clk_off_timeout\n");
+               goto exit;
+       }
+
+       device_create_file(&pdev->dev, &dev_attr_block_size);
+       pxp_clk_enable(pxp);
+       dump_pxp_reg(pxp);
+       pxp_clk_disable(pxp);
+
+       INIT_WORK(&pxp->work, clkoff_callback);
+       init_timer(&pxp->clk_timer);
+       pxp->clk_timer.function = pxp_clkoff_timer;
+       pxp->clk_timer.data = (unsigned long)pxp;
+
+#ifdef CONFIG_MXC_FPGA_M4_TEST
+       fpga_tcml_base = ioremap(FPGA_TCML_ADDR, SZ_32K);
+       if (fpga_tcml_base == NULL) {
+               dev_err(&pdev->dev,
+                       "get fpga_tcml_base error.\n");
+               goto exit;
+       }
+       pinctrl_base = ioremap(PINCTRL, SZ_4K);
+       if (pinctrl_base == NULL) {
+               dev_err(&pdev->dev,
+                       "get fpga_tcml_base error.\n");
+               goto exit;
+       }
+
+       __raw_writel(0xC0000000, pinctrl_base + 0x08);
+       __raw_writel(0x3, pinctrl_base + PIN_DOUT);
+       int i;
+       for (i = 0; i < 1024 * 32 / 4; i++) {
+               *(((unsigned int *)(fpga_tcml_base)) + i) = cm4_image[i];
+       }
+#endif
+       register_pxp_device();
+
+       pm_runtime_enable(pxp->dev);
+
+
+exit:
+       if (err)
+               dev_err(&pdev->dev, "Exiting (unsuccessfully) pxp_probe()\n");
+       return err;
+}
+
+static int pxp_remove(struct platform_device *pdev)
+{
+       struct pxps *pxp = platform_get_drvdata(pdev);
+
+       unregister_pxp_device();
+       cancel_work_sync(&pxp->work);
+       del_timer_sync(&pxp->clk_timer);
+       clk_disable_unprepare(pxp->clk);
+       device_remove_file(&pdev->dev, &dev_attr_clk_off_timeout);
+       device_remove_file(&pdev->dev, &dev_attr_block_size);
+       dma_async_device_unregister(&(pxp->pxp_dma.dma));
+
+       return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int pxp_suspend(struct device *dev)
+{
+       struct pxps *pxp = dev_get_drvdata(dev);
+
+       pxp_clk_enable(pxp);
+       while (__raw_readl(pxp->base + HW_PXP_CTRL) & BM_PXP_CTRL_ENABLE)
+               ;
+
+       __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL);
+       pxp_clk_disable(pxp);
+
+       return 0;
+}
+
+static int pxp_resume(struct device *dev)
+{
+       struct pxps *pxp = dev_get_drvdata(dev);
+
+       pxp_clk_enable(pxp);
+       /* Pull PxP out of reset */
+       __raw_writel(0, pxp->base + HW_PXP_CTRL);
+       pxp_clk_disable(pxp);
+
+       return 0;
+}
+#else
+#define        pxp_suspend     NULL
+#define        pxp_resume      NULL
+#endif
+
+#ifdef CONFIG_PM_RUNTIME
+static int pxp_runtime_suspend(struct device *dev)
+{
+       dev_dbg(dev, "pxp busfreq high release.\n");
+
+       return 0;
+}
+
+static int pxp_runtime_resume(struct device *dev)
+{
+       dev_dbg(dev, "pxp busfreq high request.\n");
+
+       return 0;
+}
+#else
+#define        pxp_runtime_suspend     NULL
+#define        pxp_runtime_resume      NULL
+#endif
+
+static const struct dev_pm_ops pxp_pm_ops = {
+       SET_RUNTIME_PM_OPS(pxp_runtime_suspend, pxp_runtime_resume, NULL)
+       SET_SYSTEM_SLEEP_PM_OPS(pxp_suspend, pxp_resume)
+};
+
+static struct platform_driver pxp_driver = {
+       .driver = {
+                       .name = "imx-pxp-v3",
+                       .of_match_table = of_match_ptr(imx_pxpdma_dt_ids),
+                       .pm = &pxp_pm_ops,
+                  },
+       .probe = pxp_probe,
+       .remove = pxp_remove,
+};
+
+static int __init pxp_init(void)
+{
+        return platform_driver_register(&pxp_driver);
+}
+late_initcall(pxp_init);
+
+static void __exit pxp_exit(void)
+{
+        platform_driver_unregister(&pxp_driver);
+}
+module_exit(pxp_exit);
+
+
+MODULE_DESCRIPTION("i.MX PxP driver");
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_LICENSE("GPL");

diff --git a/drivers/dma/pxp/regs-pxp_v2.h b/drivers/dma/pxp/regs-pxp_v2.h
new file mode 100644 (file)
index 0000000..8b20dde
--- /dev/null
+++ b/drivers/dma/pxp/regs-pxp_v2.h
@@ -0,0 +1,1152 @@
+/*
+ * Freescale PXP Register Definitions
+ *
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ * This file is created by xml file. Don't Edit it.
+ *
+ * Xml Revision: 1.29
+ * Template revision: 1.3
+ */
+
+#ifndef __ARCH_ARM___PXP_H
+#define __ARCH_ARM___PXP_H
+
+#define HW_PXP_CTRL    (0x00000000)
+#define HW_PXP_CTRL_SET        (0x00000004)
+#define HW_PXP_CTRL_CLR        (0x00000008)
+#define HW_PXP_CTRL_TOG        (0x0000000c)
+
+#define BM_PXP_CTRL_SFTRST 0x80000000
+#define BM_PXP_CTRL_CLKGATE 0x40000000
+#define BM_PXP_CTRL_RSVD4 0x20000000
+#define BM_PXP_CTRL_EN_REPEAT 0x10000000
+#define BP_PXP_CTRL_RSVD3      26
+#define BM_PXP_CTRL_RSVD3 0x0C000000
+#define BF_PXP_CTRL_RSVD3(v)  \
+       (((v) << 26) & BM_PXP_CTRL_RSVD3)
+#define BP_PXP_CTRL_INTERLACED_INPUT     24
+#define BM_PXP_CTRL_INTERLACED_INPUT 0x03000000
+#define BF_PXP_CTRL_INTERLACED_INPUT(v)  \
+       (((v) << 24) & BM_PXP_CTRL_INTERLACED_INPUT)
+#define BV_PXP_CTRL_INTERLACED_INPUT__PROGRESSIVE 0x0
+#define BV_PXP_CTRL_INTERLACED_INPUT__FIELD0     0x2
+#define BV_PXP_CTRL_INTERLACED_INPUT__FIELD1     0x3
+#define BM_PXP_CTRL_BLOCK_SIZE 0x00800000
+#define BV_PXP_CTRL_BLOCK_SIZE__8X8   0x0
+#define BV_PXP_CTRL_BLOCK_SIZE__16X16 0x1
+#define BM_PXP_CTRL_ROT_POS 0x00400000
+#define BM_PXP_CTRL_IN_PLACE 0x00200000
+#define BP_PXP_CTRL_RSVD1      12
+#define BM_PXP_CTRL_RSVD1 0x001FF000
+#define BF_PXP_CTRL_RSVD1(v)  \
+       (((v) << 12) & BM_PXP_CTRL_RSVD1)
+#define BM_PXP_CTRL_VFLIP 0x00000800
+#define BM_PXP_CTRL_HFLIP 0x00000400
+#define BP_PXP_CTRL_ROTATE     8
+#define BM_PXP_CTRL_ROTATE 0x00000300
+#define BF_PXP_CTRL_ROTATE(v)  \
+       (((v) << 8) & BM_PXP_CTRL_ROTATE)
+#define BV_PXP_CTRL_ROTATE__ROT_0   0x0
+#define BV_PXP_CTRL_ROTATE__ROT_90  0x1
+#define BV_PXP_CTRL_ROTATE__ROT_180 0x2
+#define BV_PXP_CTRL_ROTATE__ROT_270 0x3
+#define BP_PXP_CTRL_RSVD0      5
+#define BM_PXP_CTRL_RSVD0 0x000000E0
+#define BF_PXP_CTRL_RSVD0(v)  \
+       (((v) << 5) & BM_PXP_CTRL_RSVD0)
+#define BM_PXP_CTRL_ENABLE_LCD_HANDSHAKE 0x00000010
+#define BM_PXP_CTRL_LUT_DMA_IRQ_ENABLE 0x00000008
+#define BM_PXP_CTRL_NEXT_IRQ_ENABLE 0x00000004
+#define BM_PXP_CTRL_IRQ_ENABLE 0x00000002
+#define BM_PXP_CTRL_ENABLE 0x00000001
+
+#define HW_PXP_STAT    (0x00000010)
+#define HW_PXP_STAT_SET        (0x00000014)
+#define HW_PXP_STAT_CLR        (0x00000018)
+#define HW_PXP_STAT_TOG        (0x0000001c)
+
+#define BP_PXP_STAT_BLOCKX     24
+#define BM_PXP_STAT_BLOCKX 0xFF000000
+#define BF_PXP_STAT_BLOCKX(v) \
+       (((v) << 24) & BM_PXP_STAT_BLOCKX)
+#define BP_PXP_STAT_BLOCKY     16
+#define BM_PXP_STAT_BLOCKY 0x00FF0000
+#define BF_PXP_STAT_BLOCKY(v)  \
+       (((v) << 16) & BM_PXP_STAT_BLOCKY)
+#define BP_PXP_STAT_RSVD2      9
+#define BM_PXP_STAT_RSVD2 0x0000FE00
+#define BF_PXP_STAT_RSVD2(v)  \
+       (((v) << 9) & BM_PXP_STAT_RSVD2)
+#define BM_PXP_STAT_LUT_DMA_LOAD_DONE_IRQ 0x00000100
+#define BP_PXP_STAT_AXI_ERROR_ID      4
+#define BM_PXP_STAT_AXI_ERROR_ID 0x000000F0
+#define BF_PXP_STAT_AXI_ERROR_ID(v)  \
+       (((v) << 4) & BM_PXP_STAT_AXI_ERROR_ID)
+#define BM_PXP_STAT_NEXT_IRQ 0x00000008
+#define BM_PXP_STAT_AXI_READ_ERROR 0x00000004
+#define BM_PXP_STAT_AXI_WRITE_ERROR 0x00000002
+#define BM_PXP_STAT_IRQ 0x00000001
+
+#define HW_PXP_OUT_CTRL        (0x00000020)
+#define HW_PXP_OUT_CTRL_SET    (0x00000024)
+#define HW_PXP_OUT_CTRL_CLR    (0x00000028)
+#define HW_PXP_OUT_CTRL_TOG    (0x0000002c)
+
+#define BP_PXP_OUT_CTRL_ALPHA     24
+#define BM_PXP_OUT_CTRL_ALPHA 0xFF000000
+#define BF_PXP_OUT_CTRL_ALPHA(v) \
+       (((v) << 24) & BM_PXP_OUT_CTRL_ALPHA)
+#define BM_PXP_OUT_CTRL_ALPHA_OUTPUT 0x00800000
+#define BP_PXP_OUT_CTRL_RSVD1     10
+#define BM_PXP_OUT_CTRL_RSVD1 0x007FFC00
+#define BF_PXP_OUT_CTRL_RSVD1(v)  \
+       (((v) << 10) & BM_PXP_OUT_CTRL_RSVD1)
+#define BP_PXP_OUT_CTRL_INTERLACED_OUTPUT      8
+#define BM_PXP_OUT_CTRL_INTERLACED_OUTPUT 0x00000300
+#define BF_PXP_OUT_CTRL_INTERLACED_OUTPUT(v)  \
+       (((v) << 8) & BM_PXP_OUT_CTRL_INTERLACED_OUTPUT)
+#define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__PROGRESSIVE 0x0
+#define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__FIELD0      0x1
+#define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__FIELD1      0x2
+#define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__INTERLACED  0x3
+#define BP_PXP_OUT_CTRL_RSVD0     5
+#define BM_PXP_OUT_CTRL_RSVD0 0x000000E0
+#define BF_PXP_OUT_CTRL_RSVD0(v)  \
+       (((v) << 5) & BM_PXP_OUT_CTRL_RSVD0)
+#define BP_PXP_OUT_CTRL_FORMAT     0
+#define BM_PXP_OUT_CTRL_FORMAT 0x0000001F
+#define BF_PXP_OUT_CTRL_FORMAT(v)  \
+       (((v) << 0) & BM_PXP_OUT_CTRL_FORMAT)
+#define BV_PXP_OUT_CTRL_FORMAT__ARGB8888  0x0
+#define BV_PXP_OUT_CTRL_FORMAT__RGB888   0x4
+#define BV_PXP_OUT_CTRL_FORMAT__RGB888P   0x5
+#define BV_PXP_OUT_CTRL_FORMAT__ARGB1555  0x8
+#define BV_PXP_OUT_CTRL_FORMAT__ARGB4444  0x9
+#define BV_PXP_OUT_CTRL_FORMAT__RGB555   0xC
+#define BV_PXP_OUT_CTRL_FORMAT__RGB444   0xD
+#define BV_PXP_OUT_CTRL_FORMAT__RGB565   0xE
+#define BV_PXP_OUT_CTRL_FORMAT__YUV1P444  0x10
+#define BV_PXP_OUT_CTRL_FORMAT__UYVY1P422 0x12
+#define BV_PXP_OUT_CTRL_FORMAT__VYUY1P422 0x13
+#define BV_PXP_OUT_CTRL_FORMAT__Y8       0x14
+#define BV_PXP_OUT_CTRL_FORMAT__Y4       0x15
+#define BV_PXP_OUT_CTRL_FORMAT__YUV2P422  0x18
+#define BV_PXP_OUT_CTRL_FORMAT__YUV2P420  0x19
+#define BV_PXP_OUT_CTRL_FORMAT__YVU2P422  0x1A
+#define BV_PXP_OUT_CTRL_FORMAT__YVU2P420  0x1B
+
+#define HW_PXP_OUT_BUF (0x00000030)
+
+#define BP_PXP_OUT_BUF_ADDR     0
+#define BM_PXP_OUT_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_OUT_BUF_ADDR(v)  (v)
+
+#define HW_PXP_OUT_BUF2        (0x00000040)
+
+#define BP_PXP_OUT_BUF2_ADDR     0
+#define BM_PXP_OUT_BUF2_ADDR 0xFFFFFFFF
+#define BF_PXP_OUT_BUF2_ADDR(v)   (v)
+
+#define HW_PXP_OUT_PITCH       (0x00000050)
+
+#define BP_PXP_OUT_PITCH_RSVD     16
+#define BM_PXP_OUT_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_OUT_PITCH_RSVD(v) \
+       (((v) << 16) & BM_PXP_OUT_PITCH_RSVD)
+#define BP_PXP_OUT_PITCH_PITCH     0
+#define BM_PXP_OUT_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_OUT_PITCH_PITCH(v)  \
+       (((v) << 0) & BM_PXP_OUT_PITCH_PITCH)
+
+#define HW_PXP_OUT_LRC (0x00000060)
+
+#define BP_PXP_OUT_LRC_RSVD1     30
+#define BM_PXP_OUT_LRC_RSVD1 0xC0000000
+#define BF_PXP_OUT_LRC_RSVD1(v) \
+       (((v) << 30) & BM_PXP_OUT_LRC_RSVD1)
+#define BP_PXP_OUT_LRC_X      16
+#define BM_PXP_OUT_LRC_X 0x3FFF0000
+#define BF_PXP_OUT_LRC_X(v)  \
+       (((v) << 16) & BM_PXP_OUT_LRC_X)
+#define BP_PXP_OUT_LRC_RSVD0     14
+#define BM_PXP_OUT_LRC_RSVD0 0x0000C000
+#define BF_PXP_OUT_LRC_RSVD0(v)  \
+       (((v) << 14) & BM_PXP_OUT_LRC_RSVD0)
+#define BP_PXP_OUT_LRC_Y      0
+#define BM_PXP_OUT_LRC_Y 0x00003FFF
+#define BF_PXP_OUT_LRC_Y(v)  \
+       (((v) << 0) & BM_PXP_OUT_LRC_Y)
+
+#define HW_PXP_OUT_PS_ULC      (0x00000070)
+
+#define BP_PXP_OUT_PS_ULC_RSVD1      30
+#define BM_PXP_OUT_PS_ULC_RSVD1 0xC0000000
+#define BF_PXP_OUT_PS_ULC_RSVD1(v) \
+       (((v) << 30) & BM_PXP_OUT_PS_ULC_RSVD1)
+#define BP_PXP_OUT_PS_ULC_X     16
+#define BM_PXP_OUT_PS_ULC_X 0x3FFF0000
+#define BF_PXP_OUT_PS_ULC_X(v) \
+       (((v) << 16) & BM_PXP_OUT_PS_ULC_X)
+#define BP_PXP_OUT_PS_ULC_RSVD0      14
+#define BM_PXP_OUT_PS_ULC_RSVD0 0x0000C000
+#define BF_PXP_OUT_PS_ULC_RSVD0(v)  \
+       (((v) << 14) & BM_PXP_OUT_PS_ULC_RSVD0)
+#define BP_PXP_OUT_PS_ULC_Y     0
+#define BM_PXP_OUT_PS_ULC_Y 0x00003FFF
+#define BF_PXP_OUT_PS_ULC_Y(v) \
+       (((v) << 0) & BM_PXP_OUT_PS_ULC_Y)
+
+#define HW_PXP_OUT_PS_LRC      (0x00000080)
+
+#define BP_PXP_OUT_PS_LRC_RSVD1      30
+#define BM_PXP_OUT_PS_LRC_RSVD1 0xC0000000
+#define BF_PXP_OUT_PS_LRC_RSVD1(v) \
+       (((v) << 30) & BM_PXP_OUT_PS_LRC_RSVD1)
+#define BP_PXP_OUT_PS_LRC_X     16
+#define BM_PXP_OUT_PS_LRC_X 0x3FFF0000
+#define BF_PXP_OUT_PS_LRC_X(v) \
+       (((v) << 16) & BM_PXP_OUT_PS_LRC_X)
+#define BP_PXP_OUT_PS_LRC_RSVD0      14
+#define BM_PXP_OUT_PS_LRC_RSVD0 0x0000C000
+#define BF_PXP_OUT_PS_LRC_RSVD0(v)  \
+       (((v) << 14) & BM_PXP_OUT_PS_LRC_RSVD0)
+#define BP_PXP_OUT_PS_LRC_Y     0
+#define BM_PXP_OUT_PS_LRC_Y 0x00003FFF
+#define BF_PXP_OUT_PS_LRC_Y(v) \
+       (((v) << 0) & BM_PXP_OUT_PS_LRC_Y)
+
+#define HW_PXP_OUT_AS_ULC      (0x00000090)
+
+#define BP_PXP_OUT_AS_ULC_RSVD1      30
+#define BM_PXP_OUT_AS_ULC_RSVD1 0xC0000000
+#define BF_PXP_OUT_AS_ULC_RSVD1(v) \
+       (((v) << 30) & BM_PXP_OUT_AS_ULC_RSVD1)
+#define BP_PXP_OUT_AS_ULC_X     16
+#define BM_PXP_OUT_AS_ULC_X 0x3FFF0000
+#define BF_PXP_OUT_AS_ULC_X(v) \
+       (((v) << 16) & BM_PXP_OUT_AS_ULC_X)
+#define BP_PXP_OUT_AS_ULC_RSVD0      14
+#define BM_PXP_OUT_AS_ULC_RSVD0 0x0000C000
+#define BF_PXP_OUT_AS_ULC_RSVD0(v)  \
+       (((v) << 14) & BM_PXP_OUT_AS_ULC_RSVD0)
+#define BP_PXP_OUT_AS_ULC_Y     0
+#define BM_PXP_OUT_AS_ULC_Y 0x00003FFF
+#define BF_PXP_OUT_AS_ULC_Y(v) \
+       (((v) << 0) & BM_PXP_OUT_AS_ULC_Y)
+
+#define HW_PXP_OUT_AS_LRC      (0x000000a0)
+
+#define BP_PXP_OUT_AS_LRC_RSVD1      30
+#define BM_PXP_OUT_AS_LRC_RSVD1 0xC0000000
+#define BF_PXP_OUT_AS_LRC_RSVD1(v) \
+       (((v) << 30) & BM_PXP_OUT_AS_LRC_RSVD1)
+#define BP_PXP_OUT_AS_LRC_X     16
+#define BM_PXP_OUT_AS_LRC_X 0x3FFF0000
+#define BF_PXP_OUT_AS_LRC_X(v) \
+       (((v) << 16) & BM_PXP_OUT_AS_LRC_X)
+#define BP_PXP_OUT_AS_LRC_RSVD0      14
+#define BM_PXP_OUT_AS_LRC_RSVD0 0x0000C000
+#define BF_PXP_OUT_AS_LRC_RSVD0(v)  \
+       (((v) << 14) & BM_PXP_OUT_AS_LRC_RSVD0)
+#define BP_PXP_OUT_AS_LRC_Y     0
+#define BM_PXP_OUT_AS_LRC_Y 0x00003FFF
+#define BF_PXP_OUT_AS_LRC_Y(v) \
+       (((v) << 0) & BM_PXP_OUT_AS_LRC_Y)
+
+#define HW_PXP_PS_CTRL (0x000000b0)
+#define HW_PXP_PS_CTRL_SET     (0x000000b4)
+#define HW_PXP_PS_CTRL_CLR     (0x000000b8)
+#define HW_PXP_PS_CTRL_TOG     (0x000000bc)
+
+#define BP_PXP_PS_CTRL_RSVD1     12
+#define BM_PXP_PS_CTRL_RSVD1 0xFFFFF000
+#define BF_PXP_PS_CTRL_RSVD1(v) \
+       (((v) << 12) & BM_PXP_PS_CTRL_RSVD1)
+#define BP_PXP_PS_CTRL_DECX     10
+#define BM_PXP_PS_CTRL_DECX 0x00000C00
+#define BF_PXP_PS_CTRL_DECX(v) \
+       (((v) << 10) & BM_PXP_PS_CTRL_DECX)
+#define BV_PXP_PS_CTRL_DECX__DISABLE 0x0
+#define BV_PXP_PS_CTRL_DECX__DECX2   0x1
+#define BV_PXP_PS_CTRL_DECX__DECX4   0x2
+#define BV_PXP_PS_CTRL_DECX__DECX8   0x3
+#define BP_PXP_PS_CTRL_DECY     8
+#define BM_PXP_PS_CTRL_DECY 0x00000300
+#define BF_PXP_PS_CTRL_DECY(v) \
+       (((v) << 8) & BM_PXP_PS_CTRL_DECY)
+#define BV_PXP_PS_CTRL_DECY__DISABLE 0x0
+#define BV_PXP_PS_CTRL_DECY__DECY2   0x1
+#define BV_PXP_PS_CTRL_DECY__DECY4   0x2
+#define BV_PXP_PS_CTRL_DECY__DECY8   0x3
+#define BP_PXP_PS_CTRL_SWAP 5
+#define BM_PXP_PS_CTRL_SWAP 0x000000E0
+#define BF_PXP_PS_CTRL_SWAP(v)  \
+       (((v) << 5) & BM_PXP_PS_CTRL_SWAP)
+#define BP_PXP_PS_CTRL_FORMAT     0
+#define BM_PXP_PS_CTRL_FORMAT 0x0000001F
+#define BF_PXP_PS_CTRL_FORMAT(v)  \
+       (((v) << 0) & BM_PXP_PS_CTRL_FORMAT)
+#define BV_PXP_PS_CTRL_FORMAT__RGB888   0x4
+#define BV_PXP_PS_CTRL_FORMAT__RGB555   0xC
+#define BV_PXP_PS_CTRL_FORMAT__RGB444   0xD
+#define BV_PXP_PS_CTRL_FORMAT__RGB565   0xE
+#define BV_PXP_PS_CTRL_FORMAT__YUV1P444  0x10
+#define BV_PXP_PS_CTRL_FORMAT__UYVY1P422 0x12
+#define BV_PXP_PS_CTRL_FORMAT__VYUY1P422 0x13
+#define BV_PXP_PS_CTRL_FORMAT__Y8       0x14
+#define BV_PXP_PS_CTRL_FORMAT__Y4       0x15
+#define BV_PXP_PS_CTRL_FORMAT__YUV2P422  0x18
+#define BV_PXP_PS_CTRL_FORMAT__YUV2P420  0x19
+#define BV_PXP_PS_CTRL_FORMAT__YVU2P422  0x1A
+#define BV_PXP_PS_CTRL_FORMAT__YVU2P420  0x1B
+#define BV_PXP_PS_CTRL_FORMAT__YUV422   0x1E
+#define BV_PXP_PS_CTRL_FORMAT__YUV420   0x1F
+
+#define HW_PXP_PS_BUF  (0x000000c0)
+
+#define BP_PXP_PS_BUF_ADDR     0
+#define BM_PXP_PS_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_PS_BUF_ADDR(v)  (v)
+
+#define HW_PXP_PS_UBUF (0x000000d0)
+
+#define BP_PXP_PS_UBUF_ADDR     0
+#define BM_PXP_PS_UBUF_ADDR 0xFFFFFFFF
+#define BF_PXP_PS_UBUF_ADDR(v)  (v)
+
+#define HW_PXP_PS_VBUF (0x000000e0)
+
+#define BP_PXP_PS_VBUF_ADDR     0
+#define BM_PXP_PS_VBUF_ADDR 0xFFFFFFFF
+#define BF_PXP_PS_VBUF_ADDR(v)  (v)
+
+#define HW_PXP_PS_PITCH        (0x000000f0)
+
+#define BP_PXP_PS_PITCH_RSVD     16
+#define BM_PXP_PS_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_PS_PITCH_RSVD(v) \
+       (((v) << 16) & BM_PXP_PS_PITCH_RSVD)
+#define BP_PXP_PS_PITCH_PITCH     0
+#define BM_PXP_PS_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_PS_PITCH_PITCH(v)  \
+       (((v) << 0) & BM_PXP_PS_PITCH_PITCH)
+
+#define HW_PXP_PS_BACKGROUND   (0x00000100)
+
+#define BP_PXP_PS_BACKGROUND_RSVD      24
+#define BM_PXP_PS_BACKGROUND_RSVD 0xFF000000
+#define BF_PXP_PS_BACKGROUND_RSVD(v) \
+       (((v) << 24) & BM_PXP_PS_BACKGROUND_RSVD)
+#define BP_PXP_PS_BACKGROUND_COLOR     0
+#define BM_PXP_PS_BACKGROUND_COLOR 0x00FFFFFF
+#define BF_PXP_PS_BACKGROUND_COLOR(v)  \
+       (((v) << 0) & BM_PXP_PS_BACKGROUND_COLOR)
+
+#define HW_PXP_PS_SCALE        (0x00000110)
+
+#define BM_PXP_PS_SCALE_RSVD2 0x80000000
+#define BP_PXP_PS_SCALE_YSCALE     16
+#define BM_PXP_PS_SCALE_YSCALE 0x7FFF0000
+#define BF_PXP_PS_SCALE_YSCALE(v)  \
+       (((v) << 16) & BM_PXP_PS_SCALE_YSCALE)
+#define BM_PXP_PS_SCALE_RSVD1 0x00008000
+#define BP_PXP_PS_SCALE_XSCALE     0
+#define BM_PXP_PS_SCALE_XSCALE 0x00007FFF
+#define BF_PXP_PS_SCALE_XSCALE(v)  \
+       (((v) << 0) & BM_PXP_PS_SCALE_XSCALE)
+
+#define HW_PXP_PS_OFFSET       (0x00000120)
+
+#define BP_PXP_PS_OFFSET_RSVD2     28
+#define BM_PXP_PS_OFFSET_RSVD2 0xF0000000
+#define BF_PXP_PS_OFFSET_RSVD2(v) \
+       (((v) << 28) & BM_PXP_PS_OFFSET_RSVD2)
+#define BP_PXP_PS_OFFSET_YOFFSET      16
+#define BM_PXP_PS_OFFSET_YOFFSET 0x0FFF0000
+#define BF_PXP_PS_OFFSET_YOFFSET(v)  \
+       (((v) << 16) & BM_PXP_PS_OFFSET_YOFFSET)
+#define BP_PXP_PS_OFFSET_RSVD1     12
+#define BM_PXP_PS_OFFSET_RSVD1 0x0000F000
+#define BF_PXP_PS_OFFSET_RSVD1(v)  \
+       (((v) << 12) & BM_PXP_PS_OFFSET_RSVD1)
+#define BP_PXP_PS_OFFSET_XOFFSET      0
+#define BM_PXP_PS_OFFSET_XOFFSET 0x00000FFF
+#define BF_PXP_PS_OFFSET_XOFFSET(v)  \
+       (((v) << 0) & BM_PXP_PS_OFFSET_XOFFSET)
+
+#define HW_PXP_PS_CLRKEYLOW    (0x00000130)
+
+#define BP_PXP_PS_CLRKEYLOW_RSVD1      24
+#define BM_PXP_PS_CLRKEYLOW_RSVD1 0xFF000000
+#define BF_PXP_PS_CLRKEYLOW_RSVD1(v) \
+       (((v) << 24) & BM_PXP_PS_CLRKEYLOW_RSVD1)
+#define BP_PXP_PS_CLRKEYLOW_PIXEL      0
+#define BM_PXP_PS_CLRKEYLOW_PIXEL 0x00FFFFFF
+#define BF_PXP_PS_CLRKEYLOW_PIXEL(v)  \
+       (((v) << 0) & BM_PXP_PS_CLRKEYLOW_PIXEL)
+
+#define HW_PXP_PS_CLRKEYHIGH   (0x00000140)
+
+#define BP_PXP_PS_CLRKEYHIGH_RSVD1     24
+#define BM_PXP_PS_CLRKEYHIGH_RSVD1 0xFF000000
+#define BF_PXP_PS_CLRKEYHIGH_RSVD1(v) \
+       (((v) << 24) & BM_PXP_PS_CLRKEYHIGH_RSVD1)
+#define BP_PXP_PS_CLRKEYHIGH_PIXEL     0
+#define BM_PXP_PS_CLRKEYHIGH_PIXEL 0x00FFFFFF
+#define BF_PXP_PS_CLRKEYHIGH_PIXEL(v)  \
+       (((v) << 0) & BM_PXP_PS_CLRKEYHIGH_PIXEL)
+
+#define HW_PXP_AS_CTRL (0x00000150)
+
+#define BP_PXP_AS_CTRL_RSVD1     21
+#define BM_PXP_AS_CTRL_RSVD1 0xFFE00000
+#define BF_PXP_AS_CTRL_RSVD1(v) \
+       (((v) << 21) & BM_PXP_AS_CTRL_RSVD1)
+#define BM_PXP_AS_CTRL_ALPHA_INVERT 0x00100000
+#define BP_PXP_AS_CTRL_ROP     16
+#define BM_PXP_AS_CTRL_ROP 0x000F0000
+#define BF_PXP_AS_CTRL_ROP(v)  \
+       (((v) << 16) & BM_PXP_AS_CTRL_ROP)
+#define BV_PXP_AS_CTRL_ROP__MASKAS     0x0
+#define BV_PXP_AS_CTRL_ROP__MASKNOTAS  0x1
+#define BV_PXP_AS_CTRL_ROP__MASKASNOT  0x2
+#define BV_PXP_AS_CTRL_ROP__MERGEAS    0x3
+#define BV_PXP_AS_CTRL_ROP__MERGENOTAS 0x4
+#define BV_PXP_AS_CTRL_ROP__MERGEASNOT 0x5
+#define BV_PXP_AS_CTRL_ROP__NOTCOPYAS  0x6
+#define BV_PXP_AS_CTRL_ROP__NOT        0x7
+#define BV_PXP_AS_CTRL_ROP__NOTMASKAS  0x8
+#define BV_PXP_AS_CTRL_ROP__NOTMERGEAS 0x9
+#define BV_PXP_AS_CTRL_ROP__XORAS      0xA
+#define BV_PXP_AS_CTRL_ROP__NOTXORAS   0xB
+#define BP_PXP_AS_CTRL_ALPHA     8
+#define BM_PXP_AS_CTRL_ALPHA 0x0000FF00
+#define BF_PXP_AS_CTRL_ALPHA(v)  \
+       (((v) << 8) & BM_PXP_AS_CTRL_ALPHA)
+#define BP_PXP_AS_CTRL_FORMAT     4
+#define BM_PXP_AS_CTRL_FORMAT 0x000000F0
+#define BF_PXP_AS_CTRL_FORMAT(v)  \
+       (((v) << 4) & BM_PXP_AS_CTRL_FORMAT)
+#define BV_PXP_AS_CTRL_FORMAT__ARGB8888 0x0
+#define BV_PXP_AS_CTRL_FORMAT__RGB888  0x4
+#define BV_PXP_AS_CTRL_FORMAT__ARGB1555 0x8
+#define BV_PXP_AS_CTRL_FORMAT__ARGB4444 0x9
+#define BV_PXP_AS_CTRL_FORMAT__RGB555  0xC
+#define BV_PXP_AS_CTRL_FORMAT__RGB444  0xD
+#define BV_PXP_AS_CTRL_FORMAT__RGB565  0xE
+#define BM_PXP_AS_CTRL_ENABLE_COLORKEY 0x00000008
+#define BP_PXP_AS_CTRL_ALPHA_CTRL      1
+#define BM_PXP_AS_CTRL_ALPHA_CTRL 0x00000006
+#define BF_PXP_AS_CTRL_ALPHA_CTRL(v)  \
+       (((v) << 1) & BM_PXP_AS_CTRL_ALPHA_CTRL)
+#define BV_PXP_AS_CTRL_ALPHA_CTRL__Embedded 0x0
+#define BV_PXP_AS_CTRL_ALPHA_CTRL__Override 0x1
+#define BV_PXP_AS_CTRL_ALPHA_CTRL__Multiply 0x2
+#define BV_PXP_AS_CTRL_ALPHA_CTRL__ROPs     0x3
+#define BM_PXP_AS_CTRL_RSVD0 0x00000001
+
+#define HW_PXP_AS_BUF  (0x00000160)
+
+#define BP_PXP_AS_BUF_ADDR     0
+#define BM_PXP_AS_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_AS_BUF_ADDR(v)  (v)
+
+#define HW_PXP_AS_PITCH        (0x00000170)
+
+#define BP_PXP_AS_PITCH_RSVD     16
+#define BM_PXP_AS_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_AS_PITCH_RSVD(v) \
+       (((v) << 16) & BM_PXP_AS_PITCH_RSVD)
+#define BP_PXP_AS_PITCH_PITCH     0
+#define BM_PXP_AS_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_AS_PITCH_PITCH(v)  \
+       (((v) << 0) & BM_PXP_AS_PITCH_PITCH)
+
+#define HW_PXP_AS_CLRKEYLOW    (0x00000180)
+
+#define BP_PXP_AS_CLRKEYLOW_RSVD1      24
+#define BM_PXP_AS_CLRKEYLOW_RSVD1 0xFF000000
+#define BF_PXP_AS_CLRKEYLOW_RSVD1(v) \
+       (((v) << 24) & BM_PXP_AS_CLRKEYLOW_RSVD1)
+#define BP_PXP_AS_CLRKEYLOW_PIXEL      0
+#define BM_PXP_AS_CLRKEYLOW_PIXEL 0x00FFFFFF
+#define BF_PXP_AS_CLRKEYLOW_PIXEL(v)  \
+       (((v) << 0) & BM_PXP_AS_CLRKEYLOW_PIXEL)
+
+#define HW_PXP_AS_CLRKEYHIGH   (0x00000190)
+
+#define BP_PXP_AS_CLRKEYHIGH_RSVD1     24
+#define BM_PXP_AS_CLRKEYHIGH_RSVD1 0xFF000000
+#define BF_PXP_AS_CLRKEYHIGH_RSVD1(v) \
+       (((v) << 24) & BM_PXP_AS_CLRKEYHIGH_RSVD1)
+#define BP_PXP_AS_CLRKEYHIGH_PIXEL     0
+#define BM_PXP_AS_CLRKEYHIGH_PIXEL 0x00FFFFFF
+#define BF_PXP_AS_CLRKEYHIGH_PIXEL(v)  \
+       (((v) << 0) & BM_PXP_AS_CLRKEYHIGH_PIXEL)
+
+#define HW_PXP_CSC1_COEF0      (0x000001a0)
+
+#define BM_PXP_CSC1_COEF0_YCBCR_MODE 0x80000000
+#define BM_PXP_CSC1_COEF0_BYPASS 0x40000000
+#define BM_PXP_CSC1_COEF0_RSVD1 0x20000000
+#define BP_PXP_CSC1_COEF0_C0     18
+#define BM_PXP_CSC1_COEF0_C0 0x1FFC0000
+#define BF_PXP_CSC1_COEF0_C0(v)  \
+       (((v) << 18) & BM_PXP_CSC1_COEF0_C0)
+#define BP_PXP_CSC1_COEF0_UV_OFFSET     9
+#define BM_PXP_CSC1_COEF0_UV_OFFSET 0x0003FE00
+#define BF_PXP_CSC1_COEF0_UV_OFFSET(v) \
+       (((v) << 9) & BM_PXP_CSC1_COEF0_UV_OFFSET)
+#define BP_PXP_CSC1_COEF0_Y_OFFSET     0
+#define BM_PXP_CSC1_COEF0_Y_OFFSET 0x000001FF
+#define BF_PXP_CSC1_COEF0_Y_OFFSET(v)  \
+       (((v) << 0) & BM_PXP_CSC1_COEF0_Y_OFFSET)
+
+#define HW_PXP_CSC1_COEF1      (0x000001b0)
+
+#define BP_PXP_CSC1_COEF1_RSVD1      27
+#define BM_PXP_CSC1_COEF1_RSVD1 0xF8000000
+#define BF_PXP_CSC1_COEF1_RSVD1(v) \
+       (((v) << 27) & BM_PXP_CSC1_COEF1_RSVD1)
+#define BP_PXP_CSC1_COEF1_C1     16
+#define BM_PXP_CSC1_COEF1_C1 0x07FF0000
+#define BF_PXP_CSC1_COEF1_C1(v)  \
+       (((v) << 16) & BM_PXP_CSC1_COEF1_C1)
+#define BP_PXP_CSC1_COEF1_RSVD0      11
+#define BM_PXP_CSC1_COEF1_RSVD0 0x0000F800
+#define BF_PXP_CSC1_COEF1_RSVD0(v)  \
+       (((v) << 11) & BM_PXP_CSC1_COEF1_RSVD0)
+#define BP_PXP_CSC1_COEF1_C4     0
+#define BM_PXP_CSC1_COEF1_C4 0x000007FF
+#define BF_PXP_CSC1_COEF1_C4(v)  \
+       (((v) << 0) & BM_PXP_CSC1_COEF1_C4)
+
+#define HW_PXP_CSC1_COEF2      (0x000001c0)
+
+#define BP_PXP_CSC1_COEF2_RSVD1      27
+#define BM_PXP_CSC1_COEF2_RSVD1 0xF8000000
+#define BF_PXP_CSC1_COEF2_RSVD1(v) \
+       (((v) << 27) & BM_PXP_CSC1_COEF2_RSVD1)
+#define BP_PXP_CSC1_COEF2_C2     16
+#define BM_PXP_CSC1_COEF2_C2 0x07FF0000
+#define BF_PXP_CSC1_COEF2_C2(v)  \
+       (((v) << 16) & BM_PXP_CSC1_COEF2_C2)
+#define BP_PXP_CSC1_COEF2_RSVD0      11
+#define BM_PXP_CSC1_COEF2_RSVD0 0x0000F800
+#define BF_PXP_CSC1_COEF2_RSVD0(v)  \
+       (((v) << 11) & BM_PXP_CSC1_COEF2_RSVD0)
+#define BP_PXP_CSC1_COEF2_C3     0
+#define BM_PXP_CSC1_COEF2_C3 0x000007FF
+#define BF_PXP_CSC1_COEF2_C3(v)  \
+       (((v) << 0) & BM_PXP_CSC1_COEF2_C3)
+
+#define HW_PXP_CSC2_CTRL       (0x000001d0)
+
+#define BP_PXP_CSC2_CTRL_RSVD     3
+#define BM_PXP_CSC2_CTRL_RSVD 0xFFFFFFF8
+#define BF_PXP_CSC2_CTRL_RSVD(v) \
+       (((v) << 3) & BM_PXP_CSC2_CTRL_RSVD)
+#define BP_PXP_CSC2_CTRL_CSC_MODE      1
+#define BM_PXP_CSC2_CTRL_CSC_MODE 0x00000006
+#define BF_PXP_CSC2_CTRL_CSC_MODE(v)  \
+       (((v) << 1) & BM_PXP_CSC2_CTRL_CSC_MODE)
+#define BV_PXP_CSC2_CTRL_CSC_MODE__YUV2RGB   0x0
+#define BV_PXP_CSC2_CTRL_CSC_MODE__YCbCr2RGB 0x1
+#define BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YUV   0x2
+#define BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YCbCr 0x3
+#define BM_PXP_CSC2_CTRL_BYPASS 0x00000001
+
+#define HW_PXP_CSC2_COEF0      (0x000001e0)
+
+#define BP_PXP_CSC2_COEF0_RSVD1      27
+#define BM_PXP_CSC2_COEF0_RSVD1 0xF8000000
+#define BF_PXP_CSC2_COEF0_RSVD1(v) \
+       (((v) << 27) & BM_PXP_CSC2_COEF0_RSVD1)
+#define BP_PXP_CSC2_COEF0_A2     16
+#define BM_PXP_CSC2_COEF0_A2 0x07FF0000
+#define BF_PXP_CSC2_COEF0_A2(v)  \
+       (((v) << 16) & BM_PXP_CSC2_COEF0_A2)
+#define BP_PXP_CSC2_COEF0_RSVD0      11
+#define BM_PXP_CSC2_COEF0_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF0_RSVD0(v)  \
+       (((v) << 11) & BM_PXP_CSC2_COEF0_RSVD0)
+#define BP_PXP_CSC2_COEF0_A1     0
+#define BM_PXP_CSC2_COEF0_A1 0x000007FF
+#define BF_PXP_CSC2_COEF0_A1(v)  \
+       (((v) << 0) & BM_PXP_CSC2_COEF0_A1)
+
+#define HW_PXP_CSC2_COEF1      (0x000001f0)
+
+#define BP_PXP_CSC2_COEF1_RSVD1      27
+#define BM_PXP_CSC2_COEF1_RSVD1 0xF8000000
+#define BF_PXP_CSC2_COEF1_RSVD1(v) \
+       (((v) << 27) & BM_PXP_CSC2_COEF1_RSVD1)
+#define BP_PXP_CSC2_COEF1_B1     16
+#define BM_PXP_CSC2_COEF1_B1 0x07FF0000
+#define BF_PXP_CSC2_COEF1_B1(v)  \
+       (((v) << 16) & BM_PXP_CSC2_COEF1_B1)
+#define BP_PXP_CSC2_COEF1_RSVD0      11
+#define BM_PXP_CSC2_COEF1_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF1_RSVD0(v)  \
+       (((v) << 11) & BM_PXP_CSC2_COEF1_RSVD0)
+#define BP_PXP_CSC2_COEF1_A3     0
+#define BM_PXP_CSC2_COEF1_A3 0x000007FF
+#define BF_PXP_CSC2_COEF1_A3(v)  \
+       (((v) << 0) & BM_PXP_CSC2_COEF1_A3)
+
+#define HW_PXP_CSC2_COEF2      (0x00000200)
+
+#define BP_PXP_CSC2_COEF2_RSVD1      27
+#define BM_PXP_CSC2_COEF2_RSVD1 0xF8000000
+#define BF_PXP_CSC2_COEF2_RSVD1(v) \
+       (((v) << 27) & BM_PXP_CSC2_COEF2_RSVD1)
+#define BP_PXP_CSC2_COEF2_B3     16
+#define BM_PXP_CSC2_COEF2_B3 0x07FF0000
+#define BF_PXP_CSC2_COEF2_B3(v)  \
+       (((v) << 16) & BM_PXP_CSC2_COEF2_B3)
+#define BP_PXP_CSC2_COEF2_RSVD0      11
+#define BM_PXP_CSC2_COEF2_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF2_RSVD0(v)  \
+       (((v) << 11) & BM_PXP_CSC2_COEF2_RSVD0)
+#define BP_PXP_CSC2_COEF2_B2     0
+#define BM_PXP_CSC2_COEF2_B2 0x000007FF
+#define BF_PXP_CSC2_COEF2_B2(v)  \
+       (((v) << 0) & BM_PXP_CSC2_COEF2_B2)
+
+#define HW_PXP_CSC2_COEF3      (0x00000210)
+
+#define BP_PXP_CSC2_COEF3_RSVD1      27
+#define BM_PXP_CSC2_COEF3_RSVD1 0xF8000000
+#define BF_PXP_CSC2_COEF3_RSVD1(v) \
+       (((v) << 27) & BM_PXP_CSC2_COEF3_RSVD1)
+#define BP_PXP_CSC2_COEF3_C2     16
+#define BM_PXP_CSC2_COEF3_C2 0x07FF0000
+#define BF_PXP_CSC2_COEF3_C2(v)  \
+       (((v) << 16) & BM_PXP_CSC2_COEF3_C2)
+#define BP_PXP_CSC2_COEF3_RSVD0      11
+#define BM_PXP_CSC2_COEF3_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF3_RSVD0(v)  \
+       (((v) << 11) & BM_PXP_CSC2_COEF3_RSVD0)
+#define BP_PXP_CSC2_COEF3_C1     0
+#define BM_PXP_CSC2_COEF3_C1 0x000007FF
+#define BF_PXP_CSC2_COEF3_C1(v)  \
+       (((v) << 0) & BM_PXP_CSC2_COEF3_C1)
+
+#define HW_PXP_CSC2_COEF4      (0x00000220)
+
+#define BP_PXP_CSC2_COEF4_RSVD1      25
+#define BM_PXP_CSC2_COEF4_RSVD1 0xFE000000
+#define BF_PXP_CSC2_COEF4_RSVD1(v) \
+       (((v) << 25) & BM_PXP_CSC2_COEF4_RSVD1)
+#define BP_PXP_CSC2_COEF4_D1     16
+#define BM_PXP_CSC2_COEF4_D1 0x01FF0000
+#define BF_PXP_CSC2_COEF4_D1(v)  \
+       (((v) << 16) & BM_PXP_CSC2_COEF4_D1)
+#define BP_PXP_CSC2_COEF4_RSVD0      11
+#define BM_PXP_CSC2_COEF4_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF4_RSVD0(v)  \
+       (((v) << 11) & BM_PXP_CSC2_COEF4_RSVD0)
+#define BP_PXP_CSC2_COEF4_C3     0
+#define BM_PXP_CSC2_COEF4_C3 0x000007FF
+#define BF_PXP_CSC2_COEF4_C3(v)  \
+       (((v) << 0) & BM_PXP_CSC2_COEF4_C3)
+
+#define HW_PXP_CSC2_COEF5      (0x00000230)
+
+#define BP_PXP_CSC2_COEF5_RSVD1      25
+#define BM_PXP_CSC2_COEF5_RSVD1 0xFE000000
+#define BF_PXP_CSC2_COEF5_RSVD1(v) \
+       (((v) << 25) & BM_PXP_CSC2_COEF5_RSVD1)
+#define BP_PXP_CSC2_COEF5_D3     16
+#define BM_PXP_CSC2_COEF5_D3 0x01FF0000
+#define BF_PXP_CSC2_COEF5_D3(v)  \
+       (((v) << 16) & BM_PXP_CSC2_COEF5_D3)
+#define BP_PXP_CSC2_COEF5_RSVD0      9
+#define BM_PXP_CSC2_COEF5_RSVD0 0x0000FE00
+#define BF_PXP_CSC2_COEF5_RSVD0(v)  \
+       (((v) << 9) & BM_PXP_CSC2_COEF5_RSVD0)
+#define BP_PXP_CSC2_COEF5_D2     0
+#define BM_PXP_CSC2_COEF5_D2 0x000001FF
+#define BF_PXP_CSC2_COEF5_D2(v)  \
+       (((v) << 0) & BM_PXP_CSC2_COEF5_D2)
+
+#define HW_PXP_LUT_CTRL        (0x00000240)
+
+#define BM_PXP_LUT_CTRL_BYPASS 0x80000000
+#define BP_PXP_LUT_CTRL_RSVD3     26
+#define BM_PXP_LUT_CTRL_RSVD3 0x7C000000
+#define BF_PXP_LUT_CTRL_RSVD3(v)  \
+       (((v) << 26) & BM_PXP_LUT_CTRL_RSVD3)
+#define BP_PXP_LUT_CTRL_LOOKUP_MODE     24
+#define BM_PXP_LUT_CTRL_LOOKUP_MODE 0x03000000
+#define BF_PXP_LUT_CTRL_LOOKUP_MODE(v) \
+       (((v) << 24) & BM_PXP_LUT_CTRL_LOOKUP_MODE)
+#define BV_PXP_LUT_CTRL_LOOKUP_MODE__CACHE_RGB565  0x0
+#define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8    0x1
+#define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_RGB444 0x2
+#define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_RGB454 0x3
+#define BP_PXP_LUT_CTRL_RSVD2     18
+#define BM_PXP_LUT_CTRL_RSVD2 0x00FC0000
+#define BF_PXP_LUT_CTRL_RSVD2(v)  \
+       (((v) << 18) & BM_PXP_LUT_CTRL_RSVD2)
+#define BP_PXP_LUT_CTRL_OUT_MODE      16
+#define BM_PXP_LUT_CTRL_OUT_MODE 0x00030000
+#define BF_PXP_LUT_CTRL_OUT_MODE(v)  \
+       (((v) << 16) & BM_PXP_LUT_CTRL_OUT_MODE)
+#define BV_PXP_LUT_CTRL_OUT_MODE__RESERVED    0x0
+#define BV_PXP_LUT_CTRL_OUT_MODE__Y8         0x1
+#define BV_PXP_LUT_CTRL_OUT_MODE__RGBW4444CFA 0x2
+#define BV_PXP_LUT_CTRL_OUT_MODE__RGB888      0x3
+#define BP_PXP_LUT_CTRL_RSVD1     11
+#define BM_PXP_LUT_CTRL_RSVD1 0x0000F800
+#define BF_PXP_LUT_CTRL_RSVD1(v)  \
+       (((v) << 11) & BM_PXP_LUT_CTRL_RSVD1)
+#define BM_PXP_LUT_CTRL_SEL_8KB 0x00000400
+#define BM_PXP_LUT_CTRL_LRU_UPD 0x00000200
+#define BM_PXP_LUT_CTRL_INVALID 0x00000100
+#define BP_PXP_LUT_CTRL_RSVD0     1
+#define BM_PXP_LUT_CTRL_RSVD0 0x000000FE
+#define BF_PXP_LUT_CTRL_RSVD0(v)  \
+       (((v) << 1) & BM_PXP_LUT_CTRL_RSVD0)
+#define BM_PXP_LUT_CTRL_DMA_START 0x00000001
+
+#define HW_PXP_LUT_ADDR        (0x00000250)
+
+#define BM_PXP_LUT_ADDR_RSVD2 0x80000000
+#define BP_PXP_LUT_ADDR_NUM_BYTES      16
+#define BM_PXP_LUT_ADDR_NUM_BYTES 0x7FFF0000
+#define BF_PXP_LUT_ADDR_NUM_BYTES(v)  \
+       (((v) << 16) & BM_PXP_LUT_ADDR_NUM_BYTES)
+#define BP_PXP_LUT_ADDR_RSVD1     14
+#define BM_PXP_LUT_ADDR_RSVD1 0x0000C000
+#define BF_PXP_LUT_ADDR_RSVD1(v)  \
+       (((v) << 14) & BM_PXP_LUT_ADDR_RSVD1)
+#define BP_PXP_LUT_ADDR_ADDR     0
+#define BM_PXP_LUT_ADDR_ADDR 0x00003FFF
+#define BF_PXP_LUT_ADDR_ADDR(v)  \
+       (((v) << 0) & BM_PXP_LUT_ADDR_ADDR)
+
+#define HW_PXP_LUT_DATA        (0x00000260)
+
+#define BP_PXP_LUT_DATA_DATA     0
+#define BM_PXP_LUT_DATA_DATA 0xFFFFFFFF
+#define BF_PXP_LUT_DATA_DATA(v)   (v)
+
+#define HW_PXP_LUT_EXTMEM      (0x00000270)
+
+#define BP_PXP_LUT_EXTMEM_ADDR     0
+#define BM_PXP_LUT_EXTMEM_ADDR 0xFFFFFFFF
+#define BF_PXP_LUT_EXTMEM_ADDR(v)   (v)
+
+#define HW_PXP_CFA     (0x00000280)
+
+#define BP_PXP_CFA_DATA      0
+#define BM_PXP_CFA_DATA 0xFFFFFFFF
+#define BF_PXP_CFA_DATA(v)   (v)
+
+#define HW_PXP_HIST_CTRL       (0x00000290)
+
+#define BP_PXP_HIST_CTRL_RSVD     6
+#define BM_PXP_HIST_CTRL_RSVD 0xFFFFFFC0
+#define BF_PXP_HIST_CTRL_RSVD(v) \
+       (((v) << 6) & BM_PXP_HIST_CTRL_RSVD)
+#define BP_PXP_HIST_CTRL_PANEL_MODE     4
+#define BM_PXP_HIST_CTRL_PANEL_MODE 0x00000030
+#define BF_PXP_HIST_CTRL_PANEL_MODE(v) \
+       (((v) << 4) & BM_PXP_HIST_CTRL_PANEL_MODE)
+#define BV_PXP_HIST_CTRL_PANEL_MODE__GRAY4  0x0
+#define BV_PXP_HIST_CTRL_PANEL_MODE__GRAY8  0x1
+#define BV_PXP_HIST_CTRL_PANEL_MODE__GRAY16 0x2
+#define BV_PXP_HIST_CTRL_PANEL_MODE__GRAY32 0x3
+#define BP_PXP_HIST_CTRL_STATUS      0
+#define BM_PXP_HIST_CTRL_STATUS 0x0000000F
+#define BF_PXP_HIST_CTRL_STATUS(v)  \
+       (((v) << 0) & BM_PXP_HIST_CTRL_STATUS)
+
+#define HW_PXP_HIST2_PARAM     (0x000002a0)
+
+#define BP_PXP_HIST2_PARAM_RSVD      16
+#define BM_PXP_HIST2_PARAM_RSVD 0xFFFF0000
+#define BF_PXP_HIST2_PARAM_RSVD(v) \
+       (((v) << 16) & BM_PXP_HIST2_PARAM_RSVD)
+#define BP_PXP_HIST2_PARAM_RSVD1      13
+#define BM_PXP_HIST2_PARAM_RSVD1 0x0000E000
+#define BF_PXP_HIST2_PARAM_RSVD1(v)  \
+       (((v) << 13) & BM_PXP_HIST2_PARAM_RSVD1)
+#define BP_PXP_HIST2_PARAM_VALUE1      8
+#define BM_PXP_HIST2_PARAM_VALUE1 0x00001F00
+#define BF_PXP_HIST2_PARAM_VALUE1(v)  \
+       (((v) << 8) & BM_PXP_HIST2_PARAM_VALUE1)
+#define BP_PXP_HIST2_PARAM_RSVD0      5
+#define BM_PXP_HIST2_PARAM_RSVD0 0x000000E0
+#define BF_PXP_HIST2_PARAM_RSVD0(v)  \
+       (((v) << 5) & BM_PXP_HIST2_PARAM_RSVD0)
+#define BP_PXP_HIST2_PARAM_VALUE0      0
+#define BM_PXP_HIST2_PARAM_VALUE0 0x0000001F
+#define BF_PXP_HIST2_PARAM_VALUE0(v)  \
+       (((v) << 0) & BM_PXP_HIST2_PARAM_VALUE0)
+
+#define HW_PXP_HIST4_PARAM     (0x000002b0)
+
+#define BP_PXP_HIST4_PARAM_RSVD3      29
+#define BM_PXP_HIST4_PARAM_RSVD3 0xE0000000
+#define BF_PXP_HIST4_PARAM_RSVD3(v) \
+       (((v) << 29) & BM_PXP_HIST4_PARAM_RSVD3)
+#define BP_PXP_HIST4_PARAM_VALUE3      24
+#define BM_PXP_HIST4_PARAM_VALUE3 0x1F000000
+#define BF_PXP_HIST4_PARAM_VALUE3(v)  \
+       (((v) << 24) & BM_PXP_HIST4_PARAM_VALUE3)
+#define BP_PXP_HIST4_PARAM_RSVD2      21
+#define BM_PXP_HIST4_PARAM_RSVD2 0x00E00000
+#define BF_PXP_HIST4_PARAM_RSVD2(v)  \
+       (((v) << 21) & BM_PXP_HIST4_PARAM_RSVD2)
+#define BP_PXP_HIST4_PARAM_VALUE2      16
+#define BM_PXP_HIST4_PARAM_VALUE2 0x001F0000
+#define BF_PXP_HIST4_PARAM_VALUE2(v)  \
+       (((v) << 16) & BM_PXP_HIST4_PARAM_VALUE2)
+#define BP_PXP_HIST4_PARAM_RSVD1      13
+#define BM_PXP_HIST4_PARAM_RSVD1 0x0000E000
+#define BF_PXP_HIST4_PARAM_RSVD1(v)  \
+       (((v) << 13) & BM_PXP_HIST4_PARAM_RSVD1)
+#define BP_PXP_HIST4_PARAM_VALUE1      8
+#define BM_PXP_HIST4_PARAM_VALUE1 0x00001F00
+#define BF_PXP_HIST4_PARAM_VALUE1(v)  \
+       (((v) << 8) & BM_PXP_HIST4_PARAM_VALUE1)
+#define BP_PXP_HIST4_PARAM_RSVD0      5
+#define BM_PXP_HIST4_PARAM_RSVD0 0x000000E0
+#define BF_PXP_HIST4_PARAM_RSVD0(v)  \
+       (((v) << 5) & BM_PXP_HIST4_PARAM_RSVD0)
+#define BP_PXP_HIST4_PARAM_VALUE0      0
+#define BM_PXP_HIST4_PARAM_VALUE0 0x0000001F
+#define BF_PXP_HIST4_PARAM_VALUE0(v)  \
+       (((v) << 0) & BM_PXP_HIST4_PARAM_VALUE0)
+
+#define HW_PXP_HIST8_PARAM0    (0x000002c0)
+
+#define BP_PXP_HIST8_PARAM0_RSVD3      29
+#define BM_PXP_HIST8_PARAM0_RSVD3 0xE0000000
+#define BF_PXP_HIST8_PARAM0_RSVD3(v) \
+       (((v) << 29) & BM_PXP_HIST8_PARAM0_RSVD3)
+#define BP_PXP_HIST8_PARAM0_VALUE3     24
+#define BM_PXP_HIST8_PARAM0_VALUE3 0x1F000000
+#define BF_PXP_HIST8_PARAM0_VALUE3(v)  \
+       (((v) << 24) & BM_PXP_HIST8_PARAM0_VALUE3)
+#define BP_PXP_HIST8_PARAM0_RSVD2      21
+#define BM_PXP_HIST8_PARAM0_RSVD2 0x00E00000
+#define BF_PXP_HIST8_PARAM0_RSVD2(v)  \
+       (((v) << 21) & BM_PXP_HIST8_PARAM0_RSVD2)
+#define BP_PXP_HIST8_PARAM0_VALUE2     16
+#define BM_PXP_HIST8_PARAM0_VALUE2 0x001F0000
+#define BF_PXP_HIST8_PARAM0_VALUE2(v)  \
+       (((v) << 16) & BM_PXP_HIST8_PARAM0_VALUE2)
+#define BP_PXP_HIST8_PARAM0_RSVD1      13
+#define BM_PXP_HIST8_PARAM0_RSVD1 0x0000E000
+#define BF_PXP_HIST8_PARAM0_RSVD1(v)  \
+       (((v) << 13) & BM_PXP_HIST8_PARAM0_RSVD1)
+#define BP_PXP_HIST8_PARAM0_VALUE1     8
+#define BM_PXP_HIST8_PARAM0_VALUE1 0x00001F00
+#define BF_PXP_HIST8_PARAM0_VALUE1(v)  \
+       (((v) << 8) & BM_PXP_HIST8_PARAM0_VALUE1)
+#define BP_PXP_HIST8_PARAM0_RSVD0      5
+#define BM_PXP_HIST8_PARAM0_RSVD0 0x000000E0
+#define BF_PXP_HIST8_PARAM0_RSVD0(v)  \
+       (((v) << 5) & BM_PXP_HIST8_PARAM0_RSVD0)
+#define BP_PXP_HIST8_PARAM0_VALUE0     0
+#define BM_PXP_HIST8_PARAM0_VALUE0 0x0000001F
+#define BF_PXP_HIST8_PARAM0_VALUE0(v)  \
+       (((v) << 0) & BM_PXP_HIST8_PARAM0_VALUE0)
+
+#define HW_PXP_HIST8_PARAM1    (0x000002d0)
+
+#define BP_PXP_HIST8_PARAM1_RSVD7      29
+#define BM_PXP_HIST8_PARAM1_RSVD7 0xE0000000
+#define BF_PXP_HIST8_PARAM1_RSVD7(v) \
+       (((v) << 29) & BM_PXP_HIST8_PARAM1_RSVD7)
+#define BP_PXP_HIST8_PARAM1_VALUE7     24
+#define BM_PXP_HIST8_PARAM1_VALUE7 0x1F000000
+#define BF_PXP_HIST8_PARAM1_VALUE7(v)  \
+       (((v) << 24) & BM_PXP_HIST8_PARAM1_VALUE7)
+#define BP_PXP_HIST8_PARAM1_RSVD6      21
+#define BM_PXP_HIST8_PARAM1_RSVD6 0x00E00000
+#define BF_PXP_HIST8_PARAM1_RSVD6(v)  \
+       (((v) << 21) & BM_PXP_HIST8_PARAM1_RSVD6)
+#define BP_PXP_HIST8_PARAM1_VALUE6     16
+#define BM_PXP_HIST8_PARAM1_VALUE6 0x001F0000
+#define BF_PXP_HIST8_PARAM1_VALUE6(v)  \
+       (((v) << 16) & BM_PXP_HIST8_PARAM1_VALUE6)
+#define BP_PXP_HIST8_PARAM1_RSVD5      13
+#define BM_PXP_HIST8_PARAM1_RSVD5 0x0000E000
+#define BF_PXP_HIST8_PARAM1_RSVD5(v)  \
+       (((v) << 13) & BM_PXP_HIST8_PARAM1_RSVD5)
+#define BP_PXP_HIST8_PARAM1_VALUE5     8
+#define BM_PXP_HIST8_PARAM1_VALUE5 0x00001F00
+#define BF_PXP_HIST8_PARAM1_VALUE5(v)  \
+       (((v) << 8) & BM_PXP_HIST8_PARAM1_VALUE5)
+#define BP_PXP_HIST8_PARAM1_RSVD4      5
+#define BM_PXP_HIST8_PARAM1_RSVD4 0x000000E0
+#define BF_PXP_HIST8_PARAM1_RSVD4(v)  \
+       (((v) << 5) & BM_PXP_HIST8_PARAM1_RSVD4)
+#define BP_PXP_HIST8_PARAM1_VALUE4     0
+#define BM_PXP_HIST8_PARAM1_VALUE4 0x0000001F
+#define BF_PXP_HIST8_PARAM1_VALUE4(v)  \
+       (((v) << 0) & BM_PXP_HIST8_PARAM1_VALUE4)
+
+#define HW_PXP_HIST16_PARAM0   (0x000002e0)
+
+#define BP_PXP_HIST16_PARAM0_RSVD3     29
+#define BM_PXP_HIST16_PARAM0_RSVD3 0xE0000000
+#define BF_PXP_HIST16_PARAM0_RSVD3(v) \
+       (((v) << 29) & BM_PXP_HIST16_PARAM0_RSVD3)
+#define BP_PXP_HIST16_PARAM0_VALUE3     24
+#define BM_PXP_HIST16_PARAM0_VALUE3 0x1F000000
+#define BF_PXP_HIST16_PARAM0_VALUE3(v) \
+       (((v) << 24) & BM_PXP_HIST16_PARAM0_VALUE3)
+#define BP_PXP_HIST16_PARAM0_RSVD2     21
+#define BM_PXP_HIST16_PARAM0_RSVD2 0x00E00000
+#define BF_PXP_HIST16_PARAM0_RSVD2(v)  \
+       (((v) << 21) & BM_PXP_HIST16_PARAM0_RSVD2)
+#define BP_PXP_HIST16_PARAM0_VALUE2     16
+#define BM_PXP_HIST16_PARAM0_VALUE2 0x001F0000
+#define BF_PXP_HIST16_PARAM0_VALUE2(v) \
+       (((v) << 16) & BM_PXP_HIST16_PARAM0_VALUE2)
+#define BP_PXP_HIST16_PARAM0_RSVD1     13
+#define BM_PXP_HIST16_PARAM0_RSVD1 0x0000E000
+#define BF_PXP_HIST16_PARAM0_RSVD1(v)  \
+       (((v) << 13) & BM_PXP_HIST16_PARAM0_RSVD1)
+#define BP_PXP_HIST16_PARAM0_VALUE1     8
+#define BM_PXP_HIST16_PARAM0_VALUE1 0x00001F00
+#define BF_PXP_HIST16_PARAM0_VALUE1(v) \
+       (((v) << 8) & BM_PXP_HIST16_PARAM0_VALUE1)
+#define BP_PXP_HIST16_PARAM0_RSVD0     5
+#define BM_PXP_HIST16_PARAM0_RSVD0 0x000000E0
+#define BF_PXP_HIST16_PARAM0_RSVD0(v)  \
+       (((v) << 5) & BM_PXP_HIST16_PARAM0_RSVD0)
+#define BP_PXP_HIST16_PARAM0_VALUE0     0
+#define BM_PXP_HIST16_PARAM0_VALUE0 0x0000001F
+#define BF_PXP_HIST16_PARAM0_VALUE0(v) \
+       (((v) << 0) & BM_PXP_HIST16_PARAM0_VALUE0)
+
+#define HW_PXP_HIST16_PARAM1   (0x000002f0)
+
+#define BP_PXP_HIST16_PARAM1_RSVD7     29
+#define BM_PXP_HIST16_PARAM1_RSVD7 0xE0000000
+#define BF_PXP_HIST16_PARAM1_RSVD7(v) \
+       (((v) << 29) & BM_PXP_HIST16_PARAM1_RSVD7)
+#define BP_PXP_HIST16_PARAM1_VALUE7     24
+#define BM_PXP_HIST16_PARAM1_VALUE7 0x1F000000
+#define BF_PXP_HIST16_PARAM1_VALUE7(v) \
+       (((v) << 24) & BM_PXP_HIST16_PARAM1_VALUE7)
+#define BP_PXP_HIST16_PARAM1_RSVD6     21
+#define BM_PXP_HIST16_PARAM1_RSVD6 0x00E00000
+#define BF_PXP_HIST16_PARAM1_RSVD6(v)  \
+       (((v) << 21) & BM_PXP_HIST16_PARAM1_RSVD6)
+#define BP_PXP_HIST16_PARAM1_VALUE6     16
+#define BM_PXP_HIST16_PARAM1_VALUE6 0x001F0000
+#define BF_PXP_HIST16_PARAM1_VALUE6(v) \
+       (((v) << 16) & BM_PXP_HIST16_PARAM1_VALUE6)
+#define BP_PXP_HIST16_PARAM1_RSVD5     13
+#define BM_PXP_HIST16_PARAM1_RSVD5 0x0000E000
+#define BF_PXP_HIST16_PARAM1_RSVD5(v)  \
+       (((v) << 13) & BM_PXP_HIST16_PARAM1_RSVD5)
+#define BP_PXP_HIST16_PARAM1_VALUE5     8
+#define BM_PXP_HIST16_PARAM1_VALUE5 0x00001F00
+#define BF_PXP_HIST16_PARAM1_VALUE5(v) \
+       (((v) << 8) & BM_PXP_HIST16_PARAM1_VALUE5)
+#define BP_PXP_HIST16_PARAM1_RSVD4     5
+#define BM_PXP_HIST16_PARAM1_RSVD4 0x000000E0
+#define BF_PXP_HIST16_PARAM1_RSVD4(v)  \
+       (((v) << 5) & BM_PXP_HIST16_PARAM1_RSVD4)
+#define BP_PXP_HIST16_PARAM1_VALUE4     0
+#define BM_PXP_HIST16_PARAM1_VALUE4 0x0000001F
+#define BF_PXP_HIST16_PARAM1_VALUE4(v) \
+       (((v) << 0) & BM_PXP_HIST16_PARAM1_VALUE4)
+
+#define HW_PXP_HIST16_PARAM2   (0x00000300)
+
+#define BP_PXP_HIST16_PARAM2_RSVD11     29
+#define BM_PXP_HIST16_PARAM2_RSVD11 0xE0000000
+#define BF_PXP_HIST16_PARAM2_RSVD11(v) \
+       (((v) << 29) & BM_PXP_HIST16_PARAM2_RSVD11)
+#define BP_PXP_HIST16_PARAM2_VALUE11     24
+#define BM_PXP_HIST16_PARAM2_VALUE11 0x1F000000
+#define BF_PXP_HIST16_PARAM2_VALUE11(v)  \
+       (((v) << 24) & BM_PXP_HIST16_PARAM2_VALUE11)
+#define BP_PXP_HIST16_PARAM2_RSVD10     21
+#define BM_PXP_HIST16_PARAM2_RSVD10 0x00E00000
+#define BF_PXP_HIST16_PARAM2_RSVD10(v) \
+       (((v) << 21) & BM_PXP_HIST16_PARAM2_RSVD10)
+#define BP_PXP_HIST16_PARAM2_VALUE10     16
+#define BM_PXP_HIST16_PARAM2_VALUE10 0x001F0000
+#define BF_PXP_HIST16_PARAM2_VALUE10(v)  \
+       (((v) << 16) & BM_PXP_HIST16_PARAM2_VALUE10)
+#define BP_PXP_HIST16_PARAM2_RSVD9     13
+#define BM_PXP_HIST16_PARAM2_RSVD9 0x0000E000
+#define BF_PXP_HIST16_PARAM2_RSVD9(v)  \
+       (((v) << 13) & BM_PXP_HIST16_PARAM2_RSVD9)
+#define BP_PXP_HIST16_PARAM2_VALUE9     8
+#define BM_PXP_HIST16_PARAM2_VALUE9 0x00001F00
+#define BF_PXP_HIST16_PARAM2_VALUE9(v) \
+       (((v) << 8) & BM_PXP_HIST16_PARAM2_VALUE9)
+#define BP_PXP_HIST16_PARAM2_RSVD8     5
+#define BM_PXP_HIST16_PARAM2_RSVD8 0x000000E0
+#define BF_PXP_HIST16_PARAM2_RSVD8(v)  \
+       (((v) << 5) & BM_PXP_HIST16_PARAM2_RSVD8)
+#define BP_PXP_HIST16_PARAM2_VALUE8     0
+#define BM_PXP_HIST16_PARAM2_VALUE8 0x0000001F
+#define BF_PXP_HIST16_PARAM2_VALUE8(v) \
+       (((v) << 0) & BM_PXP_HIST16_PARAM2_VALUE8)
+
+#define HW_PXP_HIST16_PARAM3   (0x00000310)
+
+#define BP_PXP_HIST16_PARAM3_RSVD15     29
+#define BM_PXP_HIST16_PARAM3_RSVD15 0xE0000000
+#define BF_PXP_HIST16_PARAM3_RSVD15(v) \
+       (((v) << 29) & BM_PXP_HIST16_PARAM3_RSVD15)
+#define BP_PXP_HIST16_PARAM3_VALUE15     24
+#define BM_PXP_HIST16_PARAM3_VALUE15 0x1F000000
+#define BF_PXP_HIST16_PARAM3_VALUE15(v)  \
+       (((v) << 24) & BM_PXP_HIST16_PARAM3_VALUE15)
+#define BP_PXP_HIST16_PARAM3_RSVD14     21
+#define BM_PXP_HIST16_PARAM3_RSVD14 0x00E00000
+#define BF_PXP_HIST16_PARAM3_RSVD14(v) \
+       (((v) << 21) & BM_PXP_HIST16_PARAM3_RSVD14)
+#define BP_PXP_HIST16_PARAM3_VALUE14     16
+#define BM_PXP_HIST16_PARAM3_VALUE14 0x001F0000
+#define BF_PXP_HIST16_PARAM3_VALUE14(v)  \
+       (((v) << 16) & BM_PXP_HIST16_PARAM3_VALUE14)
+#define BP_PXP_HIST16_PARAM3_RSVD13     13
+#define BM_PXP_HIST16_PARAM3_RSVD13 0x0000E000
+#define BF_PXP_HIST16_PARAM3_RSVD13(v) \
+       (((v) << 13) & BM_PXP_HIST16_PARAM3_RSVD13)
+#define BP_PXP_HIST16_PARAM3_VALUE13     8
+#define BM_PXP_HIST16_PARAM3_VALUE13 0x00001F00
+#define BF_PXP_HIST16_PARAM3_VALUE13(v)  \
+       (((v) << 8) & BM_PXP_HIST16_PARAM3_VALUE13)
+#define BP_PXP_HIST16_PARAM3_RSVD12     5
+#define BM_PXP_HIST16_PARAM3_RSVD12 0x000000E0
+#define BF_PXP_HIST16_PARAM3_RSVD12(v) \
+       (((v) << 5) & BM_PXP_HIST16_PARAM3_RSVD12)
+#define BP_PXP_HIST16_PARAM3_VALUE12     0
+#define BM_PXP_HIST16_PARAM3_VALUE12 0x0000001F
+#define BF_PXP_HIST16_PARAM3_VALUE12(v)  \
+       (((v) << 0) & BM_PXP_HIST16_PARAM3_VALUE12)
+
+#define HW_PXP_POWER   (0x00000320)
+
+#define BP_PXP_POWER_CTRL      12
+#define BM_PXP_POWER_CTRL 0xFFFFF000
+#define BF_PXP_POWER_CTRL(v) \
+       (((v) << 12) & BM_PXP_POWER_CTRL)
+#define BP_PXP_POWER_ROT_MEM_LP_STATE     9
+#define BM_PXP_POWER_ROT_MEM_LP_STATE 0x00000E00
+#define BF_PXP_POWER_ROT_MEM_LP_STATE(v)  \
+       (((v) << 9) & BM_PXP_POWER_ROT_MEM_LP_STATE)
+#define BV_PXP_POWER_ROT_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_ROT_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_ROT_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_ROT_MEM_LP_STATE__SD   0x4
+#define BP_PXP_POWER_LUT_LP_STATE_WAY1_BANKN     6
+#define BM_PXP_POWER_LUT_LP_STATE_WAY1_BANKN 0x000001C0
+#define BF_PXP_POWER_LUT_LP_STATE_WAY1_BANKN(v)  \
+       (((v) << 6) & BM_PXP_POWER_LUT_LP_STATE_WAY1_BANKN)
+#define BV_PXP_POWER_LUT_LP_STATE_WAY1_BANKN__NONE 0x0
+#define BV_PXP_POWER_LUT_LP_STATE_WAY1_BANKN__LS   0x1
+#define BV_PXP_POWER_LUT_LP_STATE_WAY1_BANKN__DS   0x2
+#define BV_PXP_POWER_LUT_LP_STATE_WAY1_BANKN__SD   0x4
+#define BP_PXP_POWER_LUT_LP_STATE_WAY0_BANKN     3
+#define BM_PXP_POWER_LUT_LP_STATE_WAY0_BANKN 0x00000038
+#define BF_PXP_POWER_LUT_LP_STATE_WAY0_BANKN(v)  \
+       (((v) << 3) & BM_PXP_POWER_LUT_LP_STATE_WAY0_BANKN)
+#define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANKN__NONE 0x0
+#define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANKN__LS   0x1
+#define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANKN__DS   0x2
+#define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANKN__SD   0x4
+#define BP_PXP_POWER_LUT_LP_STATE_WAY0_BANK0     0
+#define BM_PXP_POWER_LUT_LP_STATE_WAY0_BANK0 0x00000007
+#define BF_PXP_POWER_LUT_LP_STATE_WAY0_BANK0(v)  \
+       (((v) << 0) & BM_PXP_POWER_LUT_LP_STATE_WAY0_BANK0)
+#define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANK0__NONE 0x0
+#define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANK0__LS   0x1
+#define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANK0__DS   0x2
+#define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANK0__SD   0x4
+
+#define HW_PXP_NEXT    (0x00000400)
+
+#define BP_PXP_NEXT_POINTER     2
+#define BM_PXP_NEXT_POINTER 0xFFFFFFFC
+#define BF_PXP_NEXT_POINTER(v) \
+       (((v) << 2) & BM_PXP_NEXT_POINTER)
+#define BM_PXP_NEXT_RSVD 0x00000002
+#define BM_PXP_NEXT_ENABLED 0x00000001
+
+#define HW_PXP_DEBUGCTRL       (0x00000410)
+
+#define BP_PXP_DEBUGCTRL_RSVD     12
+#define BM_PXP_DEBUGCTRL_RSVD 0xFFFFF000
+#define BF_PXP_DEBUGCTRL_RSVD(v) \
+       (((v) << 12) & BM_PXP_DEBUGCTRL_RSVD)
+#define BP_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT      8
+#define BM_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT 0x00000F00
+#define BF_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT(v)  \
+       (((v) << 8) & BM_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT)
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__NONE     0x0
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__MISS_CNT 0x1
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__HIT_CNT  0x2
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__LAT_CNT  0x4
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__MAX_LAT  0x8
+#define BP_PXP_DEBUGCTRL_SELECT      0
+#define BM_PXP_DEBUGCTRL_SELECT 0x000000FF
+#define BF_PXP_DEBUGCTRL_SELECT(v)  \
+       (((v) << 0) & BM_PXP_DEBUGCTRL_SELECT)
+#define BV_PXP_DEBUGCTRL_SELECT__NONE       0x0
+#define BV_PXP_DEBUGCTRL_SELECT__CTRL       0x1
+#define BV_PXP_DEBUGCTRL_SELECT__PSBUF      0x2
+#define BV_PXP_DEBUGCTRL_SELECT__PSBAX      0x3
+#define BV_PXP_DEBUGCTRL_SELECT__PSBAY      0x4
+#define BV_PXP_DEBUGCTRL_SELECT__ASBUF      0x5
+#define BV_PXP_DEBUGCTRL_SELECT__ROTATION    0x6
+#define BV_PXP_DEBUGCTRL_SELECT__OUTBUF0     0x7
+#define BV_PXP_DEBUGCTRL_SELECT__OUTBUF1     0x8
+#define BV_PXP_DEBUGCTRL_SELECT__OUTBUF2     0x9
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_STAT    0x10
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_MISS    0x11
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_HIT     0x12
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_LAT     0x13
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_MAX_LAT 0x14
+
+#define HW_PXP_DEBUG   (0x00000420)
+
+#define BP_PXP_DEBUG_DATA      0
+#define BM_PXP_DEBUG_DATA 0xFFFFFFFF
+#define BF_PXP_DEBUG_DATA(v)   (v)
+
+#define HW_PXP_VERSION (0x00000430)
+
+#define BP_PXP_VERSION_MAJOR     24
+#define BM_PXP_VERSION_MAJOR 0xFF000000
+#define BF_PXP_VERSION_MAJOR(v) \
+       (((v) << 24) & BM_PXP_VERSION_MAJOR)
+#define BP_PXP_VERSION_MINOR     16
+#define BM_PXP_VERSION_MINOR 0x00FF0000
+#define BF_PXP_VERSION_MINOR(v)  \
+       (((v) << 16) & BM_PXP_VERSION_MINOR)
+#define BP_PXP_VERSION_STEP     0
+#define BM_PXP_VERSION_STEP 0x0000FFFF
+#define BF_PXP_VERSION_STEP(v) \
+       (((v) << 0) & BM_PXP_VERSION_STEP)
+#endif /* __ARCH_ARM___PXP_H */

diff --git a/drivers/dma/pxp/regs-pxp_v3.h b/drivers/dma/pxp/regs-pxp_v3.h
new file mode 100644 (file)
index 0000000..f090a13
--- /dev/null
+++ b/drivers/dma/pxp/regs-pxp_v3.h
@@ -0,0 +1,26947 @@
+/*
+ * Freescale PXP Register Definitions
+ *
+ * Copyright 2014-2015 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ * This file is created by xml file. Don't Edit it.
+ *
+ * Xml Revision: 1.77
+ * Template revision: 1.3
+ */
+
+#ifndef __ARCH_ARM___PXP_H
+#define __ARCH_ARM___PXP_H
+
+
+#define HW_PXP_CTRL    (0x00000000)
+#define HW_PXP_CTRL_SET        (0x00000004)
+#define HW_PXP_CTRL_CLR        (0x00000008)
+#define HW_PXP_CTRL_TOG        (0x0000000c)
+
+#define BM_PXP_CTRL_SFTRST 0x80000000
+#define BF_PXP_CTRL_SFTRST(v) \
+        (((v) << 31) & BM_PXP_CTRL_SFTRST)
+#define BM_PXP_CTRL_CLKGATE 0x40000000
+#define BF_PXP_CTRL_CLKGATE(v)  \
+        (((v) << 30) & BM_PXP_CTRL_CLKGATE)
+#define BM_PXP_CTRL_RSVD4 0x20000000
+#define BF_PXP_CTRL_RSVD4(v)  \
+        (((v) << 29) & BM_PXP_CTRL_RSVD4)
+#define BM_PXP_CTRL_EN_REPEAT 0x10000000
+#define BF_PXP_CTRL_EN_REPEAT(v)  \
+        (((v) << 28) & BM_PXP_CTRL_EN_REPEAT)
+#define BM_PXP_CTRL_ENABLE_ROTATE1 0x08000000
+#define BF_PXP_CTRL_ENABLE_ROTATE1(v)  \
+        (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1)
+#define BM_PXP_CTRL_ENABLE_ROTATE0 0x04000000
+#define BF_PXP_CTRL_ENABLE_ROTATE0(v)  \
+        (((v) << 26) & BM_PXP_CTRL_ENABLE_ROTATE0)
+#define BM_PXP_CTRL_ENABLE_LUT 0x02000000
+#define BF_PXP_CTRL_ENABLE_LUT(v)  \
+        (((v) << 25) & BM_PXP_CTRL_ENABLE_LUT)
+#define BM_PXP_CTRL_ENABLE_CSC2 0x01000000
+#define BF_PXP_CTRL_ENABLE_CSC2(v)  \
+        (((v) << 24) & BM_PXP_CTRL_ENABLE_CSC2)
+#define BM_PXP_CTRL_BLOCK_SIZE 0x00800000
+#define BF_PXP_CTRL_BLOCK_SIZE(v)  \
+        (((v) << 23) & BM_PXP_CTRL_BLOCK_SIZE)
+#define BV_PXP_CTRL_BLOCK_SIZE__8X8   0x0
+#define BV_PXP_CTRL_BLOCK_SIZE__16X16 0x1
+#define BM_PXP_CTRL_RSVD1 0x00400000
+#define BF_PXP_CTRL_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_CTRL_RSVD1)
+#define BM_PXP_CTRL_ENABLE_ALPHA_B 0x00200000
+#define BF_PXP_CTRL_ENABLE_ALPHA_B(v)  \
+        (((v) << 21) & BM_PXP_CTRL_ENABLE_ALPHA_B)
+#define BM_PXP_CTRL_ENABLE_INPUT_FETCH_STORE 0x00100000
+#define BF_PXP_CTRL_ENABLE_INPUT_FETCH_STORE(v)  \
+        (((v) << 20) & BM_PXP_CTRL_ENABLE_INPUT_FETCH_STORE)
+#define BM_PXP_CTRL_ENABLE_WFE_B 0x00080000
+#define BF_PXP_CTRL_ENABLE_WFE_B(v)  \
+        (((v) << 19) & BM_PXP_CTRL_ENABLE_WFE_B)
+#define BM_PXP_CTRL_ENABLE_WFE_A 0x00040000
+#define BF_PXP_CTRL_ENABLE_WFE_A(v)  \
+        (((v) << 18) & BM_PXP_CTRL_ENABLE_WFE_A)
+#define BM_PXP_CTRL_ENABLE_DITHER 0x00020000
+#define BF_PXP_CTRL_ENABLE_DITHER(v)  \
+        (((v) << 17) & BM_PXP_CTRL_ENABLE_DITHER)
+#define BM_PXP_CTRL_ENABLE_PS_AS_OUT 0x00010000
+#define BF_PXP_CTRL_ENABLE_PS_AS_OUT(v)  \
+        (((v) << 16) & BM_PXP_CTRL_ENABLE_PS_AS_OUT)
+#define BM_PXP_CTRL_VFLIP1 0x00008000
+#define BF_PXP_CTRL_VFLIP1(v)  \
+        (((v) << 15) & BM_PXP_CTRL_VFLIP1)
+#define BM_PXP_CTRL_HFLIP1 0x00004000
+#define BF_PXP_CTRL_HFLIP1(v)  \
+        (((v) << 14) & BM_PXP_CTRL_HFLIP1)
+#define BP_PXP_CTRL_ROTATE1      12
+#define BM_PXP_CTRL_ROTATE1 0x00003000
+#define BF_PXP_CTRL_ROTATE1(v)  \
+        (((v) << 12) & BM_PXP_CTRL_ROTATE1)
+#define BV_PXP_CTRL_ROTATE1__ROT_0   0x0
+#define BV_PXP_CTRL_ROTATE1__ROT_90  0x1
+#define BV_PXP_CTRL_ROTATE1__ROT_180 0x2
+#define BV_PXP_CTRL_ROTATE1__ROT_270 0x3
+#define BM_PXP_CTRL_VFLIP0 0x00000800
+#define BF_PXP_CTRL_VFLIP0(v)  \
+        (((v) << 11) & BM_PXP_CTRL_VFLIP0)
+#define BM_PXP_CTRL_HFLIP0 0x00000400
+#define BF_PXP_CTRL_HFLIP0(v)  \
+        (((v) << 10) & BM_PXP_CTRL_HFLIP0)
+#define BP_PXP_CTRL_ROTATE0      8
+#define BM_PXP_CTRL_ROTATE0 0x00000300
+#define BF_PXP_CTRL_ROTATE0(v)  \
+        (((v) << 8) & BM_PXP_CTRL_ROTATE0)
+#define BV_PXP_CTRL_ROTATE0__ROT_0   0x0
+#define BV_PXP_CTRL_ROTATE0__ROT_90  0x1
+#define BV_PXP_CTRL_ROTATE0__ROT_180 0x2
+#define BV_PXP_CTRL_ROTATE0__ROT_270 0x3
+#define BP_PXP_CTRL_RSVD0      6
+#define BM_PXP_CTRL_RSVD0 0x000000C0
+#define BF_PXP_CTRL_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_CTRL_RSVD0)
+#define BM_PXP_CTRL_HANDSHAKE_ABORT_SKIP 0x00000020
+#define BF_PXP_CTRL_HANDSHAKE_ABORT_SKIP(v)  \
+        (((v) << 5) & BM_PXP_CTRL_HANDSHAKE_ABORT_SKIP)
+#define BM_PXP_CTRL_ENABLE_LCD0_HANDSHAKE 0x00000010
+#define BF_PXP_CTRL_ENABLE_LCD0_HANDSHAKE(v)  \
+        (((v) << 4) & BM_PXP_CTRL_ENABLE_LCD0_HANDSHAKE)
+#define BM_PXP_CTRL_LUT_DMA_IRQ_ENABLE 0x00000008
+#define BF_PXP_CTRL_LUT_DMA_IRQ_ENABLE(v)  \
+        (((v) << 3) & BM_PXP_CTRL_LUT_DMA_IRQ_ENABLE)
+#define BM_PXP_CTRL_NEXT_IRQ_ENABLE 0x00000004
+#define BF_PXP_CTRL_NEXT_IRQ_ENABLE(v)  \
+        (((v) << 2) & BM_PXP_CTRL_NEXT_IRQ_ENABLE)
+#define BM_PXP_CTRL_IRQ_ENABLE 0x00000002
+#define BF_PXP_CTRL_IRQ_ENABLE(v)  \
+        (((v) << 1) & BM_PXP_CTRL_IRQ_ENABLE)
+#define BM_PXP_CTRL_ENABLE 0x00000001
+#define BF_PXP_CTRL_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_CTRL_ENABLE)
+
+#define HW_PXP_STAT    (0x00000010)
+#define HW_PXP_STAT_SET        (0x00000014)
+#define HW_PXP_STAT_CLR        (0x00000018)
+#define HW_PXP_STAT_TOG        (0x0000001c)
+
+#define BP_PXP_STAT_BLOCKX      24
+#define BM_PXP_STAT_BLOCKX 0xFF000000
+#define BF_PXP_STAT_BLOCKX(v) \
+        (((v) << 24) & BM_PXP_STAT_BLOCKX)
+#define BP_PXP_STAT_BLOCKY      16
+#define BM_PXP_STAT_BLOCKY 0x00FF0000
+#define BF_PXP_STAT_BLOCKY(v)  \
+        (((v) << 16) & BM_PXP_STAT_BLOCKY)
+#define BP_PXP_STAT_AXI_ERROR_ID_1      12
+#define BM_PXP_STAT_AXI_ERROR_ID_1 0x0000F000
+#define BF_PXP_STAT_AXI_ERROR_ID_1(v)  \
+        (((v) << 12) & BM_PXP_STAT_AXI_ERROR_ID_1)
+#define BM_PXP_STAT_RSVD2 0x00000800
+#define BF_PXP_STAT_RSVD2(v)  \
+        (((v) << 11) & BM_PXP_STAT_RSVD2)
+#define BM_PXP_STAT_AXI_READ_ERROR_1 0x00000400
+#define BF_PXP_STAT_AXI_READ_ERROR_1(v)  \
+        (((v) << 10) & BM_PXP_STAT_AXI_READ_ERROR_1)
+#define BM_PXP_STAT_AXI_WRITE_ERROR_1 0x00000200
+#define BF_PXP_STAT_AXI_WRITE_ERROR_1(v)  \
+        (((v) << 9) & BM_PXP_STAT_AXI_WRITE_ERROR_1)
+#define BM_PXP_STAT_LUT_DMA_LOAD_DONE_IRQ 0x00000100
+#define BF_PXP_STAT_LUT_DMA_LOAD_DONE_IRQ(v)  \
+        (((v) << 8) & BM_PXP_STAT_LUT_DMA_LOAD_DONE_IRQ)
+#define BP_PXP_STAT_AXI_ERROR_ID_0      4
+#define BM_PXP_STAT_AXI_ERROR_ID_0 0x000000F0
+#define BF_PXP_STAT_AXI_ERROR_ID_0(v)  \
+        (((v) << 4) & BM_PXP_STAT_AXI_ERROR_ID_0)
+#define BM_PXP_STAT_NEXT_IRQ 0x00000008
+#define BF_PXP_STAT_NEXT_IRQ(v)  \
+        (((v) << 3) & BM_PXP_STAT_NEXT_IRQ)
+#define BM_PXP_STAT_AXI_READ_ERROR_0 0x00000004
+#define BF_PXP_STAT_AXI_READ_ERROR_0(v)  \
+        (((v) << 2) & BM_PXP_STAT_AXI_READ_ERROR_0)
+#define BM_PXP_STAT_AXI_WRITE_ERROR_0 0x00000002
+#define BF_PXP_STAT_AXI_WRITE_ERROR_0(v)  \
+        (((v) << 1) & BM_PXP_STAT_AXI_WRITE_ERROR_0)
+#define BM_PXP_STAT_IRQ0 0x00000001
+#define BF_PXP_STAT_IRQ0(v)  \
+        (((v) << 0) & BM_PXP_STAT_IRQ0)
+
+#define HW_PXP_OUT_CTRL        (0x00000020)
+#define HW_PXP_OUT_CTRL_SET    (0x00000024)
+#define HW_PXP_OUT_CTRL_CLR    (0x00000028)
+#define HW_PXP_OUT_CTRL_TOG    (0x0000002c)
+
+#define BP_PXP_OUT_CTRL_ALPHA      24
+#define BM_PXP_OUT_CTRL_ALPHA 0xFF000000
+#define BF_PXP_OUT_CTRL_ALPHA(v) \
+        (((v) << 24) & BM_PXP_OUT_CTRL_ALPHA)
+#define BM_PXP_OUT_CTRL_ALPHA_OUTPUT 0x00800000
+#define BF_PXP_OUT_CTRL_ALPHA_OUTPUT(v)  \
+        (((v) << 23) & BM_PXP_OUT_CTRL_ALPHA_OUTPUT)
+#define BP_PXP_OUT_CTRL_RSVD1      10
+#define BM_PXP_OUT_CTRL_RSVD1 0x007FFC00
+#define BF_PXP_OUT_CTRL_RSVD1(v)  \
+        (((v) << 10) & BM_PXP_OUT_CTRL_RSVD1)
+#define BP_PXP_OUT_CTRL_INTERLACED_OUTPUT      8
+#define BM_PXP_OUT_CTRL_INTERLACED_OUTPUT 0x00000300
+#define BF_PXP_OUT_CTRL_INTERLACED_OUTPUT(v)  \
+        (((v) << 8) & BM_PXP_OUT_CTRL_INTERLACED_OUTPUT)
+#define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__PROGRESSIVE 0x0
+#define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__FIELD0      0x1
+#define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__FIELD1      0x2
+#define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__INTERLACED  0x3
+#define BP_PXP_OUT_CTRL_RSVD0      5
+#define BM_PXP_OUT_CTRL_RSVD0 0x000000E0
+#define BF_PXP_OUT_CTRL_RSVD0(v)  \
+        (((v) << 5) & BM_PXP_OUT_CTRL_RSVD0)
+#define BP_PXP_OUT_CTRL_FORMAT      0
+#define BM_PXP_OUT_CTRL_FORMAT 0x0000001F
+#define BF_PXP_OUT_CTRL_FORMAT(v)  \
+        (((v) << 0) & BM_PXP_OUT_CTRL_FORMAT)
+#define BV_PXP_OUT_CTRL_FORMAT__ARGB8888  0x0
+#define BV_PXP_OUT_CTRL_FORMAT__RGB888    0x4
+#define BV_PXP_OUT_CTRL_FORMAT__RGB888P   0x5
+#define BV_PXP_OUT_CTRL_FORMAT__ARGB1555  0x8
+#define BV_PXP_OUT_CTRL_FORMAT__ARGB4444  0x9
+#define BV_PXP_OUT_CTRL_FORMAT__RGB555    0xC
+#define BV_PXP_OUT_CTRL_FORMAT__RGB444    0xD
+#define BV_PXP_OUT_CTRL_FORMAT__RGB565    0xE
+#define BV_PXP_OUT_CTRL_FORMAT__YUV1P444  0x10
+#define BV_PXP_OUT_CTRL_FORMAT__UYVY1P422 0x12
+#define BV_PXP_OUT_CTRL_FORMAT__VYUY1P422 0x13
+#define BV_PXP_OUT_CTRL_FORMAT__Y8        0x14
+#define BV_PXP_OUT_CTRL_FORMAT__Y4        0x15
+#define BV_PXP_OUT_CTRL_FORMAT__YUV2P422  0x18
+#define BV_PXP_OUT_CTRL_FORMAT__YUV2P420  0x19
+#define BV_PXP_OUT_CTRL_FORMAT__YVU2P422  0x1A
+#define BV_PXP_OUT_CTRL_FORMAT__YVU2P420  0x1B
+
+#define HW_PXP_OUT_BUF (0x00000030)
+
+#define BP_PXP_OUT_BUF_ADDR      0
+#define BM_PXP_OUT_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_OUT_BUF_ADDR(v)   (v)
+
+#define HW_PXP_OUT_BUF2        (0x00000040)
+
+#define BP_PXP_OUT_BUF2_ADDR      0
+#define BM_PXP_OUT_BUF2_ADDR 0xFFFFFFFF
+#define BF_PXP_OUT_BUF2_ADDR(v)   (v)
+
+#define HW_PXP_OUT_PITCH       (0x00000050)
+
+#define BP_PXP_OUT_PITCH_RSVD      16
+#define BM_PXP_OUT_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_OUT_PITCH_RSVD(v) \
+        (((v) << 16) & BM_PXP_OUT_PITCH_RSVD)
+#define BP_PXP_OUT_PITCH_PITCH      0
+#define BM_PXP_OUT_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_OUT_PITCH_PITCH(v)  \
+        (((v) << 0) & BM_PXP_OUT_PITCH_PITCH)
+
+#define HW_PXP_OUT_LRC (0x00000060)
+
+#define BP_PXP_OUT_LRC_RSVD1      30
+#define BM_PXP_OUT_LRC_RSVD1 0xC0000000
+#define BF_PXP_OUT_LRC_RSVD1(v) \
+        (((v) << 30) & BM_PXP_OUT_LRC_RSVD1)
+#define BP_PXP_OUT_LRC_X      16
+#define BM_PXP_OUT_LRC_X 0x3FFF0000
+#define BF_PXP_OUT_LRC_X(v)  \
+        (((v) << 16) & BM_PXP_OUT_LRC_X)
+#define BP_PXP_OUT_LRC_RSVD0      14
+#define BM_PXP_OUT_LRC_RSVD0 0x0000C000
+#define BF_PXP_OUT_LRC_RSVD0(v)  \
+        (((v) << 14) & BM_PXP_OUT_LRC_RSVD0)
+#define BP_PXP_OUT_LRC_Y      0
+#define BM_PXP_OUT_LRC_Y 0x00003FFF
+#define BF_PXP_OUT_LRC_Y(v)  \
+        (((v) << 0) & BM_PXP_OUT_LRC_Y)
+
+#define HW_PXP_OUT_PS_ULC      (0x00000070)
+
+#define BP_PXP_OUT_PS_ULC_RSVD1      30
+#define BM_PXP_OUT_PS_ULC_RSVD1 0xC0000000
+#define BF_PXP_OUT_PS_ULC_RSVD1(v) \
+        (((v) << 30) & BM_PXP_OUT_PS_ULC_RSVD1)
+#define BP_PXP_OUT_PS_ULC_X      16
+#define BM_PXP_OUT_PS_ULC_X 0x3FFF0000
+#define BF_PXP_OUT_PS_ULC_X(v)  \
+        (((v) << 16) & BM_PXP_OUT_PS_ULC_X)
+#define BP_PXP_OUT_PS_ULC_RSVD0      14
+#define BM_PXP_OUT_PS_ULC_RSVD0 0x0000C000
+#define BF_PXP_OUT_PS_ULC_RSVD0(v)  \
+        (((v) << 14) & BM_PXP_OUT_PS_ULC_RSVD0)
+#define BP_PXP_OUT_PS_ULC_Y      0
+#define BM_PXP_OUT_PS_ULC_Y 0x00003FFF
+#define BF_PXP_OUT_PS_ULC_Y(v)  \
+        (((v) << 0) & BM_PXP_OUT_PS_ULC_Y)
+
+#define HW_PXP_OUT_PS_LRC      (0x00000080)
+
+#define BP_PXP_OUT_PS_LRC_RSVD1      30
+#define BM_PXP_OUT_PS_LRC_RSVD1 0xC0000000
+#define BF_PXP_OUT_PS_LRC_RSVD1(v) \
+        (((v) << 30) & BM_PXP_OUT_PS_LRC_RSVD1)
+#define BP_PXP_OUT_PS_LRC_X      16
+#define BM_PXP_OUT_PS_LRC_X 0x3FFF0000
+#define BF_PXP_OUT_PS_LRC_X(v)  \
+        (((v) << 16) & BM_PXP_OUT_PS_LRC_X)
+#define BP_PXP_OUT_PS_LRC_RSVD0      14
+#define BM_PXP_OUT_PS_LRC_RSVD0 0x0000C000
+#define BF_PXP_OUT_PS_LRC_RSVD0(v)  \
+        (((v) << 14) & BM_PXP_OUT_PS_LRC_RSVD0)
+#define BP_PXP_OUT_PS_LRC_Y      0
+#define BM_PXP_OUT_PS_LRC_Y 0x00003FFF
+#define BF_PXP_OUT_PS_LRC_Y(v)  \
+        (((v) << 0) & BM_PXP_OUT_PS_LRC_Y)
+
+#define HW_PXP_OUT_AS_ULC      (0x00000090)
+
+#define BP_PXP_OUT_AS_ULC_RSVD1      30
+#define BM_PXP_OUT_AS_ULC_RSVD1 0xC0000000
+#define BF_PXP_OUT_AS_ULC_RSVD1(v) \
+        (((v) << 30) & BM_PXP_OUT_AS_ULC_RSVD1)
+#define BP_PXP_OUT_AS_ULC_X      16
+#define BM_PXP_OUT_AS_ULC_X 0x3FFF0000
+#define BF_PXP_OUT_AS_ULC_X(v)  \
+        (((v) << 16) & BM_PXP_OUT_AS_ULC_X)
+#define BP_PXP_OUT_AS_ULC_RSVD0      14
+#define BM_PXP_OUT_AS_ULC_RSVD0 0x0000C000
+#define BF_PXP_OUT_AS_ULC_RSVD0(v)  \
+        (((v) << 14) & BM_PXP_OUT_AS_ULC_RSVD0)
+#define BP_PXP_OUT_AS_ULC_Y      0
+#define BM_PXP_OUT_AS_ULC_Y 0x00003FFF
+#define BF_PXP_OUT_AS_ULC_Y(v)  \
+        (((v) << 0) & BM_PXP_OUT_AS_ULC_Y)
+
+#define HW_PXP_OUT_AS_LRC      (0x000000a0)
+
+#define BP_PXP_OUT_AS_LRC_RSVD1      30
+#define BM_PXP_OUT_AS_LRC_RSVD1 0xC0000000
+#define BF_PXP_OUT_AS_LRC_RSVD1(v) \
+        (((v) << 30) & BM_PXP_OUT_AS_LRC_RSVD1)
+#define BP_PXP_OUT_AS_LRC_X      16
+#define BM_PXP_OUT_AS_LRC_X 0x3FFF0000
+#define BF_PXP_OUT_AS_LRC_X(v)  \
+        (((v) << 16) & BM_PXP_OUT_AS_LRC_X)
+#define BP_PXP_OUT_AS_LRC_RSVD0      14
+#define BM_PXP_OUT_AS_LRC_RSVD0 0x0000C000
+#define BF_PXP_OUT_AS_LRC_RSVD0(v)  \
+        (((v) << 14) & BM_PXP_OUT_AS_LRC_RSVD0)
+#define BP_PXP_OUT_AS_LRC_Y      0
+#define BM_PXP_OUT_AS_LRC_Y 0x00003FFF
+#define BF_PXP_OUT_AS_LRC_Y(v)  \
+        (((v) << 0) & BM_PXP_OUT_AS_LRC_Y)
+
+#define HW_PXP_PS_CTRL (0x000000b0)
+#define HW_PXP_PS_CTRL_SET     (0x000000b4)
+#define HW_PXP_PS_CTRL_CLR     (0x000000b8)
+#define HW_PXP_PS_CTRL_TOG     (0x000000bc)
+
+#define BP_PXP_PS_CTRL_RSVD1      12
+#define BM_PXP_PS_CTRL_RSVD1 0xFFFFF000
+#define BF_PXP_PS_CTRL_RSVD1(v) \
+        (((v) << 12) & BM_PXP_PS_CTRL_RSVD1)
+#define BP_PXP_PS_CTRL_DECX      10
+#define BM_PXP_PS_CTRL_DECX 0x00000C00
+#define BF_PXP_PS_CTRL_DECX(v)  \
+        (((v) << 10) & BM_PXP_PS_CTRL_DECX)
+#define BV_PXP_PS_CTRL_DECX__DISABLE 0x0
+#define BV_PXP_PS_CTRL_DECX__DECX2   0x1
+#define BV_PXP_PS_CTRL_DECX__DECX4   0x2
+#define BV_PXP_PS_CTRL_DECX__DECX8   0x3
+#define BP_PXP_PS_CTRL_DECY      8
+#define BM_PXP_PS_CTRL_DECY 0x00000300
+#define BF_PXP_PS_CTRL_DECY(v)  \
+        (((v) << 8) & BM_PXP_PS_CTRL_DECY)
+#define BV_PXP_PS_CTRL_DECY__DISABLE 0x0
+#define BV_PXP_PS_CTRL_DECY__DECY2   0x1
+#define BV_PXP_PS_CTRL_DECY__DECY4   0x2
+#define BV_PXP_PS_CTRL_DECY__DECY8   0x3
+#define BM_PXP_PS_CTRL_RSVD0 0x00000080
+#define BF_PXP_PS_CTRL_RSVD0(v)  \
+        (((v) << 7) & BM_PXP_PS_CTRL_RSVD0)
+#define BM_PXP_PS_CTRL_WB_SWAP 0x00000040
+#define BF_PXP_PS_CTRL_WB_SWAP(v)  \
+        (((v) << 6) & BM_PXP_PS_CTRL_WB_SWAP)
+#define BP_PXP_PS_CTRL_FORMAT      0
+#define BM_PXP_PS_CTRL_FORMAT 0x0000003F
+#define BF_PXP_PS_CTRL_FORMAT(v)  \
+        (((v) << 0) & BM_PXP_PS_CTRL_FORMAT)
+#define BV_PXP_PS_CTRL_FORMAT__RGB888    0x4
+#define BV_PXP_PS_CTRL_FORMAT__RGB555    0xC
+#define BV_PXP_PS_CTRL_FORMAT__RGB444    0xD
+#define BV_PXP_PS_CTRL_FORMAT__RGB565    0xE
+#define BV_PXP_PS_CTRL_FORMAT__YUV1P444  0x10
+#define BV_PXP_PS_CTRL_FORMAT__UYVY1P422 0x12
+#define BV_PXP_PS_CTRL_FORMAT__VYUY1P422 0x13
+#define BV_PXP_PS_CTRL_FORMAT__Y8        0x14
+#define BV_PXP_PS_CTRL_FORMAT__Y4        0x15
+#define BV_PXP_PS_CTRL_FORMAT__YUV2P422  0x18
+#define BV_PXP_PS_CTRL_FORMAT__YUV2P420  0x19
+#define BV_PXP_PS_CTRL_FORMAT__YVU2P422  0x1A
+#define BV_PXP_PS_CTRL_FORMAT__YVU2P420  0x1B
+#define BV_PXP_PS_CTRL_FORMAT__YUV422    0x1E
+#define BV_PXP_PS_CTRL_FORMAT__YUV420    0x1F
+
+#define HW_PXP_PS_BUF  (0x000000c0)
+
+#define BP_PXP_PS_BUF_ADDR      0
+#define BM_PXP_PS_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_PS_BUF_ADDR(v)   (v)
+
+#define HW_PXP_PS_UBUF (0x000000d0)
+
+#define BP_PXP_PS_UBUF_ADDR      0
+#define BM_PXP_PS_UBUF_ADDR 0xFFFFFFFF
+#define BF_PXP_PS_UBUF_ADDR(v)   (v)
+
+#define HW_PXP_PS_VBUF (0x000000e0)
+
+#define BP_PXP_PS_VBUF_ADDR      0
+#define BM_PXP_PS_VBUF_ADDR 0xFFFFFFFF
+#define BF_PXP_PS_VBUF_ADDR(v)   (v)
+
+#define HW_PXP_PS_PITCH        (0x000000f0)
+
+#define BP_PXP_PS_PITCH_RSVD      16
+#define BM_PXP_PS_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_PS_PITCH_RSVD(v) \
+        (((v) << 16) & BM_PXP_PS_PITCH_RSVD)
+#define BP_PXP_PS_PITCH_PITCH      0
+#define BM_PXP_PS_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_PS_PITCH_PITCH(v)  \
+        (((v) << 0) & BM_PXP_PS_PITCH_PITCH)
+
+#define HW_PXP_PS_BACKGROUND_0 (0x00000100)
+
+#define BP_PXP_PS_BACKGROUND_0_RSVD      24
+#define BM_PXP_PS_BACKGROUND_0_RSVD 0xFF000000
+#define BF_PXP_PS_BACKGROUND_0_RSVD(v) \
+        (((v) << 24) & BM_PXP_PS_BACKGROUND_0_RSVD)
+#define BP_PXP_PS_BACKGROUND_0_COLOR      0
+#define BM_PXP_PS_BACKGROUND_0_COLOR 0x00FFFFFF
+#define BF_PXP_PS_BACKGROUND_0_COLOR(v)  \
+        (((v) << 0) & BM_PXP_PS_BACKGROUND_0_COLOR)
+
+#define HW_PXP_PS_SCALE        (0x00000110)
+
+#define BM_PXP_PS_SCALE_RSVD2 0x80000000
+#define BF_PXP_PS_SCALE_RSVD2(v) \
+        (((v) << 31) & BM_PXP_PS_SCALE_RSVD2)
+#define BP_PXP_PS_SCALE_YSCALE      16
+#define BM_PXP_PS_SCALE_YSCALE 0x7FFF0000
+#define BF_PXP_PS_SCALE_YSCALE(v)  \
+        (((v) << 16) & BM_PXP_PS_SCALE_YSCALE)
+#define BM_PXP_PS_SCALE_RSVD1 0x00008000
+#define BF_PXP_PS_SCALE_RSVD1(v)  \
+        (((v) << 15) & BM_PXP_PS_SCALE_RSVD1)
+#define BP_PXP_PS_SCALE_XSCALE      0
+#define BM_PXP_PS_SCALE_XSCALE 0x00007FFF
+#define BF_PXP_PS_SCALE_XSCALE(v)  \
+        (((v) << 0) & BM_PXP_PS_SCALE_XSCALE)
+
+#define HW_PXP_PS_OFFSET       (0x00000120)
+
+#define BP_PXP_PS_OFFSET_RSVD2      28
+#define BM_PXP_PS_OFFSET_RSVD2 0xF0000000
+#define BF_PXP_PS_OFFSET_RSVD2(v) \
+        (((v) << 28) & BM_PXP_PS_OFFSET_RSVD2)
+#define BP_PXP_PS_OFFSET_YOFFSET      16
+#define BM_PXP_PS_OFFSET_YOFFSET 0x0FFF0000
+#define BF_PXP_PS_OFFSET_YOFFSET(v)  \
+        (((v) << 16) & BM_PXP_PS_OFFSET_YOFFSET)
+#define BP_PXP_PS_OFFSET_RSVD1      12
+#define BM_PXP_PS_OFFSET_RSVD1 0x0000F000
+#define BF_PXP_PS_OFFSET_RSVD1(v)  \
+        (((v) << 12) & BM_PXP_PS_OFFSET_RSVD1)
+#define BP_PXP_PS_OFFSET_XOFFSET      0
+#define BM_PXP_PS_OFFSET_XOFFSET 0x00000FFF
+#define BF_PXP_PS_OFFSET_XOFFSET(v)  \
+        (((v) << 0) & BM_PXP_PS_OFFSET_XOFFSET)
+
+#define HW_PXP_PS_CLRKEYLOW_0  (0x00000130)
+
+#define BP_PXP_PS_CLRKEYLOW_0_RSVD1      24
+#define BM_PXP_PS_CLRKEYLOW_0_RSVD1 0xFF000000
+#define BF_PXP_PS_CLRKEYLOW_0_RSVD1(v) \
+        (((v) << 24) & BM_PXP_PS_CLRKEYLOW_0_RSVD1)
+#define BP_PXP_PS_CLRKEYLOW_0_PIXEL      0
+#define BM_PXP_PS_CLRKEYLOW_0_PIXEL 0x00FFFFFF
+#define BF_PXP_PS_CLRKEYLOW_0_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_PS_CLRKEYLOW_0_PIXEL)
+
+#define HW_PXP_PS_CLRKEYHIGH_0 (0x00000140)
+
+#define BP_PXP_PS_CLRKEYHIGH_0_RSVD1      24
+#define BM_PXP_PS_CLRKEYHIGH_0_RSVD1 0xFF000000
+#define BF_PXP_PS_CLRKEYHIGH_0_RSVD1(v) \
+        (((v) << 24) & BM_PXP_PS_CLRKEYHIGH_0_RSVD1)
+#define BP_PXP_PS_CLRKEYHIGH_0_PIXEL      0
+#define BM_PXP_PS_CLRKEYHIGH_0_PIXEL 0x00FFFFFF
+#define BF_PXP_PS_CLRKEYHIGH_0_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_PS_CLRKEYHIGH_0_PIXEL)
+
+#define HW_PXP_AS_CTRL (0x00000150)
+
+#define BP_PXP_AS_CTRL_RSVD1      22
+#define BM_PXP_AS_CTRL_RSVD1 0xFFC00000
+#define BF_PXP_AS_CTRL_RSVD1(v) \
+        (((v) << 22) & BM_PXP_AS_CTRL_RSVD1)
+#define BM_PXP_AS_CTRL_ALPHA1_INVERT 0x00200000
+#define BF_PXP_AS_CTRL_ALPHA1_INVERT(v)  \
+        (((v) << 21) & BM_PXP_AS_CTRL_ALPHA1_INVERT)
+#define BM_PXP_AS_CTRL_ALPHA0_INVERT 0x00100000
+#define BF_PXP_AS_CTRL_ALPHA0_INVERT(v)  \
+        (((v) << 20) & BM_PXP_AS_CTRL_ALPHA0_INVERT)
+#define BP_PXP_AS_CTRL_ROP      16
+#define BM_PXP_AS_CTRL_ROP 0x000F0000
+#define BF_PXP_AS_CTRL_ROP(v)  \
+        (((v) << 16) & BM_PXP_AS_CTRL_ROP)
+#define BV_PXP_AS_CTRL_ROP__MASKAS     0x0
+#define BV_PXP_AS_CTRL_ROP__MASKNOTAS  0x1
+#define BV_PXP_AS_CTRL_ROP__MASKASNOT  0x2
+#define BV_PXP_AS_CTRL_ROP__MERGEAS    0x3
+#define BV_PXP_AS_CTRL_ROP__MERGENOTAS 0x4
+#define BV_PXP_AS_CTRL_ROP__MERGEASNOT 0x5
+#define BV_PXP_AS_CTRL_ROP__NOTCOPYAS  0x6
+#define BV_PXP_AS_CTRL_ROP__NOT        0x7
+#define BV_PXP_AS_CTRL_ROP__NOTMASKAS  0x8
+#define BV_PXP_AS_CTRL_ROP__NOTMERGEAS 0x9
+#define BV_PXP_AS_CTRL_ROP__XORAS      0xA
+#define BV_PXP_AS_CTRL_ROP__NOTXORAS   0xB
+#define BP_PXP_AS_CTRL_ALPHA      8
+#define BM_PXP_AS_CTRL_ALPHA 0x0000FF00
+#define BF_PXP_AS_CTRL_ALPHA(v)  \
+        (((v) << 8) & BM_PXP_AS_CTRL_ALPHA)
+#define BP_PXP_AS_CTRL_FORMAT      4
+#define BM_PXP_AS_CTRL_FORMAT 0x000000F0
+#define BF_PXP_AS_CTRL_FORMAT(v)  \
+        (((v) << 4) & BM_PXP_AS_CTRL_FORMAT)
+#define BV_PXP_AS_CTRL_FORMAT__ARGB8888 0x0
+#define BV_PXP_AS_CTRL_FORMAT__RGBA8888 0x1
+#define BV_PXP_AS_CTRL_FORMAT__RGB888   0x4
+#define BV_PXP_AS_CTRL_FORMAT__ARGB1555 0x8
+#define BV_PXP_AS_CTRL_FORMAT__ARGB4444 0x9
+#define BV_PXP_AS_CTRL_FORMAT__RGB555   0xC
+#define BV_PXP_AS_CTRL_FORMAT__RGB444   0xD
+#define BV_PXP_AS_CTRL_FORMAT__RGB565   0xE
+#define BM_PXP_AS_CTRL_ENABLE_COLORKEY 0x00000008
+#define BF_PXP_AS_CTRL_ENABLE_COLORKEY(v)  \
+        (((v) << 3) & BM_PXP_AS_CTRL_ENABLE_COLORKEY)
+#define BP_PXP_AS_CTRL_ALPHA_CTRL      1
+#define BM_PXP_AS_CTRL_ALPHA_CTRL 0x00000006
+#define BF_PXP_AS_CTRL_ALPHA_CTRL(v)  \
+        (((v) << 1) & BM_PXP_AS_CTRL_ALPHA_CTRL)
+#define BV_PXP_AS_CTRL_ALPHA_CTRL__Embedded 0x0
+#define BV_PXP_AS_CTRL_ALPHA_CTRL__Override 0x1
+#define BV_PXP_AS_CTRL_ALPHA_CTRL__Multiply 0x2
+#define BV_PXP_AS_CTRL_ALPHA_CTRL__ROPs     0x3
+#define BM_PXP_AS_CTRL_RSVD0 0x00000001
+#define BF_PXP_AS_CTRL_RSVD0(v)  \
+        (((v) << 0) & BM_PXP_AS_CTRL_RSVD0)
+
+#define HW_PXP_AS_BUF  (0x00000160)
+
+#define BP_PXP_AS_BUF_ADDR      0
+#define BM_PXP_AS_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_AS_BUF_ADDR(v)   (v)
+
+#define HW_PXP_AS_PITCH        (0x00000170)
+
+#define BP_PXP_AS_PITCH_RSVD      16
+#define BM_PXP_AS_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_AS_PITCH_RSVD(v) \
+        (((v) << 16) & BM_PXP_AS_PITCH_RSVD)
+#define BP_PXP_AS_PITCH_PITCH      0
+#define BM_PXP_AS_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_AS_PITCH_PITCH(v)  \
+        (((v) << 0) & BM_PXP_AS_PITCH_PITCH)
+
+#define HW_PXP_AS_CLRKEYLOW_0  (0x00000180)
+
+#define BP_PXP_AS_CLRKEYLOW_0_RSVD1      24
+#define BM_PXP_AS_CLRKEYLOW_0_RSVD1 0xFF000000
+#define BF_PXP_AS_CLRKEYLOW_0_RSVD1(v) \
+        (((v) << 24) & BM_PXP_AS_CLRKEYLOW_0_RSVD1)
+#define BP_PXP_AS_CLRKEYLOW_0_PIXEL      0
+#define BM_PXP_AS_CLRKEYLOW_0_PIXEL 0x00FFFFFF
+#define BF_PXP_AS_CLRKEYLOW_0_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_AS_CLRKEYLOW_0_PIXEL)
+
+#define HW_PXP_AS_CLRKEYHIGH_0 (0x00000190)
+
+#define BP_PXP_AS_CLRKEYHIGH_0_RSVD1      24
+#define BM_PXP_AS_CLRKEYHIGH_0_RSVD1 0xFF000000
+#define BF_PXP_AS_CLRKEYHIGH_0_RSVD1(v) \
+        (((v) << 24) & BM_PXP_AS_CLRKEYHIGH_0_RSVD1)
+#define BP_PXP_AS_CLRKEYHIGH_0_PIXEL      0
+#define BM_PXP_AS_CLRKEYHIGH_0_PIXEL 0x00FFFFFF
+#define BF_PXP_AS_CLRKEYHIGH_0_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_AS_CLRKEYHIGH_0_PIXEL)
+
+#define HW_PXP_CSC1_COEF0      (0x000001a0)
+
+#define BM_PXP_CSC1_COEF0_YCBCR_MODE 0x80000000
+#define BF_PXP_CSC1_COEF0_YCBCR_MODE(v) \
+        (((v) << 31) & BM_PXP_CSC1_COEF0_YCBCR_MODE)
+#define BM_PXP_CSC1_COEF0_BYPASS 0x40000000
+#define BF_PXP_CSC1_COEF0_BYPASS(v)  \
+        (((v) << 30) & BM_PXP_CSC1_COEF0_BYPASS)
+#define BM_PXP_CSC1_COEF0_RSVD1 0x20000000
+#define BF_PXP_CSC1_COEF0_RSVD1(v)  \
+        (((v) << 29) & BM_PXP_CSC1_COEF0_RSVD1)
+#define BP_PXP_CSC1_COEF0_C0      18
+#define BM_PXP_CSC1_COEF0_C0 0x1FFC0000
+#define BF_PXP_CSC1_COEF0_C0(v)  \
+        (((v) << 18) & BM_PXP_CSC1_COEF0_C0)
+#define BP_PXP_CSC1_COEF0_UV_OFFSET      9
+#define BM_PXP_CSC1_COEF0_UV_OFFSET 0x0003FE00
+#define BF_PXP_CSC1_COEF0_UV_OFFSET(v)  \
+        (((v) << 9) & BM_PXP_CSC1_COEF0_UV_OFFSET)
+#define BP_PXP_CSC1_COEF0_Y_OFFSET      0
+#define BM_PXP_CSC1_COEF0_Y_OFFSET 0x000001FF
+#define BF_PXP_CSC1_COEF0_Y_OFFSET(v)  \
+        (((v) << 0) & BM_PXP_CSC1_COEF0_Y_OFFSET)
+
+#define HW_PXP_CSC1_COEF1      (0x000001b0)
+
+#define BP_PXP_CSC1_COEF1_RSVD1      27
+#define BM_PXP_CSC1_COEF1_RSVD1 0xF8000000
+#define BF_PXP_CSC1_COEF1_RSVD1(v) \
+        (((v) << 27) & BM_PXP_CSC1_COEF1_RSVD1)
+#define BP_PXP_CSC1_COEF1_C1      16
+#define BM_PXP_CSC1_COEF1_C1 0x07FF0000
+#define BF_PXP_CSC1_COEF1_C1(v)  \
+        (((v) << 16) & BM_PXP_CSC1_COEF1_C1)
+#define BP_PXP_CSC1_COEF1_RSVD0      11
+#define BM_PXP_CSC1_COEF1_RSVD0 0x0000F800
+#define BF_PXP_CSC1_COEF1_RSVD0(v)  \
+        (((v) << 11) & BM_PXP_CSC1_COEF1_RSVD0)
+#define BP_PXP_CSC1_COEF1_C4      0
+#define BM_PXP_CSC1_COEF1_C4 0x000007FF
+#define BF_PXP_CSC1_COEF1_C4(v)  \
+        (((v) << 0) & BM_PXP_CSC1_COEF1_C4)
+
+#define HW_PXP_CSC1_COEF2      (0x000001c0)
+
+#define BP_PXP_CSC1_COEF2_RSVD1      27
+#define BM_PXP_CSC1_COEF2_RSVD1 0xF8000000
+#define BF_PXP_CSC1_COEF2_RSVD1(v) \
+        (((v) << 27) & BM_PXP_CSC1_COEF2_RSVD1)
+#define BP_PXP_CSC1_COEF2_C2      16
+#define BM_PXP_CSC1_COEF2_C2 0x07FF0000
+#define BF_PXP_CSC1_COEF2_C2(v)  \
+        (((v) << 16) & BM_PXP_CSC1_COEF2_C2)
+#define BP_PXP_CSC1_COEF2_RSVD0      11
+#define BM_PXP_CSC1_COEF2_RSVD0 0x0000F800
+#define BF_PXP_CSC1_COEF2_RSVD0(v)  \
+        (((v) << 11) & BM_PXP_CSC1_COEF2_RSVD0)
+#define BP_PXP_CSC1_COEF2_C3      0
+#define BM_PXP_CSC1_COEF2_C3 0x000007FF
+#define BF_PXP_CSC1_COEF2_C3(v)  \
+        (((v) << 0) & BM_PXP_CSC1_COEF2_C3)
+
+#define HW_PXP_CSC2_CTRL       (0x000001d0)
+
+#define BP_PXP_CSC2_CTRL_RSVD      3
+#define BM_PXP_CSC2_CTRL_RSVD 0xFFFFFFF8
+#define BF_PXP_CSC2_CTRL_RSVD(v) \
+        (((v) << 3) & BM_PXP_CSC2_CTRL_RSVD)
+#define BP_PXP_CSC2_CTRL_CSC_MODE      1
+#define BM_PXP_CSC2_CTRL_CSC_MODE 0x00000006
+#define BF_PXP_CSC2_CTRL_CSC_MODE(v)  \
+        (((v) << 1) & BM_PXP_CSC2_CTRL_CSC_MODE)
+#define BV_PXP_CSC2_CTRL_CSC_MODE__YUV2RGB   0x0
+#define BV_PXP_CSC2_CTRL_CSC_MODE__YCbCr2RGB 0x1
+#define BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YUV   0x2
+#define BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YCbCr 0x3
+#define BM_PXP_CSC2_CTRL_BYPASS 0x00000001
+#define BF_PXP_CSC2_CTRL_BYPASS(v)  \
+        (((v) << 0) & BM_PXP_CSC2_CTRL_BYPASS)
+
+#define HW_PXP_CSC2_COEF0      (0x000001e0)
+
+#define BP_PXP_CSC2_COEF0_RSVD1      27
+#define BM_PXP_CSC2_COEF0_RSVD1 0xF8000000
+#define BF_PXP_CSC2_COEF0_RSVD1(v) \
+        (((v) << 27) & BM_PXP_CSC2_COEF0_RSVD1)
+#define BP_PXP_CSC2_COEF0_A2      16
+#define BM_PXP_CSC2_COEF0_A2 0x07FF0000
+#define BF_PXP_CSC2_COEF0_A2(v)  \
+        (((v) << 16) & BM_PXP_CSC2_COEF0_A2)
+#define BP_PXP_CSC2_COEF0_RSVD0      11
+#define BM_PXP_CSC2_COEF0_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF0_RSVD0(v)  \
+        (((v) << 11) & BM_PXP_CSC2_COEF0_RSVD0)
+#define BP_PXP_CSC2_COEF0_A1      0
+#define BM_PXP_CSC2_COEF0_A1 0x000007FF
+#define BF_PXP_CSC2_COEF0_A1(v)  \
+        (((v) << 0) & BM_PXP_CSC2_COEF0_A1)
+
+#define HW_PXP_CSC2_COEF1      (0x000001f0)
+
+#define BP_PXP_CSC2_COEF1_RSVD1      27
+#define BM_PXP_CSC2_COEF1_RSVD1 0xF8000000
+#define BF_PXP_CSC2_COEF1_RSVD1(v) \
+        (((v) << 27) & BM_PXP_CSC2_COEF1_RSVD1)
+#define BP_PXP_CSC2_COEF1_B1      16
+#define BM_PXP_CSC2_COEF1_B1 0x07FF0000
+#define BF_PXP_CSC2_COEF1_B1(v)  \
+        (((v) << 16) & BM_PXP_CSC2_COEF1_B1)
+#define BP_PXP_CSC2_COEF1_RSVD0      11
+#define BM_PXP_CSC2_COEF1_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF1_RSVD0(v)  \
+        (((v) << 11) & BM_PXP_CSC2_COEF1_RSVD0)
+#define BP_PXP_CSC2_COEF1_A3      0
+#define BM_PXP_CSC2_COEF1_A3 0x000007FF
+#define BF_PXP_CSC2_COEF1_A3(v)  \
+        (((v) << 0) & BM_PXP_CSC2_COEF1_A3)
+
+#define HW_PXP_CSC2_COEF2      (0x00000200)
+
+#define BP_PXP_CSC2_COEF2_RSVD1      27
+#define BM_PXP_CSC2_COEF2_RSVD1 0xF8000000
+#define BF_PXP_CSC2_COEF2_RSVD1(v) \
+        (((v) << 27) & BM_PXP_CSC2_COEF2_RSVD1)
+#define BP_PXP_CSC2_COEF2_B3      16
+#define BM_PXP_CSC2_COEF2_B3 0x07FF0000
+#define BF_PXP_CSC2_COEF2_B3(v)  \
+        (((v) << 16) & BM_PXP_CSC2_COEF2_B3)
+#define BP_PXP_CSC2_COEF2_RSVD0      11
+#define BM_PXP_CSC2_COEF2_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF2_RSVD0(v)  \
+        (((v) << 11) & BM_PXP_CSC2_COEF2_RSVD0)
+#define BP_PXP_CSC2_COEF2_B2      0
+#define BM_PXP_CSC2_COEF2_B2 0x000007FF
+#define BF_PXP_CSC2_COEF2_B2(v)  \
+        (((v) << 0) & BM_PXP_CSC2_COEF2_B2)
+
+#define HW_PXP_CSC2_COEF3      (0x00000210)
+
+#define BP_PXP_CSC2_COEF3_RSVD1      27
+#define BM_PXP_CSC2_COEF3_RSVD1 0xF8000000
+#define BF_PXP_CSC2_COEF3_RSVD1(v) \
+        (((v) << 27) & BM_PXP_CSC2_COEF3_RSVD1)
+#define BP_PXP_CSC2_COEF3_C2      16
+#define BM_PXP_CSC2_COEF3_C2 0x07FF0000
+#define BF_PXP_CSC2_COEF3_C2(v)  \
+        (((v) << 16) & BM_PXP_CSC2_COEF3_C2)
+#define BP_PXP_CSC2_COEF3_RSVD0      11
+#define BM_PXP_CSC2_COEF3_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF3_RSVD0(v)  \
+        (((v) << 11) & BM_PXP_CSC2_COEF3_RSVD0)
+#define BP_PXP_CSC2_COEF3_C1      0
+#define BM_PXP_CSC2_COEF3_C1 0x000007FF
+#define BF_PXP_CSC2_COEF3_C1(v)  \
+        (((v) << 0) & BM_PXP_CSC2_COEF3_C1)
+
+#define HW_PXP_CSC2_COEF4      (0x00000220)
+
+#define BP_PXP_CSC2_COEF4_RSVD1      25
+#define BM_PXP_CSC2_COEF4_RSVD1 0xFE000000
+#define BF_PXP_CSC2_COEF4_RSVD1(v) \
+        (((v) << 25) & BM_PXP_CSC2_COEF4_RSVD1)
+#define BP_PXP_CSC2_COEF4_D1      16
+#define BM_PXP_CSC2_COEF4_D1 0x01FF0000
+#define BF_PXP_CSC2_COEF4_D1(v)  \
+        (((v) << 16) & BM_PXP_CSC2_COEF4_D1)
+#define BP_PXP_CSC2_COEF4_RSVD0      11
+#define BM_PXP_CSC2_COEF4_RSVD0 0x0000F800
+#define BF_PXP_CSC2_COEF4_RSVD0(v)  \
+        (((v) << 11) & BM_PXP_CSC2_COEF4_RSVD0)
+#define BP_PXP_CSC2_COEF4_C3      0
+#define BM_PXP_CSC2_COEF4_C3 0x000007FF
+#define BF_PXP_CSC2_COEF4_C3(v)  \
+        (((v) << 0) & BM_PXP_CSC2_COEF4_C3)
+
+#define HW_PXP_CSC2_COEF5      (0x00000230)
+
+#define BP_PXP_CSC2_COEF5_RSVD1      25
+#define BM_PXP_CSC2_COEF5_RSVD1 0xFE000000
+#define BF_PXP_CSC2_COEF5_RSVD1(v) \
+        (((v) << 25) & BM_PXP_CSC2_COEF5_RSVD1)
+#define BP_PXP_CSC2_COEF5_D3      16
+#define BM_PXP_CSC2_COEF5_D3 0x01FF0000
+#define BF_PXP_CSC2_COEF5_D3(v)  \
+        (((v) << 16) & BM_PXP_CSC2_COEF5_D3)
+#define BP_PXP_CSC2_COEF5_RSVD0      9
+#define BM_PXP_CSC2_COEF5_RSVD0 0x0000FE00
+#define BF_PXP_CSC2_COEF5_RSVD0(v)  \
+        (((v) << 9) & BM_PXP_CSC2_COEF5_RSVD0)
+#define BP_PXP_CSC2_COEF5_D2      0
+#define BM_PXP_CSC2_COEF5_D2 0x000001FF
+#define BF_PXP_CSC2_COEF5_D2(v)  \
+        (((v) << 0) & BM_PXP_CSC2_COEF5_D2)
+
+#define HW_PXP_LUT_CTRL        (0x00000240)
+
+#define BM_PXP_LUT_CTRL_BYPASS 0x80000000
+#define BF_PXP_LUT_CTRL_BYPASS(v) \
+        (((v) << 31) & BM_PXP_LUT_CTRL_BYPASS)
+#define BP_PXP_LUT_CTRL_RSVD3      26
+#define BM_PXP_LUT_CTRL_RSVD3 0x7C000000
+#define BF_PXP_LUT_CTRL_RSVD3(v)  \
+        (((v) << 26) & BM_PXP_LUT_CTRL_RSVD3)
+#define BP_PXP_LUT_CTRL_LOOKUP_MODE      24
+#define BM_PXP_LUT_CTRL_LOOKUP_MODE 0x03000000
+#define BF_PXP_LUT_CTRL_LOOKUP_MODE(v)  \
+        (((v) << 24) & BM_PXP_LUT_CTRL_LOOKUP_MODE)
+#define BV_PXP_LUT_CTRL_LOOKUP_MODE__CACHE_RGB565  0x0
+#define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8     0x1
+#define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_RGB444 0x2
+#define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_RGB454 0x3
+#define BP_PXP_LUT_CTRL_RSVD2      18
+#define BM_PXP_LUT_CTRL_RSVD2 0x00FC0000
+#define BF_PXP_LUT_CTRL_RSVD2(v)  \
+        (((v) << 18) & BM_PXP_LUT_CTRL_RSVD2)
+#define BP_PXP_LUT_CTRL_OUT_MODE      16
+#define BM_PXP_LUT_CTRL_OUT_MODE 0x00030000
+#define BF_PXP_LUT_CTRL_OUT_MODE(v)  \
+        (((v) << 16) & BM_PXP_LUT_CTRL_OUT_MODE)
+#define BV_PXP_LUT_CTRL_OUT_MODE__RESERVED    0x0
+#define BV_PXP_LUT_CTRL_OUT_MODE__Y8          0x1
+#define BV_PXP_LUT_CTRL_OUT_MODE__RGBW4444CFA 0x2
+#define BV_PXP_LUT_CTRL_OUT_MODE__RGB888      0x3
+#define BP_PXP_LUT_CTRL_RSVD1      11
+#define BM_PXP_LUT_CTRL_RSVD1 0x0000F800
+#define BF_PXP_LUT_CTRL_RSVD1(v)  \
+        (((v) << 11) & BM_PXP_LUT_CTRL_RSVD1)
+#define BM_PXP_LUT_CTRL_SEL_8KB 0x00000400
+#define BF_PXP_LUT_CTRL_SEL_8KB(v)  \
+        (((v) << 10) & BM_PXP_LUT_CTRL_SEL_8KB)
+#define BM_PXP_LUT_CTRL_LRU_UPD 0x00000200
+#define BF_PXP_LUT_CTRL_LRU_UPD(v)  \
+        (((v) << 9) & BM_PXP_LUT_CTRL_LRU_UPD)
+#define BM_PXP_LUT_CTRL_INVALID 0x00000100
+#define BF_PXP_LUT_CTRL_INVALID(v)  \
+        (((v) << 8) & BM_PXP_LUT_CTRL_INVALID)
+#define BP_PXP_LUT_CTRL_RSVD0      1
+#define BM_PXP_LUT_CTRL_RSVD0 0x000000FE
+#define BF_PXP_LUT_CTRL_RSVD0(v)  \
+        (((v) << 1) & BM_PXP_LUT_CTRL_RSVD0)
+#define BM_PXP_LUT_CTRL_DMA_START 0x00000001
+#define BF_PXP_LUT_CTRL_DMA_START(v)  \
+        (((v) << 0) & BM_PXP_LUT_CTRL_DMA_START)
+
+#define HW_PXP_LUT_ADDR        (0x00000250)
+
+#define BM_PXP_LUT_ADDR_RSVD2 0x80000000
+#define BF_PXP_LUT_ADDR_RSVD2(v) \
+        (((v) << 31) & BM_PXP_LUT_ADDR_RSVD2)
+#define BP_PXP_LUT_ADDR_NUM_BYTES      16
+#define BM_PXP_LUT_ADDR_NUM_BYTES 0x7FFF0000
+#define BF_PXP_LUT_ADDR_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_LUT_ADDR_NUM_BYTES)
+#define BP_PXP_LUT_ADDR_RSVD1      14
+#define BM_PXP_LUT_ADDR_RSVD1 0x0000C000
+#define BF_PXP_LUT_ADDR_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_LUT_ADDR_RSVD1)
+#define BP_PXP_LUT_ADDR_ADDR      0
+#define BM_PXP_LUT_ADDR_ADDR 0x00003FFF
+#define BF_PXP_LUT_ADDR_ADDR(v)  \
+        (((v) << 0) & BM_PXP_LUT_ADDR_ADDR)
+
+#define HW_PXP_LUT_DATA        (0x00000260)
+
+#define BP_PXP_LUT_DATA_DATA      0
+#define BM_PXP_LUT_DATA_DATA 0xFFFFFFFF
+#define BF_PXP_LUT_DATA_DATA(v)   (v)
+
+#define HW_PXP_LUT_EXTMEM      (0x00000270)
+
+#define BP_PXP_LUT_EXTMEM_ADDR      0
+#define BM_PXP_LUT_EXTMEM_ADDR 0xFFFFFFFF
+#define BF_PXP_LUT_EXTMEM_ADDR(v)   (v)
+
+#define HW_PXP_CFA     (0x00000280)
+
+#define BP_PXP_CFA_DATA      0
+#define BM_PXP_CFA_DATA 0xFFFFFFFF
+#define BF_PXP_CFA_DATA(v)   (v)
+
+#define HW_PXP_ALPHA_A_CTRL    (0x00000290)
+
+#define BP_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA      24
+#define BM_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA 0xFF000000
+#define BF_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA(v) \
+        (((v) << 24) & BM_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA)
+#define BP_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA      16
+#define BM_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA 0x00FF0000
+#define BF_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA(v)  \
+        (((v) << 16) & BM_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA)
+#define BP_PXP_ALPHA_A_CTRL_RSVD0      14
+#define BM_PXP_ALPHA_A_CTRL_RSVD0 0x0000C000
+#define BF_PXP_ALPHA_A_CTRL_RSVD0(v)  \
+        (((v) << 14) & BM_PXP_ALPHA_A_CTRL_RSVD0)
+#define BM_PXP_ALPHA_A_CTRL_S1_COLOR_MODE 0x00002000
+#define BF_PXP_ALPHA_A_CTRL_S1_COLOR_MODE(v)  \
+        (((v) << 13) & BM_PXP_ALPHA_A_CTRL_S1_COLOR_MODE)
+#define BV_PXP_ALPHA_A_CTRL_S1_COLOR_MODE__0 0x0
+#define BV_PXP_ALPHA_A_CTRL_S1_COLOR_MODE__1 0x1
+#define BM_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE 0x00001000
+#define BF_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE(v)  \
+        (((v) << 12) & BM_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE)
+#define BV_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE__0 0x0
+#define BV_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE__1 0x1
+#define BP_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE      10
+#define BM_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE 0x00000C00
+#define BF_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE(v)  \
+        (((v) << 10) & BM_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE)
+#define BV_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE__0 0x0
+#define BV_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE__1 0x0
+#define BV_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE__2 0x0
+#define BV_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE__3 0x0
+#define BP_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE      8
+#define BM_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE 0x00000300
+#define BF_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE(v)  \
+        (((v) << 8) & BM_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE)
+#define BV_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE__0 0x0
+#define BV_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE__1 0x1
+#define BV_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE__2 0x2
+#define BV_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE__3 0x3
+#define BM_PXP_ALPHA_A_CTRL_RSVD1 0x00000080
+#define BF_PXP_ALPHA_A_CTRL_RSVD1(v)  \
+        (((v) << 7) & BM_PXP_ALPHA_A_CTRL_RSVD1)
+#define BM_PXP_ALPHA_A_CTRL_S0_COLOR_MODE 0x00000040
+#define BF_PXP_ALPHA_A_CTRL_S0_COLOR_MODE(v)  \
+        (((v) << 6) & BM_PXP_ALPHA_A_CTRL_S0_COLOR_MODE)
+#define BV_PXP_ALPHA_A_CTRL_S0_COLOR_MODE__0 0x0
+#define BV_PXP_ALPHA_A_CTRL_S0_COLOR_MODE__1 0x1
+#define BM_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE 0x00000020
+#define BF_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE(v)  \
+        (((v) << 5) & BM_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE)
+#define BV_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE__0 0x0
+#define BV_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE__1 0x1
+#define BP_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE      3
+#define BM_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE 0x00000018
+#define BF_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE(v)  \
+        (((v) << 3) & BM_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE)
+#define BV_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE__0 0x0
+#define BV_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE__1 0x1
+#define BV_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE__2 0x2
+#define BV_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE__3 0x3
+#define BP_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE      1
+#define BM_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE 0x00000006
+#define BF_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE(v)  \
+        (((v) << 1) & BM_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE)
+#define BV_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE__0 0x0
+#define BV_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE__1 0x1
+#define BV_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE__2 0x2
+#define BV_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE__3 0x3
+#define BM_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE 0x00000001
+#define BF_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE)
+#define BV_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE__0 0x0
+#define BV_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE__1 0x1
+
+#define HW_PXP_ALPHA_B_CTRL    (0x000002a0)
+
+#define BP_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA      24
+#define BM_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA 0xFF000000
+#define BF_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA(v) \
+        (((v) << 24) & BM_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA)
+#define BP_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA      16
+#define BM_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA 0x00FF0000
+#define BF_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA(v)  \
+        (((v) << 16) & BM_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA)
+#define BP_PXP_ALPHA_B_CTRL_RSVD0      14
+#define BM_PXP_ALPHA_B_CTRL_RSVD0 0x0000C000
+#define BF_PXP_ALPHA_B_CTRL_RSVD0(v)  \
+        (((v) << 14) & BM_PXP_ALPHA_B_CTRL_RSVD0)
+#define BM_PXP_ALPHA_B_CTRL_S1_COLOR_MODE 0x00002000
+#define BF_PXP_ALPHA_B_CTRL_S1_COLOR_MODE(v)  \
+        (((v) << 13) & BM_PXP_ALPHA_B_CTRL_S1_COLOR_MODE)
+#define BV_PXP_ALPHA_B_CTRL_S1_COLOR_MODE__0 0x0
+#define BV_PXP_ALPHA_B_CTRL_S1_COLOR_MODE__1 0x1
+#define BM_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE 0x00001000
+#define BF_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE(v)  \
+        (((v) << 12) & BM_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE)
+#define BV_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE__0 0x0
+#define BV_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE__1 0x1
+#define BP_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE      10
+#define BM_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE 0x00000C00
+#define BF_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE(v)  \
+        (((v) << 10) & BM_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE)
+#define BV_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE__0 0x0
+#define BV_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE__1 0x1
+#define BV_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE__2 0x2
+#define BV_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE__3 0x3
+#define BP_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE      8
+#define BM_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE 0x00000300
+#define BF_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE(v)  \
+        (((v) << 8) & BM_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE)
+#define BV_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE__0 0x0
+#define BV_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE__1 0x1
+#define BV_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE__2 0x2
+#define BV_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE__3 0x3
+#define BM_PXP_ALPHA_B_CTRL_RSVD1 0x00000080
+#define BF_PXP_ALPHA_B_CTRL_RSVD1(v)  \
+        (((v) << 7) & BM_PXP_ALPHA_B_CTRL_RSVD1)
+#define BM_PXP_ALPHA_B_CTRL_S0_COLOR_MODE 0x00000040
+#define BF_PXP_ALPHA_B_CTRL_S0_COLOR_MODE(v)  \
+        (((v) << 6) & BM_PXP_ALPHA_B_CTRL_S0_COLOR_MODE)
+#define BV_PXP_ALPHA_B_CTRL_S0_COLOR_MODE__0 0x0
+#define BV_PXP_ALPHA_B_CTRL_S0_COLOR_MODE__1 0x1
+#define BM_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE 0x00000020
+#define BF_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE(v)  \
+        (((v) << 5) & BM_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE)
+#define BV_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE__0 0x0
+#define BV_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE__1 0x1
+#define BP_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE      3
+#define BM_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE 0x00000018
+#define BF_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE(v)  \
+        (((v) << 3) & BM_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE)
+#define BV_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE__0 0x0
+#define BV_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE__1 0x1
+#define BV_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE__2 0x2
+#define BV_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE__3 0x3
+#define BP_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE      1
+#define BM_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE 0x00000006
+#define BF_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE(v)  \
+        (((v) << 1) & BM_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE)
+#define BV_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE__0 0x0
+#define BV_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE__1 0x1
+#define BV_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE__2 0x2
+#define BV_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE__3 0x3
+#define BM_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE 0x00000001
+#define BF_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE)
+#define BV_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE__0 0x0
+#define BV_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE__1 0x1
+
+#define HW_PXP_ALPHA_B_CTRL_1  (0x000002b0)
+
+#define BP_PXP_ALPHA_B_CTRL_1_RSVD0      8
+#define BM_PXP_ALPHA_B_CTRL_1_RSVD0 0xFFFFFF00
+#define BF_PXP_ALPHA_B_CTRL_1_RSVD0(v) \
+        (((v) << 8) & BM_PXP_ALPHA_B_CTRL_1_RSVD0)
+#define BP_PXP_ALPHA_B_CTRL_1_ROP      4
+#define BM_PXP_ALPHA_B_CTRL_1_ROP 0x000000F0
+#define BF_PXP_ALPHA_B_CTRL_1_ROP(v)  \
+        (((v) << 4) & BM_PXP_ALPHA_B_CTRL_1_ROP)
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__MASKAS     0x0
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__MASKNOTAS  0x1
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__MASKASNOT  0x2
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__MERGEAS    0x3
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__MERGENOTAS 0x4
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__MERGEASNOT 0x5
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__NOTCOPYAS  0x6
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__NOT        0x7
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__NOTMASKAS  0x8
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__NOTMERGEAS 0x9
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__XORAS      0xA
+#define BV_PXP_ALPHA_B_CTRL_1_ROP__NOTXORAS   0xB
+#define BP_PXP_ALPHA_B_CTRL_1_RSVD1      2
+#define BM_PXP_ALPHA_B_CTRL_1_RSVD1 0x0000000C
+#define BF_PXP_ALPHA_B_CTRL_1_RSVD1(v)  \
+        (((v) << 2) & BM_PXP_ALPHA_B_CTRL_1_RSVD1)
+#define BM_PXP_ALPHA_B_CTRL_1_OL_CLRKEY_ENABLE 0x00000002
+#define BF_PXP_ALPHA_B_CTRL_1_OL_CLRKEY_ENABLE(v)  \
+        (((v) << 1) & BM_PXP_ALPHA_B_CTRL_1_OL_CLRKEY_ENABLE)
+#define BM_PXP_ALPHA_B_CTRL_1_ROP_ENABLE 0x00000001
+#define BF_PXP_ALPHA_B_CTRL_1_ROP_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_ALPHA_B_CTRL_1_ROP_ENABLE)
+
+#define HW_PXP_PS_BACKGROUND_1 (0x000002c0)
+
+#define BP_PXP_PS_BACKGROUND_1_RSVD      24
+#define BM_PXP_PS_BACKGROUND_1_RSVD 0xFF000000
+#define BF_PXP_PS_BACKGROUND_1_RSVD(v) \
+        (((v) << 24) & BM_PXP_PS_BACKGROUND_1_RSVD)
+#define BP_PXP_PS_BACKGROUND_1_COLOR      0
+#define BM_PXP_PS_BACKGROUND_1_COLOR 0x00FFFFFF
+#define BF_PXP_PS_BACKGROUND_1_COLOR(v)  \
+        (((v) << 0) & BM_PXP_PS_BACKGROUND_1_COLOR)
+
+#define HW_PXP_PS_CLRKEYLOW_1  (0x000002d0)
+
+#define BP_PXP_PS_CLRKEYLOW_1_RSVD1      24
+#define BM_PXP_PS_CLRKEYLOW_1_RSVD1 0xFF000000
+#define BF_PXP_PS_CLRKEYLOW_1_RSVD1(v) \
+        (((v) << 24) & BM_PXP_PS_CLRKEYLOW_1_RSVD1)
+#define BP_PXP_PS_CLRKEYLOW_1_PIXEL      0
+#define BM_PXP_PS_CLRKEYLOW_1_PIXEL 0x00FFFFFF
+#define BF_PXP_PS_CLRKEYLOW_1_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_PS_CLRKEYLOW_1_PIXEL)
+
+#define HW_PXP_PS_CLRKEYHIGH_1 (0x000002e0)
+
+#define BP_PXP_PS_CLRKEYHIGH_1_RSVD1      24
+#define BM_PXP_PS_CLRKEYHIGH_1_RSVD1 0xFF000000
+#define BF_PXP_PS_CLRKEYHIGH_1_RSVD1(v) \
+        (((v) << 24) & BM_PXP_PS_CLRKEYHIGH_1_RSVD1)
+#define BP_PXP_PS_CLRKEYHIGH_1_PIXEL      0
+#define BM_PXP_PS_CLRKEYHIGH_1_PIXEL 0x00FFFFFF
+#define BF_PXP_PS_CLRKEYHIGH_1_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_PS_CLRKEYHIGH_1_PIXEL)
+
+#define HW_PXP_AS_CLRKEYLOW_1  (0x000002f0)
+
+#define BP_PXP_AS_CLRKEYLOW_1_RSVD1      24
+#define BM_PXP_AS_CLRKEYLOW_1_RSVD1 0xFF000000
+#define BF_PXP_AS_CLRKEYLOW_1_RSVD1(v) \
+        (((v) << 24) & BM_PXP_AS_CLRKEYLOW_1_RSVD1)
+#define BP_PXP_AS_CLRKEYLOW_1_PIXEL      0
+#define BM_PXP_AS_CLRKEYLOW_1_PIXEL 0x00FFFFFF
+#define BF_PXP_AS_CLRKEYLOW_1_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_AS_CLRKEYLOW_1_PIXEL)
+
+#define HW_PXP_AS_CLRKEYHIGH_1 (0x00000300)
+
+#define BP_PXP_AS_CLRKEYHIGH_1_RSVD1      24
+#define BM_PXP_AS_CLRKEYHIGH_1_RSVD1 0xFF000000
+#define BF_PXP_AS_CLRKEYHIGH_1_RSVD1(v) \
+        (((v) << 24) & BM_PXP_AS_CLRKEYHIGH_1_RSVD1)
+#define BP_PXP_AS_CLRKEYHIGH_1_PIXEL      0
+#define BM_PXP_AS_CLRKEYHIGH_1_PIXEL 0x00FFFFFF
+#define BF_PXP_AS_CLRKEYHIGH_1_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_AS_CLRKEYHIGH_1_PIXEL)
+
+#define HW_PXP_CTRL2   (0x00000310)
+#define HW_PXP_CTRL2_SET       (0x00000314)
+#define HW_PXP_CTRL2_CLR       (0x00000318)
+#define HW_PXP_CTRL2_TOG       (0x0000031c)
+
+#define BP_PXP_CTRL2_RSVD3      28
+#define BM_PXP_CTRL2_RSVD3 0xF0000000
+#define BF_PXP_CTRL2_RSVD3(v) \
+        (((v) << 28) & BM_PXP_CTRL2_RSVD3)
+#define BM_PXP_CTRL2_ENABLE_ROTATE1 0x08000000
+#define BF_PXP_CTRL2_ENABLE_ROTATE1(v)  \
+        (((v) << 27) & BM_PXP_CTRL2_ENABLE_ROTATE1)
+#define BM_PXP_CTRL2_ENABLE_ROTATE0 0x04000000
+#define BF_PXP_CTRL2_ENABLE_ROTATE0(v)  \
+        (((v) << 26) & BM_PXP_CTRL2_ENABLE_ROTATE0)
+#define BM_PXP_CTRL2_ENABLE_LUT 0x02000000
+#define BF_PXP_CTRL2_ENABLE_LUT(v)  \
+        (((v) << 25) & BM_PXP_CTRL2_ENABLE_LUT)
+#define BM_PXP_CTRL2_ENABLE_CSC2 0x01000000
+#define BF_PXP_CTRL2_ENABLE_CSC2(v)  \
+        (((v) << 24) & BM_PXP_CTRL2_ENABLE_CSC2)
+#define BM_PXP_CTRL2_BLOCK_SIZE 0x00800000
+#define BF_PXP_CTRL2_BLOCK_SIZE(v)  \
+        (((v) << 23) & BM_PXP_CTRL2_BLOCK_SIZE)
+#define BV_PXP_CTRL2_BLOCK_SIZE__8X8   0x0
+#define BV_PXP_CTRL2_BLOCK_SIZE__16X16 0x1
+#define BM_PXP_CTRL2_RSVD2 0x00400000
+#define BF_PXP_CTRL2_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_CTRL2_RSVD2)
+#define BM_PXP_CTRL2_ENABLE_ALPHA_B 0x00200000
+#define BF_PXP_CTRL2_ENABLE_ALPHA_B(v)  \
+        (((v) << 21) & BM_PXP_CTRL2_ENABLE_ALPHA_B)
+#define BM_PXP_CTRL2_ENABLE_INPUT_FETCH_STORE 0x00100000
+#define BF_PXP_CTRL2_ENABLE_INPUT_FETCH_STORE(v)  \
+        (((v) << 20) & BM_PXP_CTRL2_ENABLE_INPUT_FETCH_STORE)
+#define BM_PXP_CTRL2_ENABLE_WFE_B 0x00080000
+#define BF_PXP_CTRL2_ENABLE_WFE_B(v)  \
+        (((v) << 19) & BM_PXP_CTRL2_ENABLE_WFE_B)
+#define BM_PXP_CTRL2_ENABLE_WFE_A 0x00040000
+#define BF_PXP_CTRL2_ENABLE_WFE_A(v)  \
+        (((v) << 18) & BM_PXP_CTRL2_ENABLE_WFE_A)
+#define BM_PXP_CTRL2_ENABLE_DITHER 0x00020000
+#define BF_PXP_CTRL2_ENABLE_DITHER(v)  \
+        (((v) << 17) & BM_PXP_CTRL2_ENABLE_DITHER)
+#define BM_PXP_CTRL2_RSVD1 0x00010000
+#define BF_PXP_CTRL2_RSVD1(v)  \
+        (((v) << 16) & BM_PXP_CTRL2_RSVD1)
+#define BM_PXP_CTRL2_VFLIP1 0x00008000
+#define BF_PXP_CTRL2_VFLIP1(v)  \
+        (((v) << 15) & BM_PXP_CTRL2_VFLIP1)
+#define BM_PXP_CTRL2_HFLIP1 0x00004000
+#define BF_PXP_CTRL2_HFLIP1(v)  \
+        (((v) << 14) & BM_PXP_CTRL2_HFLIP1)
+#define BP_PXP_CTRL2_ROTATE1      12
+#define BM_PXP_CTRL2_ROTATE1 0x00003000
+#define BF_PXP_CTRL2_ROTATE1(v)  \
+        (((v) << 12) & BM_PXP_CTRL2_ROTATE1)
+#define BV_PXP_CTRL2_ROTATE1__ROT_0   0x0
+#define BV_PXP_CTRL2_ROTATE1__ROT_90  0x1
+#define BV_PXP_CTRL2_ROTATE1__ROT_180 0x2
+#define BV_PXP_CTRL2_ROTATE1__ROT_270 0x3
+#define BM_PXP_CTRL2_VFLIP0 0x00000800
+#define BF_PXP_CTRL2_VFLIP0(v)  \
+        (((v) << 11) & BM_PXP_CTRL2_VFLIP0)
+#define BM_PXP_CTRL2_HFLIP0 0x00000400
+#define BF_PXP_CTRL2_HFLIP0(v)  \
+        (((v) << 10) & BM_PXP_CTRL2_HFLIP0)
+#define BP_PXP_CTRL2_ROTATE0      8
+#define BM_PXP_CTRL2_ROTATE0 0x00000300
+#define BF_PXP_CTRL2_ROTATE0(v)  \
+        (((v) << 8) & BM_PXP_CTRL2_ROTATE0)
+#define BV_PXP_CTRL2_ROTATE0__ROT_0   0x0
+#define BV_PXP_CTRL2_ROTATE0__ROT_90  0x1
+#define BV_PXP_CTRL2_ROTATE0__ROT_180 0x2
+#define BV_PXP_CTRL2_ROTATE0__ROT_270 0x3
+#define BP_PXP_CTRL2_RSVD0      1
+#define BM_PXP_CTRL2_RSVD0 0x000000FE
+#define BF_PXP_CTRL2_RSVD0(v)  \
+        (((v) << 1) & BM_PXP_CTRL2_RSVD0)
+#define BM_PXP_CTRL2_ENABLE 0x00000001
+#define BF_PXP_CTRL2_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_CTRL2_ENABLE)
+
+#define HW_PXP_POWER_REG0      (0x00000320)
+
+#define BP_PXP_POWER_REG0_CTRL      12
+#define BM_PXP_POWER_REG0_CTRL 0xFFFFF000
+#define BF_PXP_POWER_REG0_CTRL(v) \
+        (((v) << 12) & BM_PXP_POWER_REG0_CTRL)
+#define BP_PXP_POWER_REG0_ROT0_MEM_LP_STATE      9
+#define BM_PXP_POWER_REG0_ROT0_MEM_LP_STATE 0x00000E00
+#define BF_PXP_POWER_REG0_ROT0_MEM_LP_STATE(v)  \
+        (((v) << 9) & BM_PXP_POWER_REG0_ROT0_MEM_LP_STATE)
+#define BV_PXP_POWER_REG0_ROT0_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_REG0_ROT0_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_REG0_ROT0_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_REG0_ROT0_MEM_LP_STATE__SD   0x4
+#define BP_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN      6
+#define BM_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN 0x000001C0
+#define BF_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN(v)  \
+        (((v) << 6) & BM_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN)
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN__NONE 0x0
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN__LS   0x1
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN__DS   0x2
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN__SD   0x4
+#define BP_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN      3
+#define BM_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN 0x00000038
+#define BF_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN(v)  \
+        (((v) << 3) & BM_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN)
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN__NONE 0x0
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN__LS   0x1
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN__DS   0x2
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN__SD   0x4
+#define BP_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0      0
+#define BM_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0 0x00000007
+#define BF_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0(v)  \
+        (((v) << 0) & BM_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0)
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0__NONE 0x0
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0__LS   0x1
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0__DS   0x2
+#define BV_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0__SD   0x4
+
+#define HW_PXP_POWER_REG1      (0x00000330)
+
+#define BP_PXP_POWER_REG1_RSVD0      24
+#define BM_PXP_POWER_REG1_RSVD0 0xFF000000
+#define BF_PXP_POWER_REG1_RSVD0(v) \
+        (((v) << 24) & BM_PXP_POWER_REG1_RSVD0)
+#define BP_PXP_POWER_REG1_ALU_B_MEM_LP_STATE      21
+#define BM_PXP_POWER_REG1_ALU_B_MEM_LP_STATE 0x00E00000
+#define BF_PXP_POWER_REG1_ALU_B_MEM_LP_STATE(v)  \
+        (((v) << 21) & BM_PXP_POWER_REG1_ALU_B_MEM_LP_STATE)
+#define BV_PXP_POWER_REG1_ALU_B_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_REG1_ALU_B_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_REG1_ALU_B_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_REG1_ALU_B_MEM_LP_STATE__SD   0x4
+#define BP_PXP_POWER_REG1_ALU_A_MEM_LP_STATE      18
+#define BM_PXP_POWER_REG1_ALU_A_MEM_LP_STATE 0x001C0000
+#define BF_PXP_POWER_REG1_ALU_A_MEM_LP_STATE(v)  \
+        (((v) << 18) & BM_PXP_POWER_REG1_ALU_A_MEM_LP_STATE)
+#define BV_PXP_POWER_REG1_ALU_A_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_REG1_ALU_A_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_REG1_ALU_A_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_REG1_ALU_A_MEM_LP_STATE__SD   0x4
+#define BP_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE      15
+#define BM_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE 0x00038000
+#define BF_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE(v)  \
+        (((v) << 15) & BM_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE)
+#define BV_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE__SD   0x4
+#define BP_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE      12
+#define BM_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE 0x00007000
+#define BF_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE(v)  \
+        (((v) << 12) & BM_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE)
+#define BV_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE__SD   0x4
+#define BP_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE      9
+#define BM_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE 0x00000E00
+#define BF_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE(v)  \
+        (((v) << 9) & BM_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE)
+#define BV_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE__SD   0x4
+#define BP_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE      6
+#define BM_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE 0x000001C0
+#define BF_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE(v)  \
+        (((v) << 6) & BM_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE)
+#define BV_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE__SD   0x4
+#define BP_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE      3
+#define BM_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE 0x00000038
+#define BF_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE(v)  \
+        (((v) << 3) & BM_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE)
+#define BV_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE__SD   0x4
+#define BP_PXP_POWER_REG1_ROT1_MEM_LP_STATE      0
+#define BM_PXP_POWER_REG1_ROT1_MEM_LP_STATE 0x00000007
+#define BF_PXP_POWER_REG1_ROT1_MEM_LP_STATE(v)  \
+        (((v) << 0) & BM_PXP_POWER_REG1_ROT1_MEM_LP_STATE)
+#define BV_PXP_POWER_REG1_ROT1_MEM_LP_STATE__NONE 0x0
+#define BV_PXP_POWER_REG1_ROT1_MEM_LP_STATE__LS   0x1
+#define BV_PXP_POWER_REG1_ROT1_MEM_LP_STATE__DS   0x2
+#define BV_PXP_POWER_REG1_ROT1_MEM_LP_STATE__SD   0x4
+
+#define HW_PXP_DATA_PATH_CTRL0 (0x00000340)
+#define HW_PXP_DATA_PATH_CTRL0_SET     (0x00000344)
+#define HW_PXP_DATA_PATH_CTRL0_CLR     (0x00000348)
+#define HW_PXP_DATA_PATH_CTRL0_TOG     (0x0000034c)
+
+#define BP_PXP_DATA_PATH_CTRL0_MUX15_SEL      30
+#define BM_PXP_DATA_PATH_CTRL0_MUX15_SEL 0xC0000000
+#define BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(v) \
+        (((v) << 30) & BM_PXP_DATA_PATH_CTRL0_MUX15_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX15_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX15_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX15_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX15_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX14_SEL      28
+#define BM_PXP_DATA_PATH_CTRL0_MUX14_SEL 0x30000000
+#define BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(v)  \
+        (((v) << 28) & BM_PXP_DATA_PATH_CTRL0_MUX14_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX14_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX14_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX14_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX14_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX13_SEL      26
+#define BM_PXP_DATA_PATH_CTRL0_MUX13_SEL 0x0C000000
+#define BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(v)  \
+        (((v) << 26) & BM_PXP_DATA_PATH_CTRL0_MUX13_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX13_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX13_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX13_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX13_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX12_SEL      24
+#define BM_PXP_DATA_PATH_CTRL0_MUX12_SEL 0x03000000
+#define BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(v)  \
+        (((v) << 24) & BM_PXP_DATA_PATH_CTRL0_MUX12_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX12_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX12_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX12_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX12_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX11_SEL      22
+#define BM_PXP_DATA_PATH_CTRL0_MUX11_SEL 0x00C00000
+#define BF_PXP_DATA_PATH_CTRL0_MUX11_SEL(v)  \
+        (((v) << 22) & BM_PXP_DATA_PATH_CTRL0_MUX11_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX11_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX11_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX11_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX11_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX10_SEL      20
+#define BM_PXP_DATA_PATH_CTRL0_MUX10_SEL 0x00300000
+#define BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(v)  \
+        (((v) << 20) & BM_PXP_DATA_PATH_CTRL0_MUX10_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX10_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX10_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX10_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX10_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX9_SEL      18
+#define BM_PXP_DATA_PATH_CTRL0_MUX9_SEL 0x000C0000
+#define BF_PXP_DATA_PATH_CTRL0_MUX9_SEL(v)  \
+        (((v) << 18) & BM_PXP_DATA_PATH_CTRL0_MUX9_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX9_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX9_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX9_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX9_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX8_SEL      16
+#define BM_PXP_DATA_PATH_CTRL0_MUX8_SEL 0x00030000
+#define BF_PXP_DATA_PATH_CTRL0_MUX8_SEL(v)  \
+        (((v) << 16) & BM_PXP_DATA_PATH_CTRL0_MUX8_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX8_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX8_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX8_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX8_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX7_SEL      14
+#define BM_PXP_DATA_PATH_CTRL0_MUX7_SEL 0x0000C000
+#define BF_PXP_DATA_PATH_CTRL0_MUX7_SEL(v)  \
+        (((v) << 14) & BM_PXP_DATA_PATH_CTRL0_MUX7_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX7_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX7_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX7_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX7_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX6_SEL      12
+#define BM_PXP_DATA_PATH_CTRL0_MUX6_SEL 0x00003000
+#define BF_PXP_DATA_PATH_CTRL0_MUX6_SEL(v)  \
+        (((v) << 12) & BM_PXP_DATA_PATH_CTRL0_MUX6_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX6_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX6_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX6_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX6_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX5_SEL      10
+#define BM_PXP_DATA_PATH_CTRL0_MUX5_SEL 0x00000C00
+#define BF_PXP_DATA_PATH_CTRL0_MUX5_SEL(v)  \
+        (((v) << 10) & BM_PXP_DATA_PATH_CTRL0_MUX5_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX5_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX5_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX5_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX5_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX4_SEL      8
+#define BM_PXP_DATA_PATH_CTRL0_MUX4_SEL 0x00000300
+#define BF_PXP_DATA_PATH_CTRL0_MUX4_SEL(v)  \
+        (((v) << 8) & BM_PXP_DATA_PATH_CTRL0_MUX4_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX4_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX4_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX4_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX4_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX3_SEL      6
+#define BM_PXP_DATA_PATH_CTRL0_MUX3_SEL 0x000000C0
+#define BF_PXP_DATA_PATH_CTRL0_MUX3_SEL(v)  \
+        (((v) << 6) & BM_PXP_DATA_PATH_CTRL0_MUX3_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX3_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX3_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX3_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX3_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX2_SEL      4
+#define BM_PXP_DATA_PATH_CTRL0_MUX2_SEL 0x00000030
+#define BF_PXP_DATA_PATH_CTRL0_MUX2_SEL(v)  \
+        (((v) << 4) & BM_PXP_DATA_PATH_CTRL0_MUX2_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX2_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX2_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX2_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX2_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX1_SEL      2
+#define BM_PXP_DATA_PATH_CTRL0_MUX1_SEL 0x0000000C
+#define BF_PXP_DATA_PATH_CTRL0_MUX1_SEL(v)  \
+        (((v) << 2) & BM_PXP_DATA_PATH_CTRL0_MUX1_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX1_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX1_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX1_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX1_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL0_MUX0_SEL      0
+#define BM_PXP_DATA_PATH_CTRL0_MUX0_SEL 0x00000003
+#define BF_PXP_DATA_PATH_CTRL0_MUX0_SEL(v)  \
+        (((v) << 0) & BM_PXP_DATA_PATH_CTRL0_MUX0_SEL)
+#define BV_PXP_DATA_PATH_CTRL0_MUX0_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL0_MUX0_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL0_MUX0_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL0_MUX0_SEL__3 0x3
+
+#define HW_PXP_DATA_PATH_CTRL1 (0x00000350)
+#define HW_PXP_DATA_PATH_CTRL1_SET     (0x00000354)
+#define HW_PXP_DATA_PATH_CTRL1_CLR     (0x00000358)
+#define HW_PXP_DATA_PATH_CTRL1_TOG     (0x0000035c)
+
+#define BP_PXP_DATA_PATH_CTRL1_RSVD0      4
+#define BM_PXP_DATA_PATH_CTRL1_RSVD0 0xFFFFFFF0
+#define BF_PXP_DATA_PATH_CTRL1_RSVD0(v) \
+        (((v) << 4) & BM_PXP_DATA_PATH_CTRL1_RSVD0)
+#define BP_PXP_DATA_PATH_CTRL1_MUX17_SEL      2
+#define BM_PXP_DATA_PATH_CTRL1_MUX17_SEL 0x0000000C
+#define BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(v)  \
+        (((v) << 2) & BM_PXP_DATA_PATH_CTRL1_MUX17_SEL)
+#define BV_PXP_DATA_PATH_CTRL1_MUX17_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL1_MUX17_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL1_MUX17_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL1_MUX17_SEL__3 0x3
+#define BP_PXP_DATA_PATH_CTRL1_MUX16_SEL      0
+#define BM_PXP_DATA_PATH_CTRL1_MUX16_SEL 0x00000003
+#define BF_PXP_DATA_PATH_CTRL1_MUX16_SEL(v)  \
+        (((v) << 0) & BM_PXP_DATA_PATH_CTRL1_MUX16_SEL)
+#define BV_PXP_DATA_PATH_CTRL1_MUX16_SEL__0 0x0
+#define BV_PXP_DATA_PATH_CTRL1_MUX16_SEL__1 0x1
+#define BV_PXP_DATA_PATH_CTRL1_MUX16_SEL__2 0x2
+#define BV_PXP_DATA_PATH_CTRL1_MUX16_SEL__3 0x3
+
+#define HW_PXP_INIT_MEM_CTRL   (0x00000360)
+#define HW_PXP_INIT_MEM_CTRL_SET       (0x00000364)
+#define HW_PXP_INIT_MEM_CTRL_CLR       (0x00000368)
+#define HW_PXP_INIT_MEM_CTRL_TOG       (0x0000036c)
+
+#define BM_PXP_INIT_MEM_CTRL_START 0x80000000
+#define BF_PXP_INIT_MEM_CTRL_START(v) \
+        (((v) << 31) & BM_PXP_INIT_MEM_CTRL_START)
+#define BP_PXP_INIT_MEM_CTRL_SELECT      27
+#define BM_PXP_INIT_MEM_CTRL_SELECT 0x78000000
+#define BF_PXP_INIT_MEM_CTRL_SELECT(v)  \
+        (((v) << 27) & BM_PXP_INIT_MEM_CTRL_SELECT)
+#define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER0_LUT  0x0
+#define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER0_ERR0 0x1
+#define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER0_ERR1 0x2
+#define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER1_LUT  0x3
+#define BV_PXP_INIT_MEM_CTRL_SELECT__DITHER2_LUT  0x4
+#define BV_PXP_INIT_MEM_CTRL_SELECT__ALU_A        0x5
+#define BV_PXP_INIT_MEM_CTRL_SELECT__ALU_B        0x6
+#define BV_PXP_INIT_MEM_CTRL_SELECT__WFE_A_FETCH  0x7
+#define BV_PXP_INIT_MEM_CTRL_SELECT__WFE_B_FETCH  0x8
+#define BV_PXP_INIT_MEM_CTRL_SELECT__RESERVED     0x15
+#define BP_PXP_INIT_MEM_CTRL_RSVD0      16
+#define BM_PXP_INIT_MEM_CTRL_RSVD0 0x07FF0000
+#define BF_PXP_INIT_MEM_CTRL_RSVD0(v)  \
+        (((v) << 16) & BM_PXP_INIT_MEM_CTRL_RSVD0)
+#define BP_PXP_INIT_MEM_CTRL_ADDR      0
+#define BM_PXP_INIT_MEM_CTRL_ADDR 0x0000FFFF
+#define BF_PXP_INIT_MEM_CTRL_ADDR(v)  \
+        (((v) << 0) & BM_PXP_INIT_MEM_CTRL_ADDR)
+
+#define HW_PXP_INIT_MEM_DATA   (0x00000370)
+
+#define BP_PXP_INIT_MEM_DATA_DATA      0
+#define BM_PXP_INIT_MEM_DATA_DATA 0xFFFFFFFF
+#define BF_PXP_INIT_MEM_DATA_DATA(v)   (v)
+
+#define HW_PXP_INIT_MEM_DATA_HIGH      (0x00000380)
+
+#define BP_PXP_INIT_MEM_DATA_HIGH_DATA      0
+#define BM_PXP_INIT_MEM_DATA_HIGH_DATA 0xFFFFFFFF
+#define BF_PXP_INIT_MEM_DATA_HIGH_DATA(v)   (v)
+
+#define HW_PXP_IRQ_MASK        (0x00000390)
+#define HW_PXP_IRQ_MASK_SET    (0x00000394)
+#define HW_PXP_IRQ_MASK_CLR    (0x00000398)
+#define HW_PXP_IRQ_MASK_TOG    (0x0000039c)
+
+#define BM_PXP_IRQ_MASK_COMPRESS_DONE_IRQ_EN 0x80000000
+#define BF_PXP_IRQ_MASK_COMPRESS_DONE_IRQ_EN(v) \
+        (((v) << 31) & BM_PXP_IRQ_MASK_COMPRESS_DONE_IRQ_EN)
+#define BP_PXP_IRQ_MASK_RSVD1      16
+#define BM_PXP_IRQ_MASK_RSVD1 0x7FFF0000
+#define BF_PXP_IRQ_MASK_RSVD1(v)  \
+        (((v) << 16) & BM_PXP_IRQ_MASK_RSVD1)
+#define BM_PXP_IRQ_MASK_WFE_B_STORE_IRQ_EN 0x00008000
+#define BF_PXP_IRQ_MASK_WFE_B_STORE_IRQ_EN(v)  \
+        (((v) << 15) & BM_PXP_IRQ_MASK_WFE_B_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_WFE_A_STORE_IRQ_EN 0x00004000
+#define BF_PXP_IRQ_MASK_WFE_A_STORE_IRQ_EN(v)  \
+        (((v) << 14) & BM_PXP_IRQ_MASK_WFE_A_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_DITHER_STORE_IRQ_EN 0x00002000
+#define BF_PXP_IRQ_MASK_DITHER_STORE_IRQ_EN(v)  \
+        (((v) << 13) & BM_PXP_IRQ_MASK_DITHER_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_FIRST_STORE_IRQ_EN 0x00001000
+#define BF_PXP_IRQ_MASK_FIRST_STORE_IRQ_EN(v)  \
+        (((v) << 12) & BM_PXP_IRQ_MASK_FIRST_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_WFE_B_CH1_STORE_IRQ_EN 0x00000800
+#define BF_PXP_IRQ_MASK_WFE_B_CH1_STORE_IRQ_EN(v)  \
+        (((v) << 11) & BM_PXP_IRQ_MASK_WFE_B_CH1_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_WFE_B_CH0_STORE_IRQ_EN 0x00000400
+#define BF_PXP_IRQ_MASK_WFE_B_CH0_STORE_IRQ_EN(v)  \
+        (((v) << 10) & BM_PXP_IRQ_MASK_WFE_B_CH0_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_WFE_A_CH1_STORE_IRQ_EN 0x00000200
+#define BF_PXP_IRQ_MASK_WFE_A_CH1_STORE_IRQ_EN(v)  \
+        (((v) << 9) & BM_PXP_IRQ_MASK_WFE_A_CH1_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_WFE_A_CH0_STORE_IRQ_EN 0x00000100
+#define BF_PXP_IRQ_MASK_WFE_A_CH0_STORE_IRQ_EN(v)  \
+        (((v) << 8) & BM_PXP_IRQ_MASK_WFE_A_CH0_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_DITHER_CH1_STORE_IRQ_EN 0x00000080
+#define BF_PXP_IRQ_MASK_DITHER_CH1_STORE_IRQ_EN(v)  \
+        (((v) << 7) & BM_PXP_IRQ_MASK_DITHER_CH1_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_DITHER_CH0_STORE_IRQ_EN 0x00000040
+#define BF_PXP_IRQ_MASK_DITHER_CH0_STORE_IRQ_EN(v)  \
+        (((v) << 6) & BM_PXP_IRQ_MASK_DITHER_CH0_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_DITHER_CH1_PREFETCH_IRQ_EN 0x00000020
+#define BF_PXP_IRQ_MASK_DITHER_CH1_PREFETCH_IRQ_EN(v)  \
+        (((v) << 5) & BM_PXP_IRQ_MASK_DITHER_CH1_PREFETCH_IRQ_EN)
+#define BM_PXP_IRQ_MASK_DITHER_CH0_PREFETCH_IRQ_EN 0x00000010
+#define BF_PXP_IRQ_MASK_DITHER_CH0_PREFETCH_IRQ_EN(v)  \
+        (((v) << 4) & BM_PXP_IRQ_MASK_DITHER_CH0_PREFETCH_IRQ_EN)
+#define BM_PXP_IRQ_MASK_FIRST_CH1_STORE_IRQ_EN 0x00000008
+#define BF_PXP_IRQ_MASK_FIRST_CH1_STORE_IRQ_EN(v)  \
+        (((v) << 3) & BM_PXP_IRQ_MASK_FIRST_CH1_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_FIRST_CH0_STORE_IRQ_EN 0x00000004
+#define BF_PXP_IRQ_MASK_FIRST_CH0_STORE_IRQ_EN(v)  \
+        (((v) << 2) & BM_PXP_IRQ_MASK_FIRST_CH0_STORE_IRQ_EN)
+#define BM_PXP_IRQ_MASK_FIRST_CH1_PREFETCH_IRQ_EN 0x00000002
+#define BF_PXP_IRQ_MASK_FIRST_CH1_PREFETCH_IRQ_EN(v)  \
+        (((v) << 1) & BM_PXP_IRQ_MASK_FIRST_CH1_PREFETCH_IRQ_EN)
+#define BM_PXP_IRQ_MASK_FIRST_CH0_PREFETCH_IRQ_EN 0x00000001
+#define BF_PXP_IRQ_MASK_FIRST_CH0_PREFETCH_IRQ_EN(v)  \
+        (((v) << 0) & BM_PXP_IRQ_MASK_FIRST_CH0_PREFETCH_IRQ_EN)
+
+#define HW_PXP_IRQ     (0x000003a0)
+#define HW_PXP_IRQ_SET (0x000003a4)
+#define HW_PXP_IRQ_CLR (0x000003a8)
+#define HW_PXP_IRQ_TOG (0x000003ac)
+
+#define BM_PXP_IRQ_COMPRESS_DONE_IRQ 0x80000000
+#define BF_PXP_IRQ_COMPRESS_DONE_IRQ(v) \
+        (((v) << 31) & BM_PXP_IRQ_COMPRESS_DONE_IRQ)
+#define BP_PXP_IRQ_RSVD1      16
+#define BM_PXP_IRQ_RSVD1 0x7FFF0000
+#define BF_PXP_IRQ_RSVD1(v)  \
+        (((v) << 16) & BM_PXP_IRQ_RSVD1)
+#define BM_PXP_IRQ_WFE_B_STORE_IRQ 0x00008000
+#define BF_PXP_IRQ_WFE_B_STORE_IRQ(v)  \
+        (((v) << 15) & BM_PXP_IRQ_WFE_B_STORE_IRQ)
+#define BM_PXP_IRQ_WFE_A_STORE_IRQ 0x00004000
+#define BF_PXP_IRQ_WFE_A_STORE_IRQ(v)  \
+        (((v) << 14) & BM_PXP_IRQ_WFE_A_STORE_IRQ)
+#define BM_PXP_IRQ_DITHER_STORE_IRQ 0x00002000
+#define BF_PXP_IRQ_DITHER_STORE_IRQ(v)  \
+        (((v) << 13) & BM_PXP_IRQ_DITHER_STORE_IRQ)
+#define BM_PXP_IRQ_FIRST_STORE_IRQ 0x00001000
+#define BF_PXP_IRQ_FIRST_STORE_IRQ(v)  \
+        (((v) << 12) & BM_PXP_IRQ_FIRST_STORE_IRQ)
+#define BM_PXP_IRQ_WFE_B_CH1_STORE_IRQ 0x00000800
+#define BF_PXP_IRQ_WFE_B_CH1_STORE_IRQ(v)  \
+        (((v) << 11) & BM_PXP_IRQ_WFE_B_CH1_STORE_IRQ)
+#define BM_PXP_IRQ_WFE_B_CH0_STORE_IRQ 0x00000400
+#define BF_PXP_IRQ_WFE_B_CH0_STORE_IRQ(v)  \
+        (((v) << 10) & BM_PXP_IRQ_WFE_B_CH0_STORE_IRQ)
+#define BM_PXP_IRQ_WFE_A_CH1_STORE_IRQ 0x00000200
+#define BF_PXP_IRQ_WFE_A_CH1_STORE_IRQ(v)  \
+        (((v) << 9) & BM_PXP_IRQ_WFE_A_CH1_STORE_IRQ)
+#define BM_PXP_IRQ_WFE_A_CH0_STORE_IRQ 0x00000100
+#define BF_PXP_IRQ_WFE_A_CH0_STORE_IRQ(v)  \
+        (((v) << 8) & BM_PXP_IRQ_WFE_A_CH0_STORE_IRQ)
+#define BM_PXP_IRQ_DITHER_CH1_STORE_IRQ 0x00000080
+#define BF_PXP_IRQ_DITHER_CH1_STORE_IRQ(v)  \
+        (((v) << 7) & BM_PXP_IRQ_DITHER_CH1_STORE_IRQ)
+#define BM_PXP_IRQ_DITHER_CH0_STORE_IRQ 0x00000040
+#define BF_PXP_IRQ_DITHER_CH0_STORE_IRQ(v)  \
+        (((v) << 6) & BM_PXP_IRQ_DITHER_CH0_STORE_IRQ)
+#define BM_PXP_IRQ_DITHER_CH1_PREFETCH_IRQ 0x00000020
+#define BF_PXP_IRQ_DITHER_CH1_PREFETCH_IRQ(v)  \
+        (((v) << 5) & BM_PXP_IRQ_DITHER_CH1_PREFETCH_IRQ)
+#define BM_PXP_IRQ_DITHER_CH0_PREFETCH_IRQ 0x00000010
+#define BF_PXP_IRQ_DITHER_CH0_PREFETCH_IRQ(v)  \
+        (((v) << 4) & BM_PXP_IRQ_DITHER_CH0_PREFETCH_IRQ)
+#define BM_PXP_IRQ_FIRST_CH1_STORE_IRQ 0x00000008
+#define BF_PXP_IRQ_FIRST_CH1_STORE_IRQ(v)  \
+        (((v) << 3) & BM_PXP_IRQ_FIRST_CH1_STORE_IRQ)
+#define BM_PXP_IRQ_FIRST_CH0_STORE_IRQ 0x00000004
+#define BF_PXP_IRQ_FIRST_CH0_STORE_IRQ(v)  \
+        (((v) << 2) & BM_PXP_IRQ_FIRST_CH0_STORE_IRQ)
+#define BM_PXP_IRQ_FIRST_CH1_PREFETCH_IRQ 0x00000002
+#define BF_PXP_IRQ_FIRST_CH1_PREFETCH_IRQ(v)  \
+        (((v) << 1) & BM_PXP_IRQ_FIRST_CH1_PREFETCH_IRQ)
+#define BM_PXP_IRQ_FIRST_CH0_PREFETCH_IRQ 0x00000001
+#define BF_PXP_IRQ_FIRST_CH0_PREFETCH_IRQ(v)  \
+        (((v) << 0) & BM_PXP_IRQ_FIRST_CH0_PREFETCH_IRQ)
+
+#define HW_PXP_NEXT    (0x00000400)
+
+#define BP_PXP_NEXT_POINTER      2
+#define BM_PXP_NEXT_POINTER 0xFFFFFFFC
+#define BF_PXP_NEXT_POINTER(v) \
+        (((v) << 2) & BM_PXP_NEXT_POINTER)
+#define BM_PXP_NEXT_RSVD 0x00000002
+#define BF_PXP_NEXT_RSVD(v)  \
+        (((v) << 1) & BM_PXP_NEXT_RSVD)
+#define BM_PXP_NEXT_ENABLED 0x00000001
+#define BF_PXP_NEXT_ENABLED(v)  \
+        (((v) << 0) & BM_PXP_NEXT_ENABLED)
+
+#define HW_PXP_DEBUGCTRL       (0x00000410)
+
+#define BP_PXP_DEBUGCTRL_RSVD      12
+#define BM_PXP_DEBUGCTRL_RSVD 0xFFFFF000
+#define BF_PXP_DEBUGCTRL_RSVD(v) \
+        (((v) << 12) & BM_PXP_DEBUGCTRL_RSVD)
+#define BP_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT      8
+#define BM_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT 0x00000F00
+#define BF_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT(v)  \
+        (((v) << 8) & BM_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT)
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__NONE     0x0
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__MISS_CNT 0x1
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__HIT_CNT  0x2
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__LAT_CNT  0x4
+#define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__MAX_LAT  0x8
+#define BP_PXP_DEBUGCTRL_SELECT      0
+#define BM_PXP_DEBUGCTRL_SELECT 0x000000FF
+#define BF_PXP_DEBUGCTRL_SELECT(v)  \
+        (((v) << 0) & BM_PXP_DEBUGCTRL_SELECT)
+#define BV_PXP_DEBUGCTRL_SELECT__NONE        0x0
+#define BV_PXP_DEBUGCTRL_SELECT__CTRL        0x1
+#define BV_PXP_DEBUGCTRL_SELECT__PSBUF       0x2
+#define BV_PXP_DEBUGCTRL_SELECT__PSBAX       0x3
+#define BV_PXP_DEBUGCTRL_SELECT__PSBAY       0x4
+#define BV_PXP_DEBUGCTRL_SELECT__ASBUF       0x5
+#define BV_PXP_DEBUGCTRL_SELECT__ROTATION    0x6
+#define BV_PXP_DEBUGCTRL_SELECT__OUTBUF0     0x7
+#define BV_PXP_DEBUGCTRL_SELECT__OUTBUF1     0x8
+#define BV_PXP_DEBUGCTRL_SELECT__OUTBUF2     0x9
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_STAT    0x10
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_MISS    0x11
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_HIT     0x12
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_LAT     0x13
+#define BV_PXP_DEBUGCTRL_SELECT__LUT_MAX_LAT 0x14
+
+#define HW_PXP_DEBUG   (0x00000420)
+
+#define BP_PXP_DEBUG_DATA      0
+#define BM_PXP_DEBUG_DATA 0xFFFFFFFF
+#define BF_PXP_DEBUG_DATA(v)   (v)
+
+#define HW_PXP_VERSION (0x00000430)
+
+#define BP_PXP_VERSION_MAJOR      24
+#define BM_PXP_VERSION_MAJOR 0xFF000000
+#define BF_PXP_VERSION_MAJOR(v) \
+        (((v) << 24) & BM_PXP_VERSION_MAJOR)
+#define BP_PXP_VERSION_MINOR      16
+#define BM_PXP_VERSION_MINOR 0x00FF0000
+#define BF_PXP_VERSION_MINOR(v)  \
+        (((v) << 16) & BM_PXP_VERSION_MINOR)
+#define BP_PXP_VERSION_STEP      0
+#define BM_PXP_VERSION_STEP 0x0000FFFF
+#define BF_PXP_VERSION_STEP(v)  \
+        (((v) << 0) & BM_PXP_VERSION_STEP)
+
+#define HW_PXP_INPUT_FETCH_CTRL_CH0    (0x00000450)
+#define HW_PXP_INPUT_FETCH_CTRL_CH0_SET        (0x00000454)
+#define HW_PXP_INPUT_FETCH_CTRL_CH0_CLR        (0x00000458)
+#define HW_PXP_INPUT_FETCH_CTRL_CH0_TOG        (0x0000045c)
+
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_ARBIT_EN 0x80000000
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_ARBIT_EN(v) \
+        (((v) << 31) & BM_PXP_INPUT_FETCH_CTRL_CH0_ARBIT_EN)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_ARBIT_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_ARBIT_EN__1 0x1
+#define BP_PXP_INPUT_FETCH_CTRL_CH0_RSVD0      26
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD0 0x7C000000
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_RSVD0(v)  \
+        (((v) << 26) & BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD0)
+#define BP_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM      24
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM 0x03000000
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM(v)  \
+        (((v) << 24) & BM_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM__1 0x1
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM__2 0x2
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM__3 0x3
+#define BP_PXP_INPUT_FETCH_CTRL_CH0_RSVD1      18
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD1 0x00FC0000
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_RSVD1(v)  \
+        (((v) << 18) & BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD1)
+#define BP_PXP_INPUT_FETCH_CTRL_CH0_RD_NUM_BYTES      16
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_RD_NUM_BYTES 0x00030000
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_RD_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_CTRL_CH0_RD_NUM_BYTES)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_RD_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_RD_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_RD_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_RD_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_INPUT_FETCH_CTRL_CH0_RSVD2      14
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD2 0x0000C000
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD2)
+#define BP_PXP_INPUT_FETCH_CTRL_CH0_ROTATION_ANGLE      12
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_ROTATION_ANGLE 0x00003000
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_ROTATION_ANGLE(v)  \
+        (((v) << 12) & BM_PXP_INPUT_FETCH_CTRL_CH0_ROTATION_ANGLE)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_ROTATION_ANGLE__ROT_0   0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_ROTATION_ANGLE__ROT_90  0x1
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_ROTATION_ANGLE__ROT_180 0x2
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_ROTATION_ANGLE__ROT_270 0x3
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD3 0x00000800
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_RSVD3(v)  \
+        (((v) << 11) & BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD3)
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_VFLIP 0x00000400
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_VFLIP(v)  \
+        (((v) << 10) & BM_PXP_INPUT_FETCH_CTRL_CH0_VFLIP)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_VFLIP__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_VFLIP__1 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_HFLIP 0x00000200
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_HFLIP(v)  \
+        (((v) << 9) & BM_PXP_INPUT_FETCH_CTRL_CH0_HFLIP)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HFLIP__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HFLIP__1 0x1
+#define BP_PXP_INPUT_FETCH_CTRL_CH0_RSVD4      6
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD4 0x000001C0
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_RSVD4(v)  \
+        (((v) << 6) & BM_PXP_INPUT_FETCH_CTRL_CH0_RSVD4)
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_HIGH_BYTE 0x00000020
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_HIGH_BYTE(v)  \
+        (((v) << 5) & BM_PXP_INPUT_FETCH_CTRL_CH0_HIGH_BYTE)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HIGH_BYTE__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HIGH_BYTE__1 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_BYPASS_PIXEL_EN 0x00000010
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_BYPASS_PIXEL_EN(v)  \
+        (((v) << 4) & BM_PXP_INPUT_FETCH_CTRL_CH0_BYPASS_PIXEL_EN)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_BYPASS_PIXEL_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_BYPASS_PIXEL_EN__1 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_EN 0x00000008
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_EN)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_HANDSHAKE_EN__1 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_16 0x00000004
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_16)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_16__8x8   0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_16__16x16 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_EN 0x00000002
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_EN)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_BLOCK_EN__1 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH0_CH_EN 0x00000001
+#define BF_PXP_INPUT_FETCH_CTRL_CH0_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_CTRL_CH0_CH_EN)
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_CH_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH0_CH_EN__1 0x1
+
+#define HW_PXP_INPUT_FETCH_CTRL_CH1    (0x00000460)
+#define HW_PXP_INPUT_FETCH_CTRL_CH1_SET        (0x00000464)
+#define HW_PXP_INPUT_FETCH_CTRL_CH1_CLR        (0x00000468)
+#define HW_PXP_INPUT_FETCH_CTRL_CH1_TOG        (0x0000046c)
+
+#define BP_PXP_INPUT_FETCH_CTRL_CH1_RSVD0      26
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD0 0xFC000000
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_RSVD0(v) \
+        (((v) << 26) & BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD0)
+#define BP_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM      24
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM 0x03000000
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM(v)  \
+        (((v) << 24) & BM_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM__1 0x1
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM__2 0x2
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM__3 0x3
+#define BP_PXP_INPUT_FETCH_CTRL_CH1_RSVD1      18
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD1 0x00FC0000
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_RSVD1(v)  \
+        (((v) << 18) & BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD1)
+#define BP_PXP_INPUT_FETCH_CTRL_CH1_RD_NUM_BYTES      16
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_RD_NUM_BYTES 0x00030000
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_RD_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_CTRL_CH1_RD_NUM_BYTES)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_RD_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_RD_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_RD_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_RD_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_INPUT_FETCH_CTRL_CH1_RSVD2      14
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD2 0x0000C000
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD2)
+#define BP_PXP_INPUT_FETCH_CTRL_CH1_ROTATION_ANGLE      12
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_ROTATION_ANGLE 0x00003000
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_ROTATION_ANGLE(v)  \
+        (((v) << 12) & BM_PXP_INPUT_FETCH_CTRL_CH1_ROTATION_ANGLE)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_ROTATION_ANGLE__ROT_0   0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_ROTATION_ANGLE__ROT_90  0x1
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_ROTATION_ANGLE__ROT_180 0x2
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_ROTATION_ANGLE__ROT_270 0x3
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD3 0x00000800
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_RSVD3(v)  \
+        (((v) << 11) & BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD3)
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_VFLIP 0x00000400
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_VFLIP(v)  \
+        (((v) << 10) & BM_PXP_INPUT_FETCH_CTRL_CH1_VFLIP)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_VFLIP__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_VFLIP__1 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_HFLIP 0x00000200
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_HFLIP(v)  \
+        (((v) << 9) & BM_PXP_INPUT_FETCH_CTRL_CH1_HFLIP)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_HFLIP__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_HFLIP__1 0x1
+#define BP_PXP_INPUT_FETCH_CTRL_CH1_RSVD4      5
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD4 0x000001E0
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_RSVD4(v)  \
+        (((v) << 5) & BM_PXP_INPUT_FETCH_CTRL_CH1_RSVD4)
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_BYPASS_PIXEL_EN 0x00000010
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_BYPASS_PIXEL_EN(v)  \
+        (((v) << 4) & BM_PXP_INPUT_FETCH_CTRL_CH1_BYPASS_PIXEL_EN)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_BYPASS_PIXEL_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_BYPASS_PIXEL_EN__1 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_EN 0x00000008
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_EN)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_HANDSHAKE_EN__1 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_16 0x00000004
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_16)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_16__8x8   0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_16__16x16 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_EN 0x00000002
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_EN)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_BLOCK_EN__1 0x1
+#define BM_PXP_INPUT_FETCH_CTRL_CH1_CH_EN 0x00000001
+#define BF_PXP_INPUT_FETCH_CTRL_CH1_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_CTRL_CH1_CH_EN)
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_CH_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_CTRL_CH1_CH_EN__1 0x1
+
+#define HW_PXP_INPUT_FETCH_STATUS_CH0  (0x00000470)
+
+#define BP_PXP_INPUT_FETCH_STATUS_CH0_PREFETCH_BLOCK_Y      16
+#define BM_PXP_INPUT_FETCH_STATUS_CH0_PREFETCH_BLOCK_Y 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_STATUS_CH0_PREFETCH_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_STATUS_CH0_PREFETCH_BLOCK_Y)
+#define BP_PXP_INPUT_FETCH_STATUS_CH0_PREFETCH_BLOCK_X      0
+#define BM_PXP_INPUT_FETCH_STATUS_CH0_PREFETCH_BLOCK_X 0x0000FFFF
+#define BF_PXP_INPUT_FETCH_STATUS_CH0_PREFETCH_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_STATUS_CH0_PREFETCH_BLOCK_X)
+
+#define HW_PXP_INPUT_FETCH_STATUS_CH1  (0x00000480)
+
+#define BP_PXP_INPUT_FETCH_STATUS_CH1_PREFETCH_BLOCK_Y      16
+#define BM_PXP_INPUT_FETCH_STATUS_CH1_PREFETCH_BLOCK_Y 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_STATUS_CH1_PREFETCH_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_STATUS_CH1_PREFETCH_BLOCK_Y)
+#define BP_PXP_INPUT_FETCH_STATUS_CH1_PREFETCH_BLOCK_X      0
+#define BM_PXP_INPUT_FETCH_STATUS_CH1_PREFETCH_BLOCK_X 0x0000FFFF
+#define BF_PXP_INPUT_FETCH_STATUS_CH1_PREFETCH_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_STATUS_CH1_PREFETCH_BLOCK_X)
+
+#define HW_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0 (0x00000490)
+
+#define BP_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_Y      16
+#define BM_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_Y 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_Y(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_Y)
+#define BP_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_X      0
+#define BM_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_X 0x0000FFFF
+#define BF_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_X(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_X)
+
+#define HW_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0 (0x000004a0)
+
+#define BP_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_Y      16
+#define BM_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_Y 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_Y(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_Y)
+#define BP_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_X      0
+#define BM_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_X 0x0000FFFF
+#define BF_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_X(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_X)
+
+#define HW_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1 (0x000004b0)
+
+#define BP_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_Y      16
+#define BM_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_Y 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_Y(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_Y)
+#define BP_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_X      0
+#define BM_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_X 0x0000FFFF
+#define BF_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_X(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_X)
+
+#define HW_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1 (0x000004c0)
+
+#define BP_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_Y      16
+#define BM_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_Y 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_Y(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_Y)
+#define BP_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_X      0
+#define BM_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_X 0x0000FFFF
+#define BF_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_X(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_X)
+
+#define HW_PXP_INPUT_FETCH_SIZE_CH0    (0x000004d0)
+
+#define BP_PXP_INPUT_FETCH_SIZE_CH0_INPUT_TOTAL_HEIGHT      16
+#define BM_PXP_INPUT_FETCH_SIZE_CH0_INPUT_TOTAL_HEIGHT 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_SIZE_CH0_INPUT_TOTAL_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_SIZE_CH0_INPUT_TOTAL_HEIGHT)
+#define BP_PXP_INPUT_FETCH_SIZE_CH0_INPUT_TOTAL_WIDTH      0
+#define BM_PXP_INPUT_FETCH_SIZE_CH0_INPUT_TOTAL_WIDTH 0x0000FFFF
+#define BF_PXP_INPUT_FETCH_SIZE_CH0_INPUT_TOTAL_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_SIZE_CH0_INPUT_TOTAL_WIDTH)
+
+#define HW_PXP_INPUT_FETCH_SIZE_CH1    (0x000004e0)
+
+#define BP_PXP_INPUT_FETCH_SIZE_CH1_INPUT_TOTAL_HEIGHT      16
+#define BM_PXP_INPUT_FETCH_SIZE_CH1_INPUT_TOTAL_HEIGHT 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_SIZE_CH1_INPUT_TOTAL_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_SIZE_CH1_INPUT_TOTAL_HEIGHT)
+#define BP_PXP_INPUT_FETCH_SIZE_CH1_INPUT_TOTAL_WIDTH      0
+#define BM_PXP_INPUT_FETCH_SIZE_CH1_INPUT_TOTAL_WIDTH 0x0000FFFF
+#define BF_PXP_INPUT_FETCH_SIZE_CH1_INPUT_TOTAL_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_SIZE_CH1_INPUT_TOTAL_WIDTH)
+
+#define HW_PXP_INPUT_FETCH_BACKGROUND_COLOR_CH0        (0x000004f0)
+
+#define BP_PXP_INPUT_FETCH_BACKGROUND_COLOR_CH0_BACKGROUND_COLOR      0
+#define BM_PXP_INPUT_FETCH_BACKGROUND_COLOR_CH0_BACKGROUND_COLOR 0xFFFFFFFF
+#define BF_PXP_INPUT_FETCH_BACKGROUND_COLOR_CH0_BACKGROUND_COLOR(v)   (v)
+
+#define HW_PXP_INPUT_FETCH_BACKGROUND_COLOR_CH1        (0x00000500)
+
+#define BP_PXP_INPUT_FETCH_BACKGROUND_COLOR_CH1_BACKGROUND_COLOR      0
+#define BM_PXP_INPUT_FETCH_BACKGROUND_COLOR_CH1_BACKGROUND_COLOR 0xFFFFFFFF
+#define BF_PXP_INPUT_FETCH_BACKGROUND_COLOR_CH1_BACKGROUND_COLOR(v)   (v)
+
+#define HW_PXP_INPUT_FETCH_PITCH       (0x00000510)
+
+#define BP_PXP_INPUT_FETCH_PITCH_CH1_INPUT_PITCH      16
+#define BM_PXP_INPUT_FETCH_PITCH_CH1_INPUT_PITCH 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_PITCH_CH1_INPUT_PITCH(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_PITCH_CH1_INPUT_PITCH)
+#define BP_PXP_INPUT_FETCH_PITCH_CH0_INPUT_PITCH      0
+#define BM_PXP_INPUT_FETCH_PITCH_CH0_INPUT_PITCH 0x0000FFFF
+#define BF_PXP_INPUT_FETCH_PITCH_CH0_INPUT_PITCH(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_PITCH_CH0_INPUT_PITCH)
+
+#define HW_PXP_INPUT_FETCH_SHIFT_CTRL_CH0      (0x00000520)
+#define HW_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_SET  (0x00000524)
+#define HW_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_CLR  (0x00000528)
+#define HW_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_TOG  (0x0000052c)
+
+#define BP_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_RSVD0      13
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_RSVD0 0xFFFFE000
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_RSVD0(v) \
+        (((v) << 13) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_RSVD0)
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS 0x00001000
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS(v)  \
+        (((v) << 12) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS)
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS__0 0x0
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS__1 0x1
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_EN 0x00000800
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_EN(v)  \
+        (((v) << 11) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_EN)
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_EN__1 0x1
+#define BP_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT      8
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT 0x00000700
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT(v)  \
+        (((v) << 8) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT)
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__0 0x0
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__1 0x1
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__2 0x2
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__3 0x3
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__4 0x4
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__5 0x5
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__6 0x6
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__7 0x7
+#define BP_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_RSVD1      2
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_RSVD1 0x000000FC
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_RSVD1(v)  \
+        (((v) << 2) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_RSVD1)
+#define BP_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP      0
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP 0x00000003
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP)
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP__3 0x3
+
+#define HW_PXP_INPUT_FETCH_SHIFT_CTRL_CH1      (0x00000530)
+#define HW_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_SET  (0x00000534)
+#define HW_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_CLR  (0x00000538)
+#define HW_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_TOG  (0x0000053c)
+
+#define BP_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_RSVD0      13
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_RSVD0 0xFFFFE000
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_RSVD0(v) \
+        (((v) << 13) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_RSVD0)
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS 0x00001000
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS(v)  \
+        (((v) << 12) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS)
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS__0 0x0
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS__1 0x1
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_EN 0x00000800
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_EN(v)  \
+        (((v) << 11) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_EN)
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_EN__0 0x0
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_EN__1 0x1
+#define BP_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT      8
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT 0x00000700
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT(v)  \
+        (((v) << 8) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT)
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__0 0x0
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__1 0x1
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__2 0x2
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__3 0x3
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__4 0x4
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__5 0x5
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__6 0x6
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__7 0x7
+#define BP_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_RSVD1      2
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_RSVD1 0x000000FC
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_RSVD1(v)  \
+        (((v) << 2) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_RSVD1)
+#define BP_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP      0
+#define BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP 0x00000003
+#define BF_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP)
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_INPUT_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP__3 0x3
+
+#define HW_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0    (0x00000540)
+#define HW_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_SET        (0x00000544)
+#define HW_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_CLR        (0x00000548)
+#define HW_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_TOG        (0x0000054c)
+
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD0      29
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD0 0xE0000000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD0(v) \
+        (((v) << 29) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD0)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET3      24
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET3 0x1F000000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET3(v)  \
+        (((v) << 24) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET3)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD1      21
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD1 0x00E00000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD1(v)  \
+        (((v) << 21) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD1)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET2      16
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET2 0x001F0000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET2(v)  \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET2)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD2      13
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD2 0x0000E000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD2(v)  \
+        (((v) << 13) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD2)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET1      8
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET1 0x00001F00
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET1(v)  \
+        (((v) << 8) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET1)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD3      5
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD3 0x000000E0
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD3(v)  \
+        (((v) << 5) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_RSVD3)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET0      0
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET0 0x0000001F
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET0(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH0_OFFSET0)
+
+#define HW_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1    (0x00000550)
+#define HW_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_SET        (0x00000554)
+#define HW_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_CLR        (0x00000558)
+#define HW_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_TOG        (0x0000055c)
+
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD0      29
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD0 0xE0000000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD0(v) \
+        (((v) << 29) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD0)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET3      24
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET3 0x1F000000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET3(v)  \
+        (((v) << 24) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET3)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD1      21
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD1 0x00E00000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD1(v)  \
+        (((v) << 21) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD1)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET2      16
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET2 0x001F0000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET2(v)  \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET2)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD2      13
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD2 0x0000E000
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD2(v)  \
+        (((v) << 13) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD2)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET1      8
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET1 0x00001F00
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET1(v)  \
+        (((v) << 8) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET1)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD3      5
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD3 0x000000E0
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD3(v)  \
+        (((v) << 5) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_RSVD3)
+#define BP_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET0      0
+#define BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET0 0x0000001F
+#define BF_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET0(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_SHIFT_OFFSET_CH1_OFFSET0)
+
+#define HW_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0     (0x00000560)
+#define HW_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_SET (0x00000564)
+#define HW_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_CLR (0x00000568)
+#define HW_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_TOG (0x0000056c)
+
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_RSVD0      16
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_RSVD0 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_RSVD0(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_RSVD0)
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH3      12
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH3 0x0000F000
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH3(v)  \
+        (((v) << 12) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH3)
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH2      8
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH2 0x00000F00
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH2(v)  \
+        (((v) << 8) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH2)
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH1      4
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH1 0x000000F0
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH1(v)  \
+        (((v) << 4) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH1)
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH0      0
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH0 0x0000000F
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH0_WIDTH0)
+
+#define HW_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1     (0x00000570)
+#define HW_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_SET (0x00000574)
+#define HW_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_CLR (0x00000578)
+#define HW_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_TOG (0x0000057c)
+
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_RSVD0      16
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_RSVD0 0xFFFF0000
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_RSVD0(v) \
+        (((v) << 16) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_RSVD0)
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH3      12
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH3 0x0000F000
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH3(v)  \
+        (((v) << 12) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH3)
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH2      8
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH2 0x00000F00
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH2(v)  \
+        (((v) << 8) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH2)
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH1      4
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH1 0x000000F0
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH1(v)  \
+        (((v) << 4) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH1)
+#define BP_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH0      0
+#define BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH0 0x0000000F
+#define BF_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_INPUT_FETCH_SHIFT_WIDTH_CH1_WIDTH0)
+
+#define HW_PXP_INPUT_FETCH_ADDR_0_CH0  (0x00000580)
+
+#define BP_PXP_INPUT_FETCH_ADDR_0_CH0_INPUT_BASE_ADDR0      0
+#define BM_PXP_INPUT_FETCH_ADDR_0_CH0_INPUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_INPUT_FETCH_ADDR_0_CH0_INPUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_INPUT_FETCH_ADDR_1_CH0  (0x00000590)
+
+#define BP_PXP_INPUT_FETCH_ADDR_1_CH0_INPUT_BASE_ADDR1      0
+#define BM_PXP_INPUT_FETCH_ADDR_1_CH0_INPUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_INPUT_FETCH_ADDR_1_CH0_INPUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_INPUT_FETCH_ADDR_0_CH1  (0x000005a0)
+
+#define BP_PXP_INPUT_FETCH_ADDR_0_CH1_INPUT_BASE_ADDR0      0
+#define BM_PXP_INPUT_FETCH_ADDR_0_CH1_INPUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_INPUT_FETCH_ADDR_0_CH1_INPUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_INPUT_FETCH_ADDR_1_CH1  (0x000005b0)
+
+#define BP_PXP_INPUT_FETCH_ADDR_1_CH1_INPUT_BASE_ADDR1      0
+#define BM_PXP_INPUT_FETCH_ADDR_1_CH1_INPUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_INPUT_FETCH_ADDR_1_CH1_INPUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_INPUT_STORE_CTRL_CH0    (0x000005c0)
+#define HW_PXP_INPUT_STORE_CTRL_CH0_SET        (0x000005c4)
+#define HW_PXP_INPUT_STORE_CTRL_CH0_CLR        (0x000005c8)
+#define HW_PXP_INPUT_STORE_CTRL_CH0_TOG        (0x000005cc)
+
+#define BM_PXP_INPUT_STORE_CTRL_CH0_ARBIT_EN 0x80000000
+#define BF_PXP_INPUT_STORE_CTRL_CH0_ARBIT_EN(v) \
+        (((v) << 31) & BM_PXP_INPUT_STORE_CTRL_CH0_ARBIT_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_ARBIT_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_ARBIT_EN__1 0x1
+#define BP_PXP_INPUT_STORE_CTRL_CH0_RSVD0      25
+#define BM_PXP_INPUT_STORE_CTRL_CH0_RSVD0 0x7E000000
+#define BF_PXP_INPUT_STORE_CTRL_CH0_RSVD0(v)  \
+        (((v) << 25) & BM_PXP_INPUT_STORE_CTRL_CH0_RSVD0)
+#define BM_PXP_INPUT_STORE_CTRL_CH0_COMBINE_2CHANNEL 0x01000000
+#define BF_PXP_INPUT_STORE_CTRL_CH0_COMBINE_2CHANNEL(v)  \
+        (((v) << 24) & BM_PXP_INPUT_STORE_CTRL_CH0_COMBINE_2CHANNEL)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_COMBINE_2CHANNEL__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_COMBINE_2CHANNEL__1 0x1
+#define BP_PXP_INPUT_STORE_CTRL_CH0_RSVD1      18
+#define BM_PXP_INPUT_STORE_CTRL_CH0_RSVD1 0x00FC0000
+#define BF_PXP_INPUT_STORE_CTRL_CH0_RSVD1(v)  \
+        (((v) << 18) & BM_PXP_INPUT_STORE_CTRL_CH0_RSVD1)
+#define BP_PXP_INPUT_STORE_CTRL_CH0_WR_NUM_BYTES      16
+#define BM_PXP_INPUT_STORE_CTRL_CH0_WR_NUM_BYTES 0x00030000
+#define BF_PXP_INPUT_STORE_CTRL_CH0_WR_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_INPUT_STORE_CTRL_CH0_WR_NUM_BYTES)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_WR_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_WR_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_INPUT_STORE_CTRL_CH0_WR_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_INPUT_STORE_CTRL_CH0_WR_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_INPUT_STORE_CTRL_CH0_RSVD2      12
+#define BM_PXP_INPUT_STORE_CTRL_CH0_RSVD2 0x0000F000
+#define BF_PXP_INPUT_STORE_CTRL_CH0_RSVD2(v)  \
+        (((v) << 12) & BM_PXP_INPUT_STORE_CTRL_CH0_RSVD2)
+#define BM_PXP_INPUT_STORE_CTRL_CH0_FILL_DATA_EN 0x00000800
+#define BF_PXP_INPUT_STORE_CTRL_CH0_FILL_DATA_EN(v)  \
+        (((v) << 11) & BM_PXP_INPUT_STORE_CTRL_CH0_FILL_DATA_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_FILL_DATA_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_FILL_DATA_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH0_PACK_IN_SEL 0x00000400
+#define BF_PXP_INPUT_STORE_CTRL_CH0_PACK_IN_SEL(v)  \
+        (((v) << 10) & BM_PXP_INPUT_STORE_CTRL_CH0_PACK_IN_SEL)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_PACK_IN_SEL__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_PACK_IN_SEL__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH0_STORE_MEMORY_EN 0x00000200
+#define BF_PXP_INPUT_STORE_CTRL_CH0_STORE_MEMORY_EN(v)  \
+        (((v) << 9) & BM_PXP_INPUT_STORE_CTRL_CH0_STORE_MEMORY_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_STORE_MEMORY_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_STORE_MEMORY_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH0_STORE_BYPASS_EN 0x00000100
+#define BF_PXP_INPUT_STORE_CTRL_CH0_STORE_BYPASS_EN(v)  \
+        (((v) << 8) & BM_PXP_INPUT_STORE_CTRL_CH0_STORE_BYPASS_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_STORE_BYPASS_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_STORE_BYPASS_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH0_RSVD3 0x00000080
+#define BF_PXP_INPUT_STORE_CTRL_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_INPUT_STORE_CTRL_CH0_RSVD3)
+#define BP_PXP_INPUT_STORE_CTRL_CH0_ARRAY_LINE_NUM      5
+#define BM_PXP_INPUT_STORE_CTRL_CH0_ARRAY_LINE_NUM 0x00000060
+#define BF_PXP_INPUT_STORE_CTRL_CH0_ARRAY_LINE_NUM(v)  \
+        (((v) << 5) & BM_PXP_INPUT_STORE_CTRL_CH0_ARRAY_LINE_NUM)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_ARRAY_LINE_NUM__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_ARRAY_LINE_NUM__1 0x1
+#define BV_PXP_INPUT_STORE_CTRL_CH0_ARRAY_LINE_NUM__2 0x2
+#define BV_PXP_INPUT_STORE_CTRL_CH0_ARRAY_LINE_NUM__3 0x3
+#define BM_PXP_INPUT_STORE_CTRL_CH0_ARRAY_EN 0x00000010
+#define BF_PXP_INPUT_STORE_CTRL_CH0_ARRAY_EN(v)  \
+        (((v) << 4) & BM_PXP_INPUT_STORE_CTRL_CH0_ARRAY_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_ARRAY_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_ARRAY_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH0_HANDSHAKE_EN 0x00000008
+#define BF_PXP_INPUT_STORE_CTRL_CH0_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_INPUT_STORE_CTRL_CH0_HANDSHAKE_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_HANDSHAKE_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_HANDSHAKE_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH0_BLOCK_16 0x00000004
+#define BF_PXP_INPUT_STORE_CTRL_CH0_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_INPUT_STORE_CTRL_CH0_BLOCK_16)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_BLOCK_16__8x8   0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_BLOCK_16__16x16 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH0_BLOCK_EN 0x00000002
+#define BF_PXP_INPUT_STORE_CTRL_CH0_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_INPUT_STORE_CTRL_CH0_BLOCK_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_BLOCK_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_BLOCK_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH0_CH_EN 0x00000001
+#define BF_PXP_INPUT_STORE_CTRL_CH0_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_CTRL_CH0_CH_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH0_CH_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH0_CH_EN__1 0x1
+
+#define HW_PXP_INPUT_STORE_CTRL_CH1    (0x000005d0)
+#define HW_PXP_INPUT_STORE_CTRL_CH1_SET        (0x000005d4)
+#define HW_PXP_INPUT_STORE_CTRL_CH1_CLR        (0x000005d8)
+#define HW_PXP_INPUT_STORE_CTRL_CH1_TOG        (0x000005dc)
+
+#define BP_PXP_INPUT_STORE_CTRL_CH1_RSVD0      18
+#define BM_PXP_INPUT_STORE_CTRL_CH1_RSVD0 0xFFFC0000
+#define BF_PXP_INPUT_STORE_CTRL_CH1_RSVD0(v) \
+        (((v) << 18) & BM_PXP_INPUT_STORE_CTRL_CH1_RSVD0)
+#define BP_PXP_INPUT_STORE_CTRL_CH1_WR_NUM_BYTES      16
+#define BM_PXP_INPUT_STORE_CTRL_CH1_WR_NUM_BYTES 0x00030000
+#define BF_PXP_INPUT_STORE_CTRL_CH1_WR_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_INPUT_STORE_CTRL_CH1_WR_NUM_BYTES)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_WR_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_WR_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_INPUT_STORE_CTRL_CH1_WR_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_INPUT_STORE_CTRL_CH1_WR_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_INPUT_STORE_CTRL_CH1_RSVD1      11
+#define BM_PXP_INPUT_STORE_CTRL_CH1_RSVD1 0x0000F800
+#define BF_PXP_INPUT_STORE_CTRL_CH1_RSVD1(v)  \
+        (((v) << 11) & BM_PXP_INPUT_STORE_CTRL_CH1_RSVD1)
+#define BM_PXP_INPUT_STORE_CTRL_CH1_PACK_IN_SEL 0x00000400
+#define BF_PXP_INPUT_STORE_CTRL_CH1_PACK_IN_SEL(v)  \
+        (((v) << 10) & BM_PXP_INPUT_STORE_CTRL_CH1_PACK_IN_SEL)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_PACK_IN_SEL__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_PACK_IN_SEL__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH1_STORE_MEMORY_EN 0x00000200
+#define BF_PXP_INPUT_STORE_CTRL_CH1_STORE_MEMORY_EN(v)  \
+        (((v) << 9) & BM_PXP_INPUT_STORE_CTRL_CH1_STORE_MEMORY_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_STORE_MEMORY_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_STORE_MEMORY_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH1_STORE_BYPASS_EN 0x00000100
+#define BF_PXP_INPUT_STORE_CTRL_CH1_STORE_BYPASS_EN(v)  \
+        (((v) << 8) & BM_PXP_INPUT_STORE_CTRL_CH1_STORE_BYPASS_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_STORE_BYPASS_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_STORE_BYPASS_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH1_RSVD3 0x00000080
+#define BF_PXP_INPUT_STORE_CTRL_CH1_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_INPUT_STORE_CTRL_CH1_RSVD3)
+#define BP_PXP_INPUT_STORE_CTRL_CH1_ARRAY_LINE_NUM      5
+#define BM_PXP_INPUT_STORE_CTRL_CH1_ARRAY_LINE_NUM 0x00000060
+#define BF_PXP_INPUT_STORE_CTRL_CH1_ARRAY_LINE_NUM(v)  \
+        (((v) << 5) & BM_PXP_INPUT_STORE_CTRL_CH1_ARRAY_LINE_NUM)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_ARRAY_LINE_NUM__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_ARRAY_LINE_NUM__1 0x1
+#define BV_PXP_INPUT_STORE_CTRL_CH1_ARRAY_LINE_NUM__2 0x2
+#define BV_PXP_INPUT_STORE_CTRL_CH1_ARRAY_LINE_NUM__3 0x3
+#define BM_PXP_INPUT_STORE_CTRL_CH1_ARRAY_EN 0x00000010
+#define BF_PXP_INPUT_STORE_CTRL_CH1_ARRAY_EN(v)  \
+        (((v) << 4) & BM_PXP_INPUT_STORE_CTRL_CH1_ARRAY_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_ARRAY_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_ARRAY_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH1_HANDSHAKE_EN 0x00000008
+#define BF_PXP_INPUT_STORE_CTRL_CH1_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_INPUT_STORE_CTRL_CH1_HANDSHAKE_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_HANDSHAKE_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_HANDSHAKE_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH1_BLOCK_16 0x00000004
+#define BF_PXP_INPUT_STORE_CTRL_CH1_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_INPUT_STORE_CTRL_CH1_BLOCK_16)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_BLOCK_16__8x8   0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_BLOCK_16__16x16 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH1_BLOCK_EN 0x00000002
+#define BF_PXP_INPUT_STORE_CTRL_CH1_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_INPUT_STORE_CTRL_CH1_BLOCK_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_BLOCK_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_BLOCK_EN__1 0x1
+#define BM_PXP_INPUT_STORE_CTRL_CH1_CH_EN 0x00000001
+#define BF_PXP_INPUT_STORE_CTRL_CH1_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_CTRL_CH1_CH_EN)
+#define BV_PXP_INPUT_STORE_CTRL_CH1_CH_EN__0 0x0
+#define BV_PXP_INPUT_STORE_CTRL_CH1_CH_EN__1 0x1
+
+#define HW_PXP_INPUT_STORE_STATUS_CH0  (0x000005e0)
+
+#define BP_PXP_INPUT_STORE_STATUS_CH0_STORE_BLOCK_Y      16
+#define BM_PXP_INPUT_STORE_STATUS_CH0_STORE_BLOCK_Y 0xFFFF0000
+#define BF_PXP_INPUT_STORE_STATUS_CH0_STORE_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_INPUT_STORE_STATUS_CH0_STORE_BLOCK_Y)
+#define BP_PXP_INPUT_STORE_STATUS_CH0_STORE_BLOCK_X      0
+#define BM_PXP_INPUT_STORE_STATUS_CH0_STORE_BLOCK_X 0x0000FFFF
+#define BF_PXP_INPUT_STORE_STATUS_CH0_STORE_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_STATUS_CH0_STORE_BLOCK_X)
+
+#define HW_PXP_INPUT_STORE_STATUS_CH1  (0x000005f0)
+
+#define BP_PXP_INPUT_STORE_STATUS_CH1_STORE_BLOCK_Y      16
+#define BM_PXP_INPUT_STORE_STATUS_CH1_STORE_BLOCK_Y 0xFFFF0000
+#define BF_PXP_INPUT_STORE_STATUS_CH1_STORE_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_INPUT_STORE_STATUS_CH1_STORE_BLOCK_Y)
+#define BP_PXP_INPUT_STORE_STATUS_CH1_STORE_BLOCK_X      0
+#define BM_PXP_INPUT_STORE_STATUS_CH1_STORE_BLOCK_X 0x0000FFFF
+#define BF_PXP_INPUT_STORE_STATUS_CH1_STORE_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_STATUS_CH1_STORE_BLOCK_X)
+
+#define HW_PXP_INPUT_STORE_SIZE_CH0    (0x00000600)
+
+#define BP_PXP_INPUT_STORE_SIZE_CH0_OUT_HEIGHT      16
+#define BM_PXP_INPUT_STORE_SIZE_CH0_OUT_HEIGHT 0xFFFF0000
+#define BF_PXP_INPUT_STORE_SIZE_CH0_OUT_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_INPUT_STORE_SIZE_CH0_OUT_HEIGHT)
+#define BP_PXP_INPUT_STORE_SIZE_CH0_OUT_WIDTH      0
+#define BM_PXP_INPUT_STORE_SIZE_CH0_OUT_WIDTH 0x0000FFFF
+#define BF_PXP_INPUT_STORE_SIZE_CH0_OUT_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_SIZE_CH0_OUT_WIDTH)
+
+#define HW_PXP_INPUT_STORE_SIZE_CH1    (0x00000610)
+
+#define BP_PXP_INPUT_STORE_SIZE_CH1_OUT_HEIGHT      16
+#define BM_PXP_INPUT_STORE_SIZE_CH1_OUT_HEIGHT 0xFFFF0000
+#define BF_PXP_INPUT_STORE_SIZE_CH1_OUT_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_INPUT_STORE_SIZE_CH1_OUT_HEIGHT)
+#define BP_PXP_INPUT_STORE_SIZE_CH1_OUT_WIDTH      0
+#define BM_PXP_INPUT_STORE_SIZE_CH1_OUT_WIDTH 0x0000FFFF
+#define BF_PXP_INPUT_STORE_SIZE_CH1_OUT_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_SIZE_CH1_OUT_WIDTH)
+
+#define HW_PXP_INPUT_STORE_PITCH       (0x00000620)
+
+#define BP_PXP_INPUT_STORE_PITCH_CH1_OUT_PITCH      16
+#define BM_PXP_INPUT_STORE_PITCH_CH1_OUT_PITCH 0xFFFF0000
+#define BF_PXP_INPUT_STORE_PITCH_CH1_OUT_PITCH(v) \
+        (((v) << 16) & BM_PXP_INPUT_STORE_PITCH_CH1_OUT_PITCH)
+#define BP_PXP_INPUT_STORE_PITCH_CH0_OUT_PITCH      0
+#define BM_PXP_INPUT_STORE_PITCH_CH0_OUT_PITCH 0x0000FFFF
+#define BF_PXP_INPUT_STORE_PITCH_CH0_OUT_PITCH(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_PITCH_CH0_OUT_PITCH)
+
+#define HW_PXP_INPUT_STORE_SHIFT_CTRL_CH0      (0x00000630)
+#define HW_PXP_INPUT_STORE_SHIFT_CTRL_CH0_SET  (0x00000634)
+#define HW_PXP_INPUT_STORE_SHIFT_CTRL_CH0_CLR  (0x00000638)
+#define HW_PXP_INPUT_STORE_SHIFT_CTRL_CH0_TOG  (0x0000063c)
+
+#define BP_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD0      8
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD0 0xFFFFFF00
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD0(v) \
+        (((v) << 8) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD0)
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS 0x00000080
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS(v)  \
+        (((v) << 7) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS)
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS__0 0x0
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS__1 0x1
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD1 0x00000040
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD1(v)  \
+        (((v) << 6) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD1)
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN 0x00000020
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN(v)  \
+        (((v) << 5) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN)
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN__0 0x0
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN__1 0x1
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN 0x00000010
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN(v)  \
+        (((v) << 4) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN)
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN__0 0x0
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN__1 0x1
+#define BP_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP      2
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP 0x0000000C
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP(v)  \
+        (((v) << 2) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP)
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__3 0x3
+#define BP_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD2      0
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD2 0x00000003
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD2(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH0_RSVD2)
+
+#define HW_PXP_INPUT_STORE_SHIFT_CTRL_CH1      (0x00000640)
+#define HW_PXP_INPUT_STORE_SHIFT_CTRL_CH1_SET  (0x00000644)
+#define HW_PXP_INPUT_STORE_SHIFT_CTRL_CH1_CLR  (0x00000648)
+#define HW_PXP_INPUT_STORE_SHIFT_CTRL_CH1_TOG  (0x0000064c)
+
+#define BP_PXP_INPUT_STORE_SHIFT_CTRL_CH1_RSVD0      6
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_RSVD0 0xFFFFFFC0
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH1_RSVD0(v) \
+        (((v) << 6) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_RSVD0)
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN 0x00000020
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN(v)  \
+        (((v) << 5) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN)
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN__0 0x0
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN__1 0x1
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN 0x00000010
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN(v)  \
+        (((v) << 4) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN)
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN__0 0x0
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN__1 0x1
+#define BP_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP      2
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP 0x0000000C
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP(v)  \
+        (((v) << 2) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP)
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_INPUT_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__3 0x3
+#define BP_PXP_INPUT_STORE_SHIFT_CTRL_CH1_RSVD2      0
+#define BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_RSVD2 0x00000003
+#define BF_PXP_INPUT_STORE_SHIFT_CTRL_CH1_RSVD2(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_SHIFT_CTRL_CH1_RSVD2)
+
+#define HW_PXP_INPUT_STORE_ADDR_0_CH0  (0x00000690)
+
+#define BP_PXP_INPUT_STORE_ADDR_0_CH0_OUT_BASE_ADDR0      0
+#define BM_PXP_INPUT_STORE_ADDR_0_CH0_OUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_ADDR_0_CH0_OUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_ADDR_1_CH0  (0x000006a0)
+
+#define BP_PXP_INPUT_STORE_ADDR_1_CH0_OUT_BASE_ADDR1      0
+#define BM_PXP_INPUT_STORE_ADDR_1_CH0_OUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_ADDR_1_CH0_OUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_INPUT_STORE_FILL_DATA_CH0       (0x000006b0)
+
+#define BP_PXP_INPUT_STORE_FILL_DATA_CH0_FILL_DATA_CH0      0
+#define BM_PXP_INPUT_STORE_FILL_DATA_CH0_FILL_DATA_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_FILL_DATA_CH0_FILL_DATA_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_ADDR_0_CH1  (0x000006c0)
+
+#define BP_PXP_INPUT_STORE_ADDR_0_CH1_OUT_BASE_ADDR0      0
+#define BM_PXP_INPUT_STORE_ADDR_0_CH1_OUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_ADDR_0_CH1_OUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_ADDR_1_CH1  (0x000006d0)
+
+#define BP_PXP_INPUT_STORE_ADDR_1_CH1_OUT_BASE_ADDR1      0
+#define BM_PXP_INPUT_STORE_ADDR_1_CH1_OUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_ADDR_1_CH1_OUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK0_H_CH0       (0x000006e0)
+
+#define BP_PXP_INPUT_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK0_L_CH0       (0x000006f0)
+
+#define BP_PXP_INPUT_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK1_H_CH0       (0x00000700)
+
+#define BP_PXP_INPUT_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK1_L_CH0       (0x00000710)
+
+#define BP_PXP_INPUT_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK2_H_CH0       (0x00000720)
+
+#define BP_PXP_INPUT_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK2_L_CH0       (0x00000730)
+
+#define BP_PXP_INPUT_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK3_H_CH0       (0x00000740)
+
+#define BP_PXP_INPUT_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK3_L_CH0       (0x00000750)
+
+#define BP_PXP_INPUT_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK4_H_CH0       (0x00000760)
+
+#define BP_PXP_INPUT_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK4_L_CH0       (0x00000770)
+
+#define BP_PXP_INPUT_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK5_H_CH0       (0x00000780)
+
+#define BP_PXP_INPUT_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK5_L_CH0       (0x00000790)
+
+#define BP_PXP_INPUT_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK6_H_CH0       (0x000007a0)
+
+#define BP_PXP_INPUT_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK6_L_CH0       (0x000007b0)
+
+#define BP_PXP_INPUT_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK7_H_CH0       (0x000007c0)
+
+#define BP_PXP_INPUT_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_MASK7_L_CH0       (0x000007e0)
+
+#define BP_PXP_INPUT_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0      0
+#define BM_PXP_INPUT_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0 0xFFFFFFFF
+#define BF_PXP_INPUT_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0(v)   (v)
+
+#define HW_PXP_INPUT_STORE_D_SHIFT_L_CH0       (0x000007f0)
+
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3 0x80000000
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3(v) \
+        (((v) << 31) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3)
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD0 0x40000000
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD0(v)  \
+        (((v) << 30) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD0)
+#define BP_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3      24
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3 0x3F000000
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3(v)  \
+        (((v) << 24) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3)
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2 0x00800000
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2(v)  \
+        (((v) << 23) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2)
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD1 0x00400000
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD1)
+#define BP_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2      16
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2 0x003F0000
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2(v)  \
+        (((v) << 16) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2)
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1 0x00008000
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1(v)  \
+        (((v) << 15) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1)
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD2 0x00004000
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD2)
+#define BP_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1      8
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1 0x00003F00
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1(v)  \
+        (((v) << 8) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1)
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0 0x00000080
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0(v)  \
+        (((v) << 7) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0)
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD3 0x00000040
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_RSVD3)
+#define BP_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0      0
+#define BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0 0x0000003F
+#define BF_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0)
+
+#define HW_PXP_INPUT_STORE_D_SHIFT_H_CH0       (0x00000800)
+
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7 0x80000000
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7(v) \
+        (((v) << 31) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7)
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD0 0x40000000
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD0(v)  \
+        (((v) << 30) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD0)
+#define BP_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7      24
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7 0x3F000000
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7(v)  \
+        (((v) << 24) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7)
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6 0x00800000
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6(v)  \
+        (((v) << 23) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6)
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD1 0x00400000
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD1)
+#define BP_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6      16
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6 0x003F0000
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6(v)  \
+        (((v) << 16) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6)
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5 0x00008000
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5(v)  \
+        (((v) << 15) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5)
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD2 0x00004000
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD2)
+#define BP_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5      8
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5 0x00003F00
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5(v)  \
+        (((v) << 8) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5)
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4 0x00000080
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4(v)  \
+        (((v) << 7) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4)
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD3 0x00000040
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_RSVD3)
+#define BP_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4      0
+#define BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4 0x0000003F
+#define BF_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4)
+
+#define HW_PXP_INPUT_STORE_F_SHIFT_L_CH0       (0x00000810)
+
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD0 0x80000000
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD0(v) \
+        (((v) << 31) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD0)
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3 0x40000000
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3(v)  \
+        (((v) << 30) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3)
+#define BP_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3      24
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3 0x3F000000
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3(v)  \
+        (((v) << 24) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3)
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD1 0x00800000
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD1(v)  \
+        (((v) << 23) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD1)
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2 0x00400000
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2(v)  \
+        (((v) << 22) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2)
+#define BP_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2      16
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2 0x003F0000
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2(v)  \
+        (((v) << 16) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2)
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD2 0x00008000
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD2(v)  \
+        (((v) << 15) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD2)
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1 0x00004000
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1(v)  \
+        (((v) << 14) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1)
+#define BP_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1      8
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1 0x00003F00
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1(v)  \
+        (((v) << 8) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1)
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD3 0x00000080
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_RSVD3)
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0 0x00000040
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0(v)  \
+        (((v) << 6) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0)
+#define BP_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0      0
+#define BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0 0x0000003F
+#define BF_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0)
+
+#define HW_PXP_INPUT_STORE_F_SHIFT_H_CH0       (0x00000820)
+
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD0 0x80000000
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD0(v) \
+        (((v) << 31) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD0)
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7 0x40000000
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7(v)  \
+        (((v) << 30) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7)
+#define BP_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7      24
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7 0x3F000000
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7(v)  \
+        (((v) << 24) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7)
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD1 0x00800000
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD1(v)  \
+        (((v) << 23) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD1)
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6 0x00400000
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6(v)  \
+        (((v) << 22) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6)
+#define BP_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6      16
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6 0x003F0000
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6(v)  \
+        (((v) << 16) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6)
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD2 0x00008000
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD2(v)  \
+        (((v) << 15) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD2)
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5 0x00004000
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5(v)  \
+        (((v) << 14) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5)
+#define BP_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5      8
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5 0x00003F00
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5(v)  \
+        (((v) << 8) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5)
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD3 0x00000080
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_RSVD3)
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4 0x00000040
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4(v)  \
+        (((v) << 6) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4)
+#define BP_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4      0
+#define BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4 0x0000003F
+#define BF_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4)
+
+#define HW_PXP_INPUT_STORE_F_MASK_L_CH0        (0x00000830)
+
+#define BP_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK3      24
+#define BM_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK3 0xFF000000
+#define BF_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK3(v) \
+        (((v) << 24) & BM_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK3)
+#define BP_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK2      16
+#define BM_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK2 0x00FF0000
+#define BF_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK2(v)  \
+        (((v) << 16) & BM_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK2)
+#define BP_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK1      8
+#define BM_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK1 0x0000FF00
+#define BF_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK1(v)  \
+        (((v) << 8) & BM_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK1)
+#define BP_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK0      0
+#define BM_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK0 0x000000FF
+#define BF_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK0(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_F_MASK_L_CH0_F_MASK0)
+
+#define HW_PXP_INPUT_STORE_F_MASK_H_CH0        (0x00000840)
+
+#define BP_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK7      24
+#define BM_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK7 0xFF000000
+#define BF_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK7(v) \
+        (((v) << 24) & BM_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK7)
+#define BP_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK6      16
+#define BM_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK6 0x00FF0000
+#define BF_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK6(v)  \
+        (((v) << 16) & BM_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK6)
+#define BP_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK5      8
+#define BM_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK5 0x0000FF00
+#define BF_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK5(v)  \
+        (((v) << 8) & BM_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK5)
+#define BP_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK4      0
+#define BM_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK4 0x000000FF
+#define BF_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK4(v)  \
+        (((v) << 0) & BM_PXP_INPUT_STORE_F_MASK_H_CH0_F_MASK4)
+
+#define HW_PXP_DITHER_FETCH_CTRL_CH0   (0x00000850)
+#define HW_PXP_DITHER_FETCH_CTRL_CH0_SET       (0x00000854)
+#define HW_PXP_DITHER_FETCH_CTRL_CH0_CLR       (0x00000858)
+#define HW_PXP_DITHER_FETCH_CTRL_CH0_TOG       (0x0000085c)
+
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_ARBIT_EN 0x80000000
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_ARBIT_EN(v) \
+        (((v) << 31) & BM_PXP_DITHER_FETCH_CTRL_CH0_ARBIT_EN)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_ARBIT_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_ARBIT_EN__1 0x1
+#define BP_PXP_DITHER_FETCH_CTRL_CH0_RSVD0      26
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD0 0x7C000000
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_RSVD0(v)  \
+        (((v) << 26) & BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD0)
+#define BP_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM      24
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM 0x03000000
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM(v)  \
+        (((v) << 24) & BM_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM__1 0x1
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM__2 0x2
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_SCAN_LINE_NUM__3 0x3
+#define BP_PXP_DITHER_FETCH_CTRL_CH0_RSVD1      18
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD1 0x00FC0000
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_RSVD1(v)  \
+        (((v) << 18) & BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD1)
+#define BP_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES      16
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES 0x00030000
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_RD_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_DITHER_FETCH_CTRL_CH0_RSVD2      14
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD2 0x0000C000
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD2)
+#define BP_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE      12
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE 0x00003000
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE(v)  \
+        (((v) << 12) & BM_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE__ROT_0   0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE__ROT_90  0x1
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE__ROT_180 0x2
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_ROTATION_ANGLE__ROT_270 0x3
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD3 0x00000800
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_RSVD3(v)  \
+        (((v) << 11) & BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD3)
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_VFLIP 0x00000400
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_VFLIP(v)  \
+        (((v) << 10) & BM_PXP_DITHER_FETCH_CTRL_CH0_VFLIP)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_VFLIP__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_VFLIP__1 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_HFLIP 0x00000200
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_HFLIP(v)  \
+        (((v) << 9) & BM_PXP_DITHER_FETCH_CTRL_CH0_HFLIP)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HFLIP__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HFLIP__1 0x1
+#define BP_PXP_DITHER_FETCH_CTRL_CH0_RSVD4      6
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD4 0x000001C0
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_RSVD4(v)  \
+        (((v) << 6) & BM_PXP_DITHER_FETCH_CTRL_CH0_RSVD4)
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_HIGH_BYTE 0x00000020
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_HIGH_BYTE(v)  \
+        (((v) << 5) & BM_PXP_DITHER_FETCH_CTRL_CH0_HIGH_BYTE)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HIGH_BYTE__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HIGH_BYTE__1 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_BYPASS_PIXEL_EN 0x00000010
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_BYPASS_PIXEL_EN(v)  \
+        (((v) << 4) & BM_PXP_DITHER_FETCH_CTRL_CH0_BYPASS_PIXEL_EN)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_BYPASS_PIXEL_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_BYPASS_PIXEL_EN__1 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_EN 0x00000008
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_EN)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_HANDSHAKE_EN__1 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_16 0x00000004
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_16)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_16__8x8   0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_16__16x16 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_EN 0x00000002
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_EN)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_BLOCK_EN__1 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH0_CH_EN 0x00000001
+#define BF_PXP_DITHER_FETCH_CTRL_CH0_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_CTRL_CH0_CH_EN)
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_CH_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH0_CH_EN__1 0x1
+
+#define HW_PXP_DITHER_FETCH_CTRL_CH1   (0x00000860)
+#define HW_PXP_DITHER_FETCH_CTRL_CH1_SET       (0x00000864)
+#define HW_PXP_DITHER_FETCH_CTRL_CH1_CLR       (0x00000868)
+#define HW_PXP_DITHER_FETCH_CTRL_CH1_TOG       (0x0000086c)
+
+#define BP_PXP_DITHER_FETCH_CTRL_CH1_RSVD0      26
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD0 0xFC000000
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_RSVD0(v) \
+        (((v) << 26) & BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD0)
+#define BP_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM      24
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM 0x03000000
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM(v)  \
+        (((v) << 24) & BM_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM__1 0x1
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM__2 0x2
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_SCAN_LINE_NUM__3 0x3
+#define BP_PXP_DITHER_FETCH_CTRL_CH1_RSVD1      18
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD1 0x00FC0000
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_RSVD1(v)  \
+        (((v) << 18) & BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD1)
+#define BP_PXP_DITHER_FETCH_CTRL_CH1_RD_NUM_BYTES      16
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_RD_NUM_BYTES 0x00030000
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_RD_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_CTRL_CH1_RD_NUM_BYTES)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_RD_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_RD_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_RD_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_RD_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_DITHER_FETCH_CTRL_CH1_RSVD2      14
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD2 0x0000C000
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD2)
+#define BP_PXP_DITHER_FETCH_CTRL_CH1_ROTATION_ANGLE      12
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_ROTATION_ANGLE 0x00003000
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_ROTATION_ANGLE(v)  \
+        (((v) << 12) & BM_PXP_DITHER_FETCH_CTRL_CH1_ROTATION_ANGLE)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_ROTATION_ANGLE__ROT_0   0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_ROTATION_ANGLE__ROT_90  0x1
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_ROTATION_ANGLE__ROT_180 0x2
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_ROTATION_ANGLE__ROT_270 0x3
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD3 0x00000800
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_RSVD3(v)  \
+        (((v) << 11) & BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD3)
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_VFLIP 0x00000400
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_VFLIP(v)  \
+        (((v) << 10) & BM_PXP_DITHER_FETCH_CTRL_CH1_VFLIP)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_VFLIP__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_VFLIP__1 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_HFLIP 0x00000200
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_HFLIP(v)  \
+        (((v) << 9) & BM_PXP_DITHER_FETCH_CTRL_CH1_HFLIP)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_HFLIP__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_HFLIP__1 0x1
+#define BP_PXP_DITHER_FETCH_CTRL_CH1_RSVD4      5
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD4 0x000001E0
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_RSVD4(v)  \
+        (((v) << 5) & BM_PXP_DITHER_FETCH_CTRL_CH1_RSVD4)
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_BYPASS_PIXEL_EN 0x00000010
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_BYPASS_PIXEL_EN(v)  \
+        (((v) << 4) & BM_PXP_DITHER_FETCH_CTRL_CH1_BYPASS_PIXEL_EN)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_BYPASS_PIXEL_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_BYPASS_PIXEL_EN__1 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_EN 0x00000008
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_EN)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_HANDSHAKE_EN__1 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_16 0x00000004
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_16)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_16__8x8   0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_16__16x16 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_EN 0x00000002
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_EN)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_BLOCK_EN__1 0x1
+#define BM_PXP_DITHER_FETCH_CTRL_CH1_CH_EN 0x00000001
+#define BF_PXP_DITHER_FETCH_CTRL_CH1_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_CTRL_CH1_CH_EN)
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_CH_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_CTRL_CH1_CH_EN__1 0x1
+
+#define HW_PXP_DITHER_FETCH_STATUS_CH0 (0x00000870)
+
+#define BP_PXP_DITHER_FETCH_STATUS_CH0_PREFETCH_BLOCK_Y      16
+#define BM_PXP_DITHER_FETCH_STATUS_CH0_PREFETCH_BLOCK_Y 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_STATUS_CH0_PREFETCH_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_STATUS_CH0_PREFETCH_BLOCK_Y)
+#define BP_PXP_DITHER_FETCH_STATUS_CH0_PREFETCH_BLOCK_X      0
+#define BM_PXP_DITHER_FETCH_STATUS_CH0_PREFETCH_BLOCK_X 0x0000FFFF
+#define BF_PXP_DITHER_FETCH_STATUS_CH0_PREFETCH_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_STATUS_CH0_PREFETCH_BLOCK_X)
+
+#define HW_PXP_DITHER_FETCH_STATUS_CH1 (0x00000880)
+
+#define BP_PXP_DITHER_FETCH_STATUS_CH1_PREFETCH_BLOCK_Y      16
+#define BM_PXP_DITHER_FETCH_STATUS_CH1_PREFETCH_BLOCK_Y 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_STATUS_CH1_PREFETCH_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_STATUS_CH1_PREFETCH_BLOCK_Y)
+#define BP_PXP_DITHER_FETCH_STATUS_CH1_PREFETCH_BLOCK_X      0
+#define BM_PXP_DITHER_FETCH_STATUS_CH1_PREFETCH_BLOCK_X 0x0000FFFF
+#define BF_PXP_DITHER_FETCH_STATUS_CH1_PREFETCH_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_STATUS_CH1_PREFETCH_BLOCK_X)
+
+#define HW_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0        (0x00000890)
+
+#define BP_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_Y      16
+#define BM_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_Y 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_Y(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_Y)
+#define BP_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_X      0
+#define BM_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_X 0x0000FFFF
+#define BF_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_X(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0_ACTIVE_SIZE_ULC_X)
+
+#define HW_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0        (0x000008a0)
+
+#define BP_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_Y      16
+#define BM_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_Y 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_Y(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_Y)
+#define BP_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_X      0
+#define BM_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_X 0x0000FFFF
+#define BF_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_X(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0_ACTIVE_SIZE_LRC_X)
+
+#define HW_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1        (0x000008b0)
+
+#define BP_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_Y      16
+#define BM_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_Y 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_Y(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_Y)
+#define BP_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_X      0
+#define BM_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_X 0x0000FFFF
+#define BF_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_X(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1_ACTIVE_SIZE_ULC_X)
+
+#define HW_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1        (0x000008c0)
+
+#define BP_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_Y      16
+#define BM_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_Y 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_Y(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_Y)
+#define BP_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_X      0
+#define BM_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_X 0x0000FFFF
+#define BF_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_X(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1_ACTIVE_SIZE_LRC_X)
+
+#define HW_PXP_DITHER_FETCH_SIZE_CH0   (0x000008d0)
+
+#define BP_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_HEIGHT      16
+#define BM_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_HEIGHT 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_HEIGHT)
+#define BP_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_WIDTH      0
+#define BM_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_WIDTH 0x0000FFFF
+#define BF_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_SIZE_CH0_INPUT_TOTAL_WIDTH)
+
+#define HW_PXP_DITHER_FETCH_SIZE_CH1   (0x000008e0)
+
+#define BP_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_HEIGHT      16
+#define BM_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_HEIGHT 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_HEIGHT)
+#define BP_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_WIDTH      0
+#define BM_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_WIDTH 0x0000FFFF
+#define BF_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_SIZE_CH1_INPUT_TOTAL_WIDTH)
+
+#define HW_PXP_DITHER_FETCH_BACKGROUND_COLOR_CH0       (0x000008f0)
+
+#define BP_PXP_DITHER_FETCH_BACKGROUND_COLOR_CH0_BACKGROUND_COLOR      0
+#define BM_PXP_DITHER_FETCH_BACKGROUND_COLOR_CH0_BACKGROUND_COLOR 0xFFFFFFFF
+#define BF_PXP_DITHER_FETCH_BACKGROUND_COLOR_CH0_BACKGROUND_COLOR(v)   (v)
+
+#define HW_PXP_DITHER_FETCH_BACKGROUND_COLOR_CH1       (0x00000900)
+
+#define BP_PXP_DITHER_FETCH_BACKGROUND_COLOR_CH1_BACKGROUND_COLOR      0
+#define BM_PXP_DITHER_FETCH_BACKGROUND_COLOR_CH1_BACKGROUND_COLOR 0xFFFFFFFF
+#define BF_PXP_DITHER_FETCH_BACKGROUND_COLOR_CH1_BACKGROUND_COLOR(v)   (v)
+
+#define HW_PXP_DITHER_FETCH_PITCH      (0x00000910)
+
+#define BP_PXP_DITHER_FETCH_PITCH_CH1_INPUT_PITCH      16
+#define BM_PXP_DITHER_FETCH_PITCH_CH1_INPUT_PITCH 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_PITCH_CH1_INPUT_PITCH(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_PITCH_CH1_INPUT_PITCH)
+#define BP_PXP_DITHER_FETCH_PITCH_CH0_INPUT_PITCH      0
+#define BM_PXP_DITHER_FETCH_PITCH_CH0_INPUT_PITCH 0x0000FFFF
+#define BF_PXP_DITHER_FETCH_PITCH_CH0_INPUT_PITCH(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_PITCH_CH0_INPUT_PITCH)
+
+#define HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH0     (0x00000920)
+#define HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_SET (0x00000924)
+#define HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_CLR (0x00000928)
+#define HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_TOG (0x0000092c)
+
+#define BP_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_RSVD0      13
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_RSVD0 0xFFFFE000
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_RSVD0(v) \
+        (((v) << 13) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_RSVD0)
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS 0x00001000
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS(v)  \
+        (((v) << 12) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS)
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS__0 0x0
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_SHIFT_BYPASS__1 0x1
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_EN 0x00000800
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_EN(v)  \
+        (((v) << 11) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_EN)
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_EN__1 0x1
+#define BP_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT      8
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT 0x00000700
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT)
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__0 0x0
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__1 0x1
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__2 0x2
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__3 0x3
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__4 0x4
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__5 0x5
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__6 0x6
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_EXPAND_FORMAT__7 0x7
+#define BP_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_RSVD1      2
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_RSVD1 0x000000FC
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_RSVD1(v)  \
+        (((v) << 2) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_RSVD1)
+#define BP_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP      0
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP 0x00000003
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP)
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH0_INPUT_ACTIVE_BPP__3 0x3
+
+#define HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH1     (0x00000930)
+#define HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_SET (0x00000934)
+#define HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_CLR (0x00000938)
+#define HW_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_TOG (0x0000093c)
+
+#define BP_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_RSVD0      13
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_RSVD0 0xFFFFE000
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_RSVD0(v) \
+        (((v) << 13) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_RSVD0)
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS 0x00001000
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS(v)  \
+        (((v) << 12) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS)
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS__0 0x0
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_SHIFT_BYPASS__1 0x1
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_EN 0x00000800
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_EN(v)  \
+        (((v) << 11) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_EN)
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_EN__0 0x0
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_EN__1 0x1
+#define BP_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT      8
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT 0x00000700
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT)
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__0 0x0
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__1 0x1
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__2 0x2
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__3 0x3
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__4 0x4
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__5 0x5
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__6 0x6
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_EXPAND_FORMAT__7 0x7
+#define BP_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_RSVD1      2
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_RSVD1 0x000000FC
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_RSVD1(v)  \
+        (((v) << 2) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_RSVD1)
+#define BP_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP      0
+#define BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP 0x00000003
+#define BF_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP)
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_DITHER_FETCH_SHIFT_CTRL_CH1_INPUT_ACTIVE_BPP__3 0x3
+
+#define HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0   (0x00000940)
+#define HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_SET       (0x00000944)
+#define HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_CLR       (0x00000948)
+#define HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_TOG       (0x0000094c)
+
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD0      29
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD0 0xE0000000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD0(v) \
+        (((v) << 29) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD0)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET3      24
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET3 0x1F000000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET3(v)  \
+        (((v) << 24) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET3)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD1      21
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD1 0x00E00000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD1(v)  \
+        (((v) << 21) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD1)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET2      16
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET2 0x001F0000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET2(v)  \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET2)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD2      13
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD2 0x0000E000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD2(v)  \
+        (((v) << 13) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD2)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET1      8
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET1 0x00001F00
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET1(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET1)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD3      5
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD3 0x000000E0
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD3(v)  \
+        (((v) << 5) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_RSVD3)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET0      0
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET0 0x0000001F
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET0(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH0_OFFSET0)
+
+#define HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1   (0x00000950)
+#define HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_SET       (0x00000954)
+#define HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_CLR       (0x00000958)
+#define HW_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_TOG       (0x0000095c)
+
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD0      29
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD0 0xE0000000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD0(v) \
+        (((v) << 29) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD0)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET3      24
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET3 0x1F000000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET3(v)  \
+        (((v) << 24) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET3)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD1      21
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD1 0x00E00000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD1(v)  \
+        (((v) << 21) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD1)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET2      16
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET2 0x001F0000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET2(v)  \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET2)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD2      13
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD2 0x0000E000
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD2(v)  \
+        (((v) << 13) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD2)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET1      8
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET1 0x00001F00
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET1(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET1)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD3      5
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD3 0x000000E0
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD3(v)  \
+        (((v) << 5) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_RSVD3)
+#define BP_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET0      0
+#define BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET0 0x0000001F
+#define BF_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET0(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_SHIFT_OFFSET_CH1_OFFSET0)
+
+#define HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0    (0x00000960)
+#define HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_SET        (0x00000964)
+#define HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_CLR        (0x00000968)
+#define HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_TOG        (0x0000096c)
+
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_RSVD0      16
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_RSVD0 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_RSVD0(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_RSVD0)
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH3      12
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH3 0x0000F000
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH3(v)  \
+        (((v) << 12) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH3)
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH2      8
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH2 0x00000F00
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH2(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH2)
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH1      4
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH1 0x000000F0
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH1(v)  \
+        (((v) << 4) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH1)
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH0      0
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH0 0x0000000F
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH0_WIDTH0)
+
+#define HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1    (0x00000970)
+#define HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_SET        (0x00000974)
+#define HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_CLR        (0x00000978)
+#define HW_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_TOG        (0x0000097c)
+
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_RSVD0      16
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_RSVD0 0xFFFF0000
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_RSVD0(v) \
+        (((v) << 16) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_RSVD0)
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH3      12
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH3 0x0000F000
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH3(v)  \
+        (((v) << 12) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH3)
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH2      8
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH2 0x00000F00
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH2(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH2)
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH1      4
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH1 0x000000F0
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH1(v)  \
+        (((v) << 4) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH1)
+#define BP_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH0      0
+#define BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH0 0x0000000F
+#define BF_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FETCH_SHIFT_WIDTH_CH1_WIDTH0)
+
+#define HW_PXP_DITHER_FETCH_ADDR_0_CH0 (0x00000980)
+
+#define BP_PXP_DITHER_FETCH_ADDR_0_CH0_INPUT_BASE_ADDR0      0
+#define BM_PXP_DITHER_FETCH_ADDR_0_CH0_INPUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_DITHER_FETCH_ADDR_0_CH0_INPUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_DITHER_FETCH_ADDR_1_CH0 (0x00000990)
+
+#define BP_PXP_DITHER_FETCH_ADDR_1_CH0_INPUT_BASE_ADDR1      0
+#define BM_PXP_DITHER_FETCH_ADDR_1_CH0_INPUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_DITHER_FETCH_ADDR_1_CH0_INPUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_DITHER_FETCH_ADDR_0_CH1 (0x000009a0)
+
+#define BP_PXP_DITHER_FETCH_ADDR_0_CH1_INPUT_BASE_ADDR0      0
+#define BM_PXP_DITHER_FETCH_ADDR_0_CH1_INPUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_DITHER_FETCH_ADDR_0_CH1_INPUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_DITHER_FETCH_ADDR_1_CH1 (0x000009b0)
+
+#define BP_PXP_DITHER_FETCH_ADDR_1_CH1_INPUT_BASE_ADDR1      0
+#define BM_PXP_DITHER_FETCH_ADDR_1_CH1_INPUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_DITHER_FETCH_ADDR_1_CH1_INPUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_DITHER_STORE_CTRL_CH0   (0x000009c0)
+#define HW_PXP_DITHER_STORE_CTRL_CH0_SET       (0x000009c4)
+#define HW_PXP_DITHER_STORE_CTRL_CH0_CLR       (0x000009c8)
+#define HW_PXP_DITHER_STORE_CTRL_CH0_TOG       (0x000009cc)
+
+#define BM_PXP_DITHER_STORE_CTRL_CH0_ARBIT_EN 0x80000000
+#define BF_PXP_DITHER_STORE_CTRL_CH0_ARBIT_EN(v) \
+        (((v) << 31) & BM_PXP_DITHER_STORE_CTRL_CH0_ARBIT_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_ARBIT_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_ARBIT_EN__1 0x1
+#define BP_PXP_DITHER_STORE_CTRL_CH0_RSVD0      25
+#define BM_PXP_DITHER_STORE_CTRL_CH0_RSVD0 0x7E000000
+#define BF_PXP_DITHER_STORE_CTRL_CH0_RSVD0(v)  \
+        (((v) << 25) & BM_PXP_DITHER_STORE_CTRL_CH0_RSVD0)
+#define BM_PXP_DITHER_STORE_CTRL_CH0_COMBINE_2CHANNEL 0x01000000
+#define BF_PXP_DITHER_STORE_CTRL_CH0_COMBINE_2CHANNEL(v)  \
+        (((v) << 24) & BM_PXP_DITHER_STORE_CTRL_CH0_COMBINE_2CHANNEL)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_COMBINE_2CHANNEL__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_COMBINE_2CHANNEL__1 0x1
+#define BP_PXP_DITHER_STORE_CTRL_CH0_RSVD1      18
+#define BM_PXP_DITHER_STORE_CTRL_CH0_RSVD1 0x00FC0000
+#define BF_PXP_DITHER_STORE_CTRL_CH0_RSVD1(v)  \
+        (((v) << 18) & BM_PXP_DITHER_STORE_CTRL_CH0_RSVD1)
+#define BP_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES      16
+#define BM_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES 0x00030000
+#define BF_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_DITHER_STORE_CTRL_CH0_WR_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_DITHER_STORE_CTRL_CH0_RSVD2      12
+#define BM_PXP_DITHER_STORE_CTRL_CH0_RSVD2 0x0000F000
+#define BF_PXP_DITHER_STORE_CTRL_CH0_RSVD2(v)  \
+        (((v) << 12) & BM_PXP_DITHER_STORE_CTRL_CH0_RSVD2)
+#define BM_PXP_DITHER_STORE_CTRL_CH0_FILL_DATA_EN 0x00000800
+#define BF_PXP_DITHER_STORE_CTRL_CH0_FILL_DATA_EN(v)  \
+        (((v) << 11) & BM_PXP_DITHER_STORE_CTRL_CH0_FILL_DATA_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_FILL_DATA_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_FILL_DATA_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH0_PACK_IN_SEL 0x00000400
+#define BF_PXP_DITHER_STORE_CTRL_CH0_PACK_IN_SEL(v)  \
+        (((v) << 10) & BM_PXP_DITHER_STORE_CTRL_CH0_PACK_IN_SEL)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_PACK_IN_SEL__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_PACK_IN_SEL__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH0_STORE_MEMORY_EN 0x00000200
+#define BF_PXP_DITHER_STORE_CTRL_CH0_STORE_MEMORY_EN(v)  \
+        (((v) << 9) & BM_PXP_DITHER_STORE_CTRL_CH0_STORE_MEMORY_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_STORE_MEMORY_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_STORE_MEMORY_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH0_STORE_BYPASS_EN 0x00000100
+#define BF_PXP_DITHER_STORE_CTRL_CH0_STORE_BYPASS_EN(v)  \
+        (((v) << 8) & BM_PXP_DITHER_STORE_CTRL_CH0_STORE_BYPASS_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_STORE_BYPASS_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_STORE_BYPASS_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH0_RSVD3 0x00000080
+#define BF_PXP_DITHER_STORE_CTRL_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_DITHER_STORE_CTRL_CH0_RSVD3)
+#define BP_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM      5
+#define BM_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM 0x00000060
+#define BF_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM(v)  \
+        (((v) << 5) & BM_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM__1 0x1
+#define BV_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM__2 0x2
+#define BV_PXP_DITHER_STORE_CTRL_CH0_ARRAY_LINE_NUM__3 0x3
+#define BM_PXP_DITHER_STORE_CTRL_CH0_ARRAY_EN 0x00000010
+#define BF_PXP_DITHER_STORE_CTRL_CH0_ARRAY_EN(v)  \
+        (((v) << 4) & BM_PXP_DITHER_STORE_CTRL_CH0_ARRAY_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_ARRAY_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_ARRAY_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH0_HANDSHAKE_EN 0x00000008
+#define BF_PXP_DITHER_STORE_CTRL_CH0_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_DITHER_STORE_CTRL_CH0_HANDSHAKE_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_HANDSHAKE_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_HANDSHAKE_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH0_BLOCK_16 0x00000004
+#define BF_PXP_DITHER_STORE_CTRL_CH0_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_DITHER_STORE_CTRL_CH0_BLOCK_16)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_BLOCK_16__8x8   0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_BLOCK_16__16x16 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH0_BLOCK_EN 0x00000002
+#define BF_PXP_DITHER_STORE_CTRL_CH0_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_DITHER_STORE_CTRL_CH0_BLOCK_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_BLOCK_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_BLOCK_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH0_CH_EN 0x00000001
+#define BF_PXP_DITHER_STORE_CTRL_CH0_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_CTRL_CH0_CH_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH0_CH_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH0_CH_EN__1 0x1
+
+#define HW_PXP_DITHER_STORE_CTRL_CH1   (0x000009d0)
+#define HW_PXP_DITHER_STORE_CTRL_CH1_SET       (0x000009d4)
+#define HW_PXP_DITHER_STORE_CTRL_CH1_CLR       (0x000009d8)
+#define HW_PXP_DITHER_STORE_CTRL_CH1_TOG       (0x000009dc)
+
+#define BP_PXP_DITHER_STORE_CTRL_CH1_RSVD0      18
+#define BM_PXP_DITHER_STORE_CTRL_CH1_RSVD0 0xFFFC0000
+#define BF_PXP_DITHER_STORE_CTRL_CH1_RSVD0(v) \
+        (((v) << 18) & BM_PXP_DITHER_STORE_CTRL_CH1_RSVD0)
+#define BP_PXP_DITHER_STORE_CTRL_CH1_WR_NUM_BYTES      16
+#define BM_PXP_DITHER_STORE_CTRL_CH1_WR_NUM_BYTES 0x00030000
+#define BF_PXP_DITHER_STORE_CTRL_CH1_WR_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_DITHER_STORE_CTRL_CH1_WR_NUM_BYTES)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_WR_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_WR_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_DITHER_STORE_CTRL_CH1_WR_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_DITHER_STORE_CTRL_CH1_WR_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_DITHER_STORE_CTRL_CH1_RSVD1      11
+#define BM_PXP_DITHER_STORE_CTRL_CH1_RSVD1 0x0000F800
+#define BF_PXP_DITHER_STORE_CTRL_CH1_RSVD1(v)  \
+        (((v) << 11) & BM_PXP_DITHER_STORE_CTRL_CH1_RSVD1)
+#define BM_PXP_DITHER_STORE_CTRL_CH1_PACK_IN_SEL 0x00000400
+#define BF_PXP_DITHER_STORE_CTRL_CH1_PACK_IN_SEL(v)  \
+        (((v) << 10) & BM_PXP_DITHER_STORE_CTRL_CH1_PACK_IN_SEL)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_PACK_IN_SEL__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_PACK_IN_SEL__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH1_STORE_MEMORY_EN 0x00000200
+#define BF_PXP_DITHER_STORE_CTRL_CH1_STORE_MEMORY_EN(v)  \
+        (((v) << 9) & BM_PXP_DITHER_STORE_CTRL_CH1_STORE_MEMORY_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_STORE_MEMORY_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_STORE_MEMORY_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH1_STORE_BYPASS_EN 0x00000100
+#define BF_PXP_DITHER_STORE_CTRL_CH1_STORE_BYPASS_EN(v)  \
+        (((v) << 8) & BM_PXP_DITHER_STORE_CTRL_CH1_STORE_BYPASS_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_STORE_BYPASS_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_STORE_BYPASS_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH1_RSVD3 0x00000080
+#define BF_PXP_DITHER_STORE_CTRL_CH1_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_DITHER_STORE_CTRL_CH1_RSVD3)
+#define BP_PXP_DITHER_STORE_CTRL_CH1_ARRAY_LINE_NUM      5
+#define BM_PXP_DITHER_STORE_CTRL_CH1_ARRAY_LINE_NUM 0x00000060
+#define BF_PXP_DITHER_STORE_CTRL_CH1_ARRAY_LINE_NUM(v)  \
+        (((v) << 5) & BM_PXP_DITHER_STORE_CTRL_CH1_ARRAY_LINE_NUM)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_ARRAY_LINE_NUM__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_ARRAY_LINE_NUM__1 0x1
+#define BV_PXP_DITHER_STORE_CTRL_CH1_ARRAY_LINE_NUM__2 0x2
+#define BV_PXP_DITHER_STORE_CTRL_CH1_ARRAY_LINE_NUM__3 0x3
+#define BM_PXP_DITHER_STORE_CTRL_CH1_ARRAY_EN 0x00000010
+#define BF_PXP_DITHER_STORE_CTRL_CH1_ARRAY_EN(v)  \
+        (((v) << 4) & BM_PXP_DITHER_STORE_CTRL_CH1_ARRAY_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_ARRAY_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_ARRAY_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH1_HANDSHAKE_EN 0x00000008
+#define BF_PXP_DITHER_STORE_CTRL_CH1_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_DITHER_STORE_CTRL_CH1_HANDSHAKE_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_HANDSHAKE_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_HANDSHAKE_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH1_BLOCK_16 0x00000004
+#define BF_PXP_DITHER_STORE_CTRL_CH1_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_DITHER_STORE_CTRL_CH1_BLOCK_16)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_BLOCK_16__8x8   0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_BLOCK_16__16x16 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH1_BLOCK_EN 0x00000002
+#define BF_PXP_DITHER_STORE_CTRL_CH1_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_DITHER_STORE_CTRL_CH1_BLOCK_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_BLOCK_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_BLOCK_EN__1 0x1
+#define BM_PXP_DITHER_STORE_CTRL_CH1_CH_EN 0x00000001
+#define BF_PXP_DITHER_STORE_CTRL_CH1_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_CTRL_CH1_CH_EN)
+#define BV_PXP_DITHER_STORE_CTRL_CH1_CH_EN__0 0x0
+#define BV_PXP_DITHER_STORE_CTRL_CH1_CH_EN__1 0x1
+
+#define HW_PXP_DITHER_STORE_STATUS_CH0 (0x000009e0)
+
+#define BP_PXP_DITHER_STORE_STATUS_CH0_STORE_BLOCK_Y      16
+#define BM_PXP_DITHER_STORE_STATUS_CH0_STORE_BLOCK_Y 0xFFFF0000
+#define BF_PXP_DITHER_STORE_STATUS_CH0_STORE_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_DITHER_STORE_STATUS_CH0_STORE_BLOCK_Y)
+#define BP_PXP_DITHER_STORE_STATUS_CH0_STORE_BLOCK_X      0
+#define BM_PXP_DITHER_STORE_STATUS_CH0_STORE_BLOCK_X 0x0000FFFF
+#define BF_PXP_DITHER_STORE_STATUS_CH0_STORE_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_STATUS_CH0_STORE_BLOCK_X)
+
+#define HW_PXP_DITHER_STORE_STATUS_CH1 (0x000009f0)
+
+#define BP_PXP_DITHER_STORE_STATUS_CH1_STORE_BLOCK_Y      16
+#define BM_PXP_DITHER_STORE_STATUS_CH1_STORE_BLOCK_Y 0xFFFF0000
+#define BF_PXP_DITHER_STORE_STATUS_CH1_STORE_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_DITHER_STORE_STATUS_CH1_STORE_BLOCK_Y)
+#define BP_PXP_DITHER_STORE_STATUS_CH1_STORE_BLOCK_X      0
+#define BM_PXP_DITHER_STORE_STATUS_CH1_STORE_BLOCK_X 0x0000FFFF
+#define BF_PXP_DITHER_STORE_STATUS_CH1_STORE_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_STATUS_CH1_STORE_BLOCK_X)
+
+#define HW_PXP_DITHER_STORE_SIZE_CH0   (0x00000a00)
+
+#define BP_PXP_DITHER_STORE_SIZE_CH0_OUT_HEIGHT      16
+#define BM_PXP_DITHER_STORE_SIZE_CH0_OUT_HEIGHT 0xFFFF0000
+#define BF_PXP_DITHER_STORE_SIZE_CH0_OUT_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_DITHER_STORE_SIZE_CH0_OUT_HEIGHT)
+#define BP_PXP_DITHER_STORE_SIZE_CH0_OUT_WIDTH      0
+#define BM_PXP_DITHER_STORE_SIZE_CH0_OUT_WIDTH 0x0000FFFF
+#define BF_PXP_DITHER_STORE_SIZE_CH0_OUT_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_SIZE_CH0_OUT_WIDTH)
+
+#define HW_PXP_DITHER_STORE_SIZE_CH1   (0x00000a10)
+
+#define BP_PXP_DITHER_STORE_SIZE_CH1_OUT_HEIGHT      16
+#define BM_PXP_DITHER_STORE_SIZE_CH1_OUT_HEIGHT 0xFFFF0000
+#define BF_PXP_DITHER_STORE_SIZE_CH1_OUT_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_DITHER_STORE_SIZE_CH1_OUT_HEIGHT)
+#define BP_PXP_DITHER_STORE_SIZE_CH1_OUT_WIDTH      0
+#define BM_PXP_DITHER_STORE_SIZE_CH1_OUT_WIDTH 0x0000FFFF
+#define BF_PXP_DITHER_STORE_SIZE_CH1_OUT_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_SIZE_CH1_OUT_WIDTH)
+
+#define HW_PXP_DITHER_STORE_PITCH      (0x00000a20)
+
+#define BP_PXP_DITHER_STORE_PITCH_CH1_OUT_PITCH      16
+#define BM_PXP_DITHER_STORE_PITCH_CH1_OUT_PITCH 0xFFFF0000
+#define BF_PXP_DITHER_STORE_PITCH_CH1_OUT_PITCH(v) \
+        (((v) << 16) & BM_PXP_DITHER_STORE_PITCH_CH1_OUT_PITCH)
+#define BP_PXP_DITHER_STORE_PITCH_CH0_OUT_PITCH      0
+#define BM_PXP_DITHER_STORE_PITCH_CH0_OUT_PITCH 0x0000FFFF
+#define BF_PXP_DITHER_STORE_PITCH_CH0_OUT_PITCH(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_PITCH_CH0_OUT_PITCH)
+
+#define HW_PXP_DITHER_STORE_SHIFT_CTRL_CH0     (0x00000a30)
+#define HW_PXP_DITHER_STORE_SHIFT_CTRL_CH0_SET (0x00000a34)
+#define HW_PXP_DITHER_STORE_SHIFT_CTRL_CH0_CLR (0x00000a38)
+#define HW_PXP_DITHER_STORE_SHIFT_CTRL_CH0_TOG (0x00000a3c)
+
+#define BP_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD0      8
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD0 0xFFFFFF00
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD0(v) \
+        (((v) << 8) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD0)
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS 0x00000080
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS(v)  \
+        (((v) << 7) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS)
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS__0 0x0
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS__1 0x1
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD1 0x00000040
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD1(v)  \
+        (((v) << 6) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD1)
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN 0x00000020
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN(v)  \
+        (((v) << 5) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN)
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN__0 0x0
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN__1 0x1
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN 0x00000010
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN(v)  \
+        (((v) << 4) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN)
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN__0 0x0
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN__1 0x1
+#define BP_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP      2
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP 0x0000000C
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP(v)  \
+        (((v) << 2) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP)
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__3 0x3
+#define BP_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD2      0
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD2 0x00000003
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD2(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH0_RSVD2)
+
+#define HW_PXP_DITHER_STORE_SHIFT_CTRL_CH1     (0x00000a40)
+#define HW_PXP_DITHER_STORE_SHIFT_CTRL_CH1_SET (0x00000a44)
+#define HW_PXP_DITHER_STORE_SHIFT_CTRL_CH1_CLR (0x00000a48)
+#define HW_PXP_DITHER_STORE_SHIFT_CTRL_CH1_TOG (0x00000a4c)
+
+#define BP_PXP_DITHER_STORE_SHIFT_CTRL_CH1_RSVD0      6
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_RSVD0 0xFFFFFFC0
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH1_RSVD0(v) \
+        (((v) << 6) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_RSVD0)
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN 0x00000020
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN(v)  \
+        (((v) << 5) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN)
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN__0 0x0
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN__1 0x1
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN 0x00000010
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN(v)  \
+        (((v) << 4) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN)
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN__0 0x0
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN__1 0x1
+#define BP_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP      2
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP 0x0000000C
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP(v)  \
+        (((v) << 2) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP)
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_DITHER_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__3 0x3
+#define BP_PXP_DITHER_STORE_SHIFT_CTRL_CH1_RSVD2      0
+#define BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_RSVD2 0x00000003
+#define BF_PXP_DITHER_STORE_SHIFT_CTRL_CH1_RSVD2(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_SHIFT_CTRL_CH1_RSVD2)
+
+#define HW_PXP_DITHER_STORE_ADDR_0_CH0 (0x00000a90)
+
+#define BP_PXP_DITHER_STORE_ADDR_0_CH0_OUT_BASE_ADDR0      0
+#define BM_PXP_DITHER_STORE_ADDR_0_CH0_OUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_ADDR_0_CH0_OUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_ADDR_1_CH0 (0x00000aa0)
+
+#define BP_PXP_DITHER_STORE_ADDR_1_CH0_OUT_BASE_ADDR1      0
+#define BM_PXP_DITHER_STORE_ADDR_1_CH0_OUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_ADDR_1_CH0_OUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_DITHER_STORE_FILL_DATA_CH0      (0x00000ab0)
+
+#define BP_PXP_DITHER_STORE_FILL_DATA_CH0_FILL_DATA_CH0      0
+#define BM_PXP_DITHER_STORE_FILL_DATA_CH0_FILL_DATA_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_FILL_DATA_CH0_FILL_DATA_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_ADDR_0_CH1 (0x00000ac0)
+
+#define BP_PXP_DITHER_STORE_ADDR_0_CH1_OUT_BASE_ADDR0      0
+#define BM_PXP_DITHER_STORE_ADDR_0_CH1_OUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_ADDR_0_CH1_OUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_ADDR_1_CH1 (0x00000ad0)
+
+#define BP_PXP_DITHER_STORE_ADDR_1_CH1_OUT_BASE_ADDR1      0
+#define BM_PXP_DITHER_STORE_ADDR_1_CH1_OUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_ADDR_1_CH1_OUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK0_H_CH0      (0x00000ae0)
+
+#define BP_PXP_DITHER_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK0_L_CH0      (0x00000af0)
+
+#define BP_PXP_DITHER_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK1_H_CH0      (0x00000b00)
+
+#define BP_PXP_DITHER_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK1_L_CH0      (0x00000b10)
+
+#define BP_PXP_DITHER_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK2_H_CH0      (0x00000b20)
+
+#define BP_PXP_DITHER_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK2_L_CH0      (0x00000b30)
+
+#define BP_PXP_DITHER_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK3_H_CH0      (0x00000b40)
+
+#define BP_PXP_DITHER_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK3_L_CH0      (0x00000b50)
+
+#define BP_PXP_DITHER_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK4_H_CH0      (0x00000b60)
+
+#define BP_PXP_DITHER_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK4_L_CH0      (0x00000b70)
+
+#define BP_PXP_DITHER_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK5_H_CH0      (0x00000b80)
+
+#define BP_PXP_DITHER_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK5_L_CH0      (0x00000b90)
+
+#define BP_PXP_DITHER_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK6_H_CH0      (0x00000ba0)
+
+#define BP_PXP_DITHER_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK6_L_CH0      (0x00000bb0)
+
+#define BP_PXP_DITHER_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK7_H_CH0      (0x00000bc0)
+
+#define BP_PXP_DITHER_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_MASK7_L_CH0      (0x00000bd0)
+
+#define BP_PXP_DITHER_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0      0
+#define BM_PXP_DITHER_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0 0xFFFFFFFF
+#define BF_PXP_DITHER_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0(v)   (v)
+
+#define HW_PXP_DITHER_STORE_D_SHIFT_L_CH0      (0x00000be0)
+
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3 0x80000000
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3(v) \
+        (((v) << 31) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3)
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD0 0x40000000
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD0(v)  \
+        (((v) << 30) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD0)
+#define BP_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3      24
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3 0x3F000000
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3(v)  \
+        (((v) << 24) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3)
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2 0x00800000
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2(v)  \
+        (((v) << 23) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2)
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD1 0x00400000
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD1)
+#define BP_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2      16
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2 0x003F0000
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2(v)  \
+        (((v) << 16) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2)
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1 0x00008000
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1(v)  \
+        (((v) << 15) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1)
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD2 0x00004000
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD2)
+#define BP_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1      8
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1 0x00003F00
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1(v)  \
+        (((v) << 8) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1)
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0 0x00000080
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0(v)  \
+        (((v) << 7) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0)
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD3 0x00000040
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_RSVD3)
+#define BP_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0      0
+#define BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0 0x0000003F
+#define BF_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0)
+
+#define HW_PXP_DITHER_STORE_D_SHIFT_H_CH0      (0x00000bf0)
+
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7 0x80000000
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7(v) \
+        (((v) << 31) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7)
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD0 0x40000000
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD0(v)  \
+        (((v) << 30) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD0)
+#define BP_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7      24
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7 0x3F000000
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7(v)  \
+        (((v) << 24) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7)
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6 0x00800000
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6(v)  \
+        (((v) << 23) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6)
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD1 0x00400000
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD1)
+#define BP_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6      16
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6 0x003F0000
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6(v)  \
+        (((v) << 16) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6)
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5 0x00008000
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5(v)  \
+        (((v) << 15) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5)
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD2 0x00004000
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD2)
+#define BP_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5      8
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5 0x00003F00
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5(v)  \
+        (((v) << 8) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5)
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4 0x00000080
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4(v)  \
+        (((v) << 7) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4)
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD3 0x00000040
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_RSVD3)
+#define BP_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4      0
+#define BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4 0x0000003F
+#define BF_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4)
+
+#define HW_PXP_DITHER_STORE_F_SHIFT_L_CH0      (0x00000c00)
+
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD0 0x80000000
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD0(v) \
+        (((v) << 31) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD0)
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3 0x40000000
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3(v)  \
+        (((v) << 30) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3)
+#define BP_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3      24
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3 0x3F000000
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3(v)  \
+        (((v) << 24) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3)
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD1 0x00800000
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD1(v)  \
+        (((v) << 23) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD1)
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2 0x00400000
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2(v)  \
+        (((v) << 22) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2)
+#define BP_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2      16
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2 0x003F0000
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2(v)  \
+        (((v) << 16) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2)
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD2 0x00008000
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD2(v)  \
+        (((v) << 15) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD2)
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1 0x00004000
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1(v)  \
+        (((v) << 14) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1)
+#define BP_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1      8
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1 0x00003F00
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1(v)  \
+        (((v) << 8) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1)
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD3 0x00000080
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_RSVD3)
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0 0x00000040
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0(v)  \
+        (((v) << 6) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0)
+#define BP_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0      0
+#define BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0 0x0000003F
+#define BF_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0)
+
+#define HW_PXP_DITHER_STORE_F_SHIFT_H_CH0      (0x00000c10)
+
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD0 0x80000000
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD0(v) \
+        (((v) << 31) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD0)
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7 0x40000000
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7(v)  \
+        (((v) << 30) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7)
+#define BP_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7      24
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7 0x3F000000
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7(v)  \
+        (((v) << 24) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7)
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD1 0x00800000
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD1(v)  \
+        (((v) << 23) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD1)
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6 0x00400000
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6(v)  \
+        (((v) << 22) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6)
+#define BP_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6      16
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6 0x003F0000
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6(v)  \
+        (((v) << 16) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6)
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD2 0x00008000
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD2(v)  \
+        (((v) << 15) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD2)
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5 0x00004000
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5(v)  \
+        (((v) << 14) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5)
+#define BP_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5      8
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5 0x00003F00
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5(v)  \
+        (((v) << 8) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5)
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD3 0x00000080
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_RSVD3)
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4 0x00000040
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4(v)  \
+        (((v) << 6) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4)
+#define BP_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4      0
+#define BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4 0x0000003F
+#define BF_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4)
+
+#define HW_PXP_DITHER_STORE_F_MASK_L_CH0       (0x00000c20)
+
+#define BP_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK3      24
+#define BM_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK3 0xFF000000
+#define BF_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK3(v) \
+        (((v) << 24) & BM_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK3)
+#define BP_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK2      16
+#define BM_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK2 0x00FF0000
+#define BF_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK2(v)  \
+        (((v) << 16) & BM_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK2)
+#define BP_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK1      8
+#define BM_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK1 0x0000FF00
+#define BF_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK1(v)  \
+        (((v) << 8) & BM_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK1)
+#define BP_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK0      0
+#define BM_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK0 0x000000FF
+#define BF_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK0(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_F_MASK_L_CH0_F_MASK0)
+
+#define HW_PXP_DITHER_STORE_F_MASK_H_CH0       (0x00000c30)
+
+#define BP_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK7      24
+#define BM_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK7 0xFF000000
+#define BF_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK7(v) \
+        (((v) << 24) & BM_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK7)
+#define BP_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK6      16
+#define BM_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK6 0x00FF0000
+#define BF_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK6(v)  \
+        (((v) << 16) & BM_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK6)
+#define BP_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK5      8
+#define BM_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK5 0x0000FF00
+#define BF_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK5(v)  \
+        (((v) << 8) & BM_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK5)
+#define BP_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK4      0
+#define BM_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK4 0x000000FF
+#define BF_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK4(v)  \
+        (((v) << 0) & BM_PXP_DITHER_STORE_F_MASK_H_CH0_F_MASK4)
+
+#define HW_PXP_WFA_FETCH_CTRL  (0x00000c40)
+#define HW_PXP_WFA_FETCH_CTRL_SET      (0x00000c44)
+#define HW_PXP_WFA_FETCH_CTRL_CLR      (0x00000c48)
+#define HW_PXP_WFA_FETCH_CTRL_TOG      (0x00000c4c)
+
+#define BM_PXP_WFA_FETCH_CTRL_BUF2_DONE_IRQ_EN 0x80000000
+#define BF_PXP_WFA_FETCH_CTRL_BUF2_DONE_IRQ_EN(v) \
+        (((v) << 31) & BM_PXP_WFA_FETCH_CTRL_BUF2_DONE_IRQ_EN)
+#define BM_PXP_WFA_FETCH_CTRL_BUF1_DONE_IRQ_EN 0x40000000
+#define BF_PXP_WFA_FETCH_CTRL_BUF1_DONE_IRQ_EN(v)  \
+        (((v) << 30) & BM_PXP_WFA_FETCH_CTRL_BUF1_DONE_IRQ_EN)
+#define BM_PXP_WFA_FETCH_CTRL_BUF2_DONE_IRQ 0x20000000
+#define BF_PXP_WFA_FETCH_CTRL_BUF2_DONE_IRQ(v)  \
+        (((v) << 29) & BM_PXP_WFA_FETCH_CTRL_BUF2_DONE_IRQ)
+#define BM_PXP_WFA_FETCH_CTRL_BUF1_DONE_IRQ 0x10000000
+#define BF_PXP_WFA_FETCH_CTRL_BUF1_DONE_IRQ(v)  \
+        (((v) << 28) & BM_PXP_WFA_FETCH_CTRL_BUF1_DONE_IRQ)
+#define BP_PXP_WFA_FETCH_CTRL_RSVD0      24
+#define BM_PXP_WFA_FETCH_CTRL_RSVD0 0x0F000000
+#define BF_PXP_WFA_FETCH_CTRL_RSVD0(v)  \
+        (((v) << 24) & BM_PXP_WFA_FETCH_CTRL_RSVD0)
+#define BP_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE      22
+#define BM_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE 0x00C00000
+#define BF_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE(v)  \
+        (((v) << 22) & BM_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE)
+#define BV_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE__1 0x1
+#define BV_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE__2 0x2
+#define BV_PXP_WFA_FETCH_CTRL_BF2_LINE_MODE__3 0x3
+#define BP_PXP_WFA_FETCH_CTRL_BF2_BYTES_PP      20
+#define BM_PXP_WFA_FETCH_CTRL_BF2_BYTES_PP 0x00300000
+#define BF_PXP_WFA_FETCH_CTRL_BF2_BYTES_PP(v)  \
+        (((v) << 20) & BM_PXP_WFA_FETCH_CTRL_BF2_BYTES_PP)
+#define BP_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE      18
+#define BM_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE 0x000C0000
+#define BF_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE(v)  \
+        (((v) << 18) & BM_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE)
+#define BV_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE__1 0x1
+#define BV_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE__2 0x2
+#define BV_PXP_WFA_FETCH_CTRL_BF1_LINE_MODE__3 0x3
+#define BP_PXP_WFA_FETCH_CTRL_BF1_BYTES_PP      16
+#define BM_PXP_WFA_FETCH_CTRL_BF1_BYTES_PP 0x00030000
+#define BF_PXP_WFA_FETCH_CTRL_BF1_BYTES_PP(v)  \
+        (((v) << 16) & BM_PXP_WFA_FETCH_CTRL_BF1_BYTES_PP)
+#define BP_PXP_WFA_FETCH_CTRL_RSVD1      14
+#define BM_PXP_WFA_FETCH_CTRL_RSVD1 0x0000C000
+#define BF_PXP_WFA_FETCH_CTRL_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_WFA_FETCH_CTRL_RSVD1)
+#define BM_PXP_WFA_FETCH_CTRL_BF2_BORDER_MODE 0x00002000
+#define BF_PXP_WFA_FETCH_CTRL_BF2_BORDER_MODE(v)  \
+        (((v) << 13) & BM_PXP_WFA_FETCH_CTRL_BF2_BORDER_MODE)
+#define BV_PXP_WFA_FETCH_CTRL_BF2_BORDER_MODE__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF2_BORDER_MODE__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF2_BURST_LEN 0x00001000
+#define BF_PXP_WFA_FETCH_CTRL_BF2_BURST_LEN(v)  \
+        (((v) << 12) & BM_PXP_WFA_FETCH_CTRL_BF2_BURST_LEN)
+#define BV_PXP_WFA_FETCH_CTRL_BF2_BURST_LEN__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF2_BURST_LEN__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF2_BYPASS_MODE 0x00000800
+#define BF_PXP_WFA_FETCH_CTRL_BF2_BYPASS_MODE(v)  \
+        (((v) << 11) & BM_PXP_WFA_FETCH_CTRL_BF2_BYPASS_MODE)
+#define BV_PXP_WFA_FETCH_CTRL_BF2_BYPASS_MODE__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF2_BYPASS_MODE__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF2_HSK_MODE 0x00000400
+#define BF_PXP_WFA_FETCH_CTRL_BF2_HSK_MODE(v)  \
+        (((v) << 10) & BM_PXP_WFA_FETCH_CTRL_BF2_HSK_MODE)
+#define BV_PXP_WFA_FETCH_CTRL_BF2_HSK_MODE__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF2_HSK_MODE__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF2_SRAM_IF 0x00000200
+#define BF_PXP_WFA_FETCH_CTRL_BF2_SRAM_IF(v)  \
+        (((v) << 9) & BM_PXP_WFA_FETCH_CTRL_BF2_SRAM_IF)
+#define BV_PXP_WFA_FETCH_CTRL_BF2_SRAM_IF__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF2_SRAM_IF__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF2_EN 0x00000100
+#define BF_PXP_WFA_FETCH_CTRL_BF2_EN(v)  \
+        (((v) << 8) & BM_PXP_WFA_FETCH_CTRL_BF2_EN)
+#define BV_PXP_WFA_FETCH_CTRL_BF2_EN__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF2_EN__1 0x1
+#define BP_PXP_WFA_FETCH_CTRL_RSVD2      6
+#define BM_PXP_WFA_FETCH_CTRL_RSVD2 0x000000C0
+#define BF_PXP_WFA_FETCH_CTRL_RSVD2(v)  \
+        (((v) << 6) & BM_PXP_WFA_FETCH_CTRL_RSVD2)
+#define BM_PXP_WFA_FETCH_CTRL_BF1_BORDER_MODE 0x00000020
+#define BF_PXP_WFA_FETCH_CTRL_BF1_BORDER_MODE(v)  \
+        (((v) << 5) & BM_PXP_WFA_FETCH_CTRL_BF1_BORDER_MODE)
+#define BV_PXP_WFA_FETCH_CTRL_BF1_BORDER_MODE__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF1_BORDER_MODE__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF1_BURST_LEN 0x00000010
+#define BF_PXP_WFA_FETCH_CTRL_BF1_BURST_LEN(v)  \
+        (((v) << 4) & BM_PXP_WFA_FETCH_CTRL_BF1_BURST_LEN)
+#define BV_PXP_WFA_FETCH_CTRL_BF1_BURST_LEN__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF1_BURST_LEN__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF1_BYPASS_MODE 0x00000008
+#define BF_PXP_WFA_FETCH_CTRL_BF1_BYPASS_MODE(v)  \
+        (((v) << 3) & BM_PXP_WFA_FETCH_CTRL_BF1_BYPASS_MODE)
+#define BV_PXP_WFA_FETCH_CTRL_BF1_BYPASS_MODE__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF1_BYPASS_MODE__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF1_HSK_MODE 0x00000004
+#define BF_PXP_WFA_FETCH_CTRL_BF1_HSK_MODE(v)  \
+        (((v) << 2) & BM_PXP_WFA_FETCH_CTRL_BF1_HSK_MODE)
+#define BV_PXP_WFA_FETCH_CTRL_BF1_HSK_MODE__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF1_HSK_MODE__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF1_SRAM_IF 0x00000002
+#define BF_PXP_WFA_FETCH_CTRL_BF1_SRAM_IF(v)  \
+        (((v) << 1) & BM_PXP_WFA_FETCH_CTRL_BF1_SRAM_IF)
+#define BV_PXP_WFA_FETCH_CTRL_BF1_SRAM_IF__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF1_SRAM_IF__1 0x1
+#define BM_PXP_WFA_FETCH_CTRL_BF1_EN 0x00000001
+#define BF_PXP_WFA_FETCH_CTRL_BF1_EN(v)  \
+        (((v) << 0) & BM_PXP_WFA_FETCH_CTRL_BF1_EN)
+#define BV_PXP_WFA_FETCH_CTRL_BF1_EN__0 0x0
+#define BV_PXP_WFA_FETCH_CTRL_BF1_EN__1 0x1
+
+#define HW_PXP_WFA_FETCH_BUF1_ADDR     (0x00000c50)
+
+#define BP_PXP_WFA_FETCH_BUF1_ADDR_BUF_ADDR      0
+#define BM_PXP_WFA_FETCH_BUF1_ADDR_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_WFA_FETCH_BUF1_ADDR_BUF_ADDR(v)   (v)
+
+#define HW_PXP_WFA_FETCH_BUF1_PITCH    (0x00000c60)
+
+#define BP_PXP_WFA_FETCH_BUF1_PITCH_RSVD      16
+#define BM_PXP_WFA_FETCH_BUF1_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_WFA_FETCH_BUF1_PITCH_RSVD(v) \
+        (((v) << 16) & BM_PXP_WFA_FETCH_BUF1_PITCH_RSVD)
+#define BP_PXP_WFA_FETCH_BUF1_PITCH_PITCH      0
+#define BM_PXP_WFA_FETCH_BUF1_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_WFA_FETCH_BUF1_PITCH_PITCH(v)  \
+        (((v) << 0) & BM_PXP_WFA_FETCH_BUF1_PITCH_PITCH)
+
+#define HW_PXP_WFA_FETCH_BUF1_SIZE     (0x00000c70)
+
+#define BP_PXP_WFA_FETCH_BUF1_SIZE_RSVD0      30
+#define BM_PXP_WFA_FETCH_BUF1_SIZE_RSVD0 0xC0000000
+#define BF_PXP_WFA_FETCH_BUF1_SIZE_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_FETCH_BUF1_SIZE_RSVD0)
+#define BP_PXP_WFA_FETCH_BUF1_SIZE_BUF_HEIGHT      16
+#define BM_PXP_WFA_FETCH_BUF1_SIZE_BUF_HEIGHT 0x3FFF0000
+#define BF_PXP_WFA_FETCH_BUF1_SIZE_BUF_HEIGHT(v)  \
+        (((v) << 16) & BM_PXP_WFA_FETCH_BUF1_SIZE_BUF_HEIGHT)
+#define BP_PXP_WFA_FETCH_BUF1_SIZE_RSVD1      14
+#define BM_PXP_WFA_FETCH_BUF1_SIZE_RSVD1 0x0000C000
+#define BF_PXP_WFA_FETCH_BUF1_SIZE_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_WFA_FETCH_BUF1_SIZE_RSVD1)
+#define BP_PXP_WFA_FETCH_BUF1_SIZE_BUF_WIDTH      0
+#define BM_PXP_WFA_FETCH_BUF1_SIZE_BUF_WIDTH 0x00003FFF
+#define BF_PXP_WFA_FETCH_BUF1_SIZE_BUF_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFA_FETCH_BUF1_SIZE_BUF_WIDTH)
+
+#define HW_PXP_WFA_FETCH_BUF2_ADDR     (0x00000c80)
+
+#define BP_PXP_WFA_FETCH_BUF2_ADDR_BUF_ADDR      0
+#define BM_PXP_WFA_FETCH_BUF2_ADDR_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_WFA_FETCH_BUF2_ADDR_BUF_ADDR(v)   (v)
+
+#define HW_PXP_WFA_FETCH_BUF2_PITCH    (0x00000c90)
+
+#define BP_PXP_WFA_FETCH_BUF2_PITCH_RSVD      16
+#define BM_PXP_WFA_FETCH_BUF2_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_WFA_FETCH_BUF2_PITCH_RSVD(v) \
+        (((v) << 16) & BM_PXP_WFA_FETCH_BUF2_PITCH_RSVD)
+#define BP_PXP_WFA_FETCH_BUF2_PITCH_PITCH      0
+#define BM_PXP_WFA_FETCH_BUF2_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_WFA_FETCH_BUF2_PITCH_PITCH(v)  \
+        (((v) << 0) & BM_PXP_WFA_FETCH_BUF2_PITCH_PITCH)
+
+#define HW_PXP_WFA_FETCH_BUF2_SIZE     (0x00000ca0)
+
+#define BP_PXP_WFA_FETCH_BUF2_SIZE_RSVD0      30
+#define BM_PXP_WFA_FETCH_BUF2_SIZE_RSVD0 0xC0000000
+#define BF_PXP_WFA_FETCH_BUF2_SIZE_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_FETCH_BUF2_SIZE_RSVD0)
+#define BP_PXP_WFA_FETCH_BUF2_SIZE_BUF_HEIGHT      16
+#define BM_PXP_WFA_FETCH_BUF2_SIZE_BUF_HEIGHT 0x3FFF0000
+#define BF_PXP_WFA_FETCH_BUF2_SIZE_BUF_HEIGHT(v)  \
+        (((v) << 16) & BM_PXP_WFA_FETCH_BUF2_SIZE_BUF_HEIGHT)
+#define BP_PXP_WFA_FETCH_BUF2_SIZE_RSVD1      14
+#define BM_PXP_WFA_FETCH_BUF2_SIZE_RSVD1 0x0000C000
+#define BF_PXP_WFA_FETCH_BUF2_SIZE_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_WFA_FETCH_BUF2_SIZE_RSVD1)
+#define BP_PXP_WFA_FETCH_BUF2_SIZE_BUF_WIDTH      0
+#define BM_PXP_WFA_FETCH_BUF2_SIZE_BUF_WIDTH 0x00003FFF
+#define BF_PXP_WFA_FETCH_BUF2_SIZE_BUF_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFA_FETCH_BUF2_SIZE_BUF_WIDTH)
+
+#define HW_PXP_WFA_ARRAY_PIXEL0_MASK   (0x00000cb0)
+
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_PIXEL0_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL0_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_PIXEL0_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL0_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_PIXEL0_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_PIXEL0_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_PIXEL0_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_PIXEL0_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_PIXEL1_MASK   (0x00000cc0)
+
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_PIXEL1_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL1_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_PIXEL1_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL1_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_PIXEL1_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_PIXEL1_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_PIXEL1_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_PIXEL1_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_PIXEL2_MASK   (0x00000cd0)
+
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_PIXEL2_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL2_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_PIXEL2_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL2_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_PIXEL2_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_PIXEL2_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_PIXEL2_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_PIXEL2_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_PIXEL3_MASK   (0x00000ce0)
+
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_PIXEL3_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL3_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_PIXEL3_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL3_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_PIXEL3_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_PIXEL3_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_PIXEL3_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_PIXEL3_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_PIXEL4_MASK   (0x00000cf0)
+
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_PIXEL4_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL4_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_PIXEL4_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL4_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_PIXEL4_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_PIXEL4_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_PIXEL4_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_PIXEL4_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_PIXEL5_MASK   (0x00000d00)
+
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_PIXEL5_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL5_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_PIXEL5_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL5_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_PIXEL5_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_PIXEL5_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_PIXEL5_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_PIXEL5_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_PIXEL6_MASK   (0x00000d10)
+
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_PIXEL6_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL6_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_PIXEL6_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL6_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_PIXEL6_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_PIXEL6_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_PIXEL6_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_PIXEL6_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_PIXEL7_MASK   (0x00000d20)
+
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_PIXEL7_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL7_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_PIXEL7_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_PIXEL7_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_PIXEL7_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_PIXEL7_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_PIXEL7_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_PIXEL7_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG0_MASK    (0x00000d30)
+
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG0_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG0_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG0_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG0_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG0_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG0_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG0_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG0_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG0_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG0_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG0_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG0_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG0_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG1_MASK    (0x00000d40)
+
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG1_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG1_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG1_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG1_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG1_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG1_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG1_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG1_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG1_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG1_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG1_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG1_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG1_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG2_MASK    (0x00000d50)
+
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG2_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG2_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG2_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG2_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG2_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG2_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG2_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG2_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG2_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG2_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG2_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG2_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG2_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG3_MASK    (0x00000d60)
+
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG3_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG3_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG3_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG3_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG3_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG3_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG3_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG3_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG3_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG3_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG3_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG3_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG3_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG4_MASK    (0x00000d70)
+
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG4_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG4_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG4_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG4_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG4_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG4_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG4_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG4_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG4_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG4_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG4_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG4_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG4_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG5_MASK    (0x00000d80)
+
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG5_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG5_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG5_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG5_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG5_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG5_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG5_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG5_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG5_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG5_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG5_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG5_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG5_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG6_MASK    (0x00000d90)
+
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG6_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG6_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG6_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG6_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG6_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG6_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG6_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG6_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG6_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG6_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG6_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG6_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG6_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG7_MASK    (0x00000da0)
+
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG7_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG7_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG7_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG7_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG7_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG7_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG7_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG7_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG7_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG7_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG7_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG7_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG7_MASK_L_OFS)
+
+#define HW_PXP_WFA_FETCH_BUF1_CORD     (0x00000db0)
+
+#define BP_PXP_WFA_FETCH_BUF1_CORD_RSVD0      30
+#define BM_PXP_WFA_FETCH_BUF1_CORD_RSVD0 0xC0000000
+#define BF_PXP_WFA_FETCH_BUF1_CORD_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_FETCH_BUF1_CORD_RSVD0)
+#define BP_PXP_WFA_FETCH_BUF1_CORD_YCORD      16
+#define BM_PXP_WFA_FETCH_BUF1_CORD_YCORD 0x3FFF0000
+#define BF_PXP_WFA_FETCH_BUF1_CORD_YCORD(v)  \
+        (((v) << 16) & BM_PXP_WFA_FETCH_BUF1_CORD_YCORD)
+#define BP_PXP_WFA_FETCH_BUF1_CORD_RSVD1      14
+#define BM_PXP_WFA_FETCH_BUF1_CORD_RSVD1 0x0000C000
+#define BF_PXP_WFA_FETCH_BUF1_CORD_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_WFA_FETCH_BUF1_CORD_RSVD1)
+#define BP_PXP_WFA_FETCH_BUF1_CORD_XCORD      0
+#define BM_PXP_WFA_FETCH_BUF1_CORD_XCORD 0x00003FFF
+#define BF_PXP_WFA_FETCH_BUF1_CORD_XCORD(v)  \
+        (((v) << 0) & BM_PXP_WFA_FETCH_BUF1_CORD_XCORD)
+
+#define HW_PXP_WFA_FETCH_BUF2_CORD     (0x00000dc0)
+
+#define BP_PXP_WFA_FETCH_BUF2_CORD_RSVD0      30
+#define BM_PXP_WFA_FETCH_BUF2_CORD_RSVD0 0xC0000000
+#define BF_PXP_WFA_FETCH_BUF2_CORD_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_FETCH_BUF2_CORD_RSVD0)
+#define BP_PXP_WFA_FETCH_BUF2_CORD_YCORD      16
+#define BM_PXP_WFA_FETCH_BUF2_CORD_YCORD 0x3FFF0000
+#define BF_PXP_WFA_FETCH_BUF2_CORD_YCORD(v)  \
+        (((v) << 16) & BM_PXP_WFA_FETCH_BUF2_CORD_YCORD)
+#define BP_PXP_WFA_FETCH_BUF2_CORD_RSVD1      14
+#define BM_PXP_WFA_FETCH_BUF2_CORD_RSVD1 0x0000C000
+#define BF_PXP_WFA_FETCH_BUF2_CORD_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_WFA_FETCH_BUF2_CORD_RSVD1)
+#define BP_PXP_WFA_FETCH_BUF2_CORD_XCORD      0
+#define BM_PXP_WFA_FETCH_BUF2_CORD_XCORD 0x00003FFF
+#define BF_PXP_WFA_FETCH_BUF2_CORD_XCORD(v)  \
+        (((v) << 0) & BM_PXP_WFA_FETCH_BUF2_CORD_XCORD)
+
+#define HW_PXP_WFA_ARRAY_FLAG8_MASK    (0x00000dd0)
+
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG8_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG8_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG8_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG8_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG8_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG8_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG8_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG8_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG8_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG8_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG8_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG8_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG8_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG9_MASK    (0x00000de0)
+
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG9_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG9_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG9_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG9_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG9_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG9_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG9_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG9_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG9_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG9_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG9_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG9_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG9_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG10_MASK   (0x00000df0)
+
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG10_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG10_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG10_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG10_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG10_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG10_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG10_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG10_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG10_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG10_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG10_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG10_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG10_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG11_MASK   (0x00000e00)
+
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG11_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG11_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG11_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG11_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG11_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG11_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG11_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG11_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG11_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG11_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG11_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG11_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG11_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG12_MASK   (0x00000e10)
+
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG12_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG12_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG12_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG12_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG12_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG12_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG12_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG12_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG12_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG12_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG12_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG12_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG12_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG13_MASK   (0x00000e20)
+
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG13_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG13_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG13_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG13_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG13_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG13_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG13_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG13_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG13_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG13_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG13_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG13_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG13_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG14_MASK   (0x00000e30)
+
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG14_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG14_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG14_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG14_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG14_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG14_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG14_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG14_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG14_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG14_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG14_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG14_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG14_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_FLAG15_MASK   (0x00000e40)
+
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_RSVD0      30
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD0)
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_BUF_SEL      28
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFA_ARRAY_FLAG15_MASK_BUF_SEL)
+#define BV_PXP_WFA_ARRAY_FLAG15_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG15_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFA_ARRAY_FLAG15_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_RSVD1      26
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD1)
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_Y)
+#define BV_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_X)
+#define BV_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFA_ARRAY_FLAG15_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_RSVD2      22
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD2)
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_OFFSET_Y      20
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFA_ARRAY_FLAG15_MASK_OFFSET_Y)
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_RSVD3      18
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD3)
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_OFFSET_X      16
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_FLAG15_MASK_OFFSET_X)
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_RSVD4      13
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD4)
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_H_OFS      8
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_FLAG15_MASK_H_OFS)
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_RSVD5      5
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_FLAG15_MASK_RSVD5)
+#define BP_PXP_WFA_ARRAY_FLAG15_MASK_L_OFS      0
+#define BM_PXP_WFA_ARRAY_FLAG15_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFA_ARRAY_FLAG15_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_FLAG15_MASK_L_OFS)
+
+#define HW_PXP_WFA_ARRAY_REG0  (0x00000e50)
+
+#define BP_PXP_WFA_ARRAY_REG0_SW_PIXLE3      24
+#define BM_PXP_WFA_ARRAY_REG0_SW_PIXLE3 0xFF000000
+#define BF_PXP_WFA_ARRAY_REG0_SW_PIXLE3(v) \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_REG0_SW_PIXLE3)
+#define BP_PXP_WFA_ARRAY_REG0_SW_PIXLE2      16
+#define BM_PXP_WFA_ARRAY_REG0_SW_PIXLE2 0x00FF0000
+#define BF_PXP_WFA_ARRAY_REG0_SW_PIXLE2(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_REG0_SW_PIXLE2)
+#define BP_PXP_WFA_ARRAY_REG0_SW_PIXLE1      8
+#define BM_PXP_WFA_ARRAY_REG0_SW_PIXLE1 0x0000FF00
+#define BF_PXP_WFA_ARRAY_REG0_SW_PIXLE1(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_REG0_SW_PIXLE1)
+#define BP_PXP_WFA_ARRAY_REG0_SW_PIXLE0      0
+#define BM_PXP_WFA_ARRAY_REG0_SW_PIXLE0 0x000000FF
+#define BF_PXP_WFA_ARRAY_REG0_SW_PIXLE0(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_REG0_SW_PIXLE0)
+
+#define HW_PXP_WFA_ARRAY_REG1  (0x00000e60)
+
+#define BP_PXP_WFA_ARRAY_REG1_SW_PIXLE7      24
+#define BM_PXP_WFA_ARRAY_REG1_SW_PIXLE7 0xFF000000
+#define BF_PXP_WFA_ARRAY_REG1_SW_PIXLE7(v) \
+        (((v) << 24) & BM_PXP_WFA_ARRAY_REG1_SW_PIXLE7)
+#define BP_PXP_WFA_ARRAY_REG1_SW_PIXLE6      16
+#define BM_PXP_WFA_ARRAY_REG1_SW_PIXLE6 0x00FF0000
+#define BF_PXP_WFA_ARRAY_REG1_SW_PIXLE6(v)  \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_REG1_SW_PIXLE6)
+#define BP_PXP_WFA_ARRAY_REG1_SW_PIXLE5      8
+#define BM_PXP_WFA_ARRAY_REG1_SW_PIXLE5 0x0000FF00
+#define BF_PXP_WFA_ARRAY_REG1_SW_PIXLE5(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_REG1_SW_PIXLE5)
+#define BP_PXP_WFA_ARRAY_REG1_SW_PIXLE4      0
+#define BM_PXP_WFA_ARRAY_REG1_SW_PIXLE4 0x000000FF
+#define BF_PXP_WFA_ARRAY_REG1_SW_PIXLE4(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_REG1_SW_PIXLE4)
+
+#define HW_PXP_WFA_ARRAY_REG2  (0x00000e70)
+
+#define BP_PXP_WFA_ARRAY_REG2_RSVD0      16
+#define BM_PXP_WFA_ARRAY_REG2_RSVD0 0xFFFF0000
+#define BF_PXP_WFA_ARRAY_REG2_RSVD0(v) \
+        (((v) << 16) & BM_PXP_WFA_ARRAY_REG2_RSVD0)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG15 0x00008000
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG15(v)  \
+        (((v) << 15) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG15)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG14 0x00004000
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG14(v)  \
+        (((v) << 14) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG14)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG13 0x00002000
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG13(v)  \
+        (((v) << 13) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG13)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG12 0x00001000
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG12(v)  \
+        (((v) << 12) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG12)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG11 0x00000800
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG11(v)  \
+        (((v) << 11) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG11)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG10 0x00000400
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG10(v)  \
+        (((v) << 10) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG10)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG9 0x00000200
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG9(v)  \
+        (((v) << 9) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG9)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG8 0x00000100
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG8(v)  \
+        (((v) << 8) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG8)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG7 0x00000080
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG7(v)  \
+        (((v) << 7) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG7)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG6 0x00000040
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG6(v)  \
+        (((v) << 6) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG6)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG5 0x00000020
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG5(v)  \
+        (((v) << 5) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG5)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG4 0x00000010
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG4(v)  \
+        (((v) << 4) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG4)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG3 0x00000008
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG3(v)  \
+        (((v) << 3) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG3)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG2 0x00000004
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG2(v)  \
+        (((v) << 2) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG2)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG1 0x00000002
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG1(v)  \
+        (((v) << 1) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG1)
+#define BM_PXP_WFA_ARRAY_REG2_SW_FLAG0 0x00000001
+#define BF_PXP_WFA_ARRAY_REG2_SW_FLAG0(v)  \
+        (((v) << 0) & BM_PXP_WFA_ARRAY_REG2_SW_FLAG0)
+
+#define HW_PXP_WFE_A_STORE_CTRL_CH0    (0x00000e80)
+#define HW_PXP_WFE_A_STORE_CTRL_CH0_SET        (0x00000e84)
+#define HW_PXP_WFE_A_STORE_CTRL_CH0_CLR        (0x00000e88)
+#define HW_PXP_WFE_A_STORE_CTRL_CH0_TOG        (0x00000e8c)
+
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_ARBIT_EN 0x80000000
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_ARBIT_EN(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STORE_CTRL_CH0_ARBIT_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_ARBIT_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_ARBIT_EN__1 0x1
+#define BP_PXP_WFE_A_STORE_CTRL_CH0_RSVD0      25
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_RSVD0 0x7E000000
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_RSVD0(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STORE_CTRL_CH0_RSVD0)
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_COMBINE_2CHANNEL 0x01000000
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_COMBINE_2CHANNEL(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STORE_CTRL_CH0_COMBINE_2CHANNEL)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_COMBINE_2CHANNEL__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_COMBINE_2CHANNEL__1 0x1
+#define BP_PXP_WFE_A_STORE_CTRL_CH0_RSVD1      18
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_RSVD1 0x00FC0000
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_RSVD1(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STORE_CTRL_CH0_RSVD1)
+#define BP_PXP_WFE_A_STORE_CTRL_CH0_WR_NUM_BYTES      16
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_WR_NUM_BYTES 0x00030000
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_WR_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_CTRL_CH0_WR_NUM_BYTES)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_WR_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_WR_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_WR_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_WR_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_WFE_A_STORE_CTRL_CH0_RSVD2      12
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_RSVD2 0x0000F000
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_RSVD2(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STORE_CTRL_CH0_RSVD2)
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_FILL_DATA_EN 0x00000800
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_FILL_DATA_EN(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STORE_CTRL_CH0_FILL_DATA_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_FILL_DATA_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_FILL_DATA_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_PACK_IN_SEL 0x00000400
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_PACK_IN_SEL(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STORE_CTRL_CH0_PACK_IN_SEL)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_PACK_IN_SEL__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_PACK_IN_SEL__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_STORE_MEMORY_EN 0x00000200
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_STORE_MEMORY_EN(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STORE_CTRL_CH0_STORE_MEMORY_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_STORE_MEMORY_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_STORE_MEMORY_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_STORE_BYPASS_EN 0x00000100
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_STORE_BYPASS_EN(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STORE_CTRL_CH0_STORE_BYPASS_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_STORE_BYPASS_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_STORE_BYPASS_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_RSVD3 0x00000080
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STORE_CTRL_CH0_RSVD3)
+#define BP_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_LINE_NUM      5
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_LINE_NUM 0x00000060
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_LINE_NUM(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_LINE_NUM)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_LINE_NUM__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_LINE_NUM__1 0x1
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_LINE_NUM__2 0x2
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_LINE_NUM__3 0x3
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_EN 0x00000010
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_EN(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_ARRAY_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_HANDSHAKE_EN 0x00000008
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STORE_CTRL_CH0_HANDSHAKE_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_HANDSHAKE_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_HANDSHAKE_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_16 0x00000004
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_16)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_16__8x8   0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_16__16x16 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_EN 0x00000002
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_BLOCK_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH0_CH_EN 0x00000001
+#define BF_PXP_WFE_A_STORE_CTRL_CH0_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_CTRL_CH0_CH_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_CH_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH0_CH_EN__1 0x1
+
+#define HW_PXP_WFE_A_STORE_CTRL_CH1    (0x00000e90)
+#define HW_PXP_WFE_A_STORE_CTRL_CH1_SET        (0x00000e94)
+#define HW_PXP_WFE_A_STORE_CTRL_CH1_CLR        (0x00000e98)
+#define HW_PXP_WFE_A_STORE_CTRL_CH1_TOG        (0x00000e9c)
+
+#define BP_PXP_WFE_A_STORE_CTRL_CH1_RSVD0      18
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_RSVD0 0xFFFC0000
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_RSVD0(v) \
+        (((v) << 18) & BM_PXP_WFE_A_STORE_CTRL_CH1_RSVD0)
+#define BP_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES      16
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES 0x00030000
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_WR_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_WFE_A_STORE_CTRL_CH1_RSVD1      11
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_RSVD1 0x0000F800
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_RSVD1(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STORE_CTRL_CH1_RSVD1)
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_PACK_IN_SEL 0x00000400
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_PACK_IN_SEL(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STORE_CTRL_CH1_PACK_IN_SEL)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_PACK_IN_SEL__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_PACK_IN_SEL__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_STORE_MEMORY_EN 0x00000200
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_STORE_MEMORY_EN(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STORE_CTRL_CH1_STORE_MEMORY_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_STORE_MEMORY_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_STORE_MEMORY_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_STORE_BYPASS_EN 0x00000100
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_STORE_BYPASS_EN(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STORE_CTRL_CH1_STORE_BYPASS_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_STORE_BYPASS_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_STORE_BYPASS_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_RSVD3 0x00000080
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STORE_CTRL_CH1_RSVD3)
+#define BP_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM      5
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM 0x00000060
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM__1 0x1
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM__2 0x2
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_LINE_NUM__3 0x3
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_EN 0x00000010
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_EN(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_ARRAY_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_HANDSHAKE_EN 0x00000008
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STORE_CTRL_CH1_HANDSHAKE_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_HANDSHAKE_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_HANDSHAKE_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_16 0x00000004
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_16)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_16__8x8   0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_16__16x16 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_EN 0x00000002
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_BLOCK_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_CTRL_CH1_CH_EN 0x00000001
+#define BF_PXP_WFE_A_STORE_CTRL_CH1_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_CTRL_CH1_CH_EN)
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_CH_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_CTRL_CH1_CH_EN__1 0x1
+
+#define HW_PXP_WFE_A_STORE_STATUS_CH0  (0x00000ea0)
+
+#define BP_PXP_WFE_A_STORE_STATUS_CH0_STORE_BLOCK_Y      16
+#define BM_PXP_WFE_A_STORE_STATUS_CH0_STORE_BLOCK_Y 0xFFFF0000
+#define BF_PXP_WFE_A_STORE_STATUS_CH0_STORE_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_STATUS_CH0_STORE_BLOCK_Y)
+#define BP_PXP_WFE_A_STORE_STATUS_CH0_STORE_BLOCK_X      0
+#define BM_PXP_WFE_A_STORE_STATUS_CH0_STORE_BLOCK_X 0x0000FFFF
+#define BF_PXP_WFE_A_STORE_STATUS_CH0_STORE_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_STATUS_CH0_STORE_BLOCK_X)
+
+#define HW_PXP_WFE_A_STORE_STATUS_CH1  (0x00000eb0)
+
+#define BP_PXP_WFE_A_STORE_STATUS_CH1_STORE_BLOCK_Y      16
+#define BM_PXP_WFE_A_STORE_STATUS_CH1_STORE_BLOCK_Y 0xFFFF0000
+#define BF_PXP_WFE_A_STORE_STATUS_CH1_STORE_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_STATUS_CH1_STORE_BLOCK_Y)
+#define BP_PXP_WFE_A_STORE_STATUS_CH1_STORE_BLOCK_X      0
+#define BM_PXP_WFE_A_STORE_STATUS_CH1_STORE_BLOCK_X 0x0000FFFF
+#define BF_PXP_WFE_A_STORE_STATUS_CH1_STORE_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_STATUS_CH1_STORE_BLOCK_X)
+
+#define HW_PXP_WFE_A_STORE_SIZE_CH0    (0x00000ec0)
+
+#define BP_PXP_WFE_A_STORE_SIZE_CH0_OUT_HEIGHT      16
+#define BM_PXP_WFE_A_STORE_SIZE_CH0_OUT_HEIGHT 0xFFFF0000
+#define BF_PXP_WFE_A_STORE_SIZE_CH0_OUT_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_SIZE_CH0_OUT_HEIGHT)
+#define BP_PXP_WFE_A_STORE_SIZE_CH0_OUT_WIDTH      0
+#define BM_PXP_WFE_A_STORE_SIZE_CH0_OUT_WIDTH 0x0000FFFF
+#define BF_PXP_WFE_A_STORE_SIZE_CH0_OUT_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_SIZE_CH0_OUT_WIDTH)
+
+#define HW_PXP_WFE_A_STORE_SIZE_CH1    (0x00000ed0)
+
+#define BP_PXP_WFE_A_STORE_SIZE_CH1_OUT_HEIGHT      16
+#define BM_PXP_WFE_A_STORE_SIZE_CH1_OUT_HEIGHT 0xFFFF0000
+#define BF_PXP_WFE_A_STORE_SIZE_CH1_OUT_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_SIZE_CH1_OUT_HEIGHT)
+#define BP_PXP_WFE_A_STORE_SIZE_CH1_OUT_WIDTH      0
+#define BM_PXP_WFE_A_STORE_SIZE_CH1_OUT_WIDTH 0x0000FFFF
+#define BF_PXP_WFE_A_STORE_SIZE_CH1_OUT_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_SIZE_CH1_OUT_WIDTH)
+
+#define HW_PXP_WFE_A_STORE_PITCH       (0x00000ee0)
+
+#define BP_PXP_WFE_A_STORE_PITCH_CH1_OUT_PITCH      16
+#define BM_PXP_WFE_A_STORE_PITCH_CH1_OUT_PITCH 0xFFFF0000
+#define BF_PXP_WFE_A_STORE_PITCH_CH1_OUT_PITCH(v) \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_PITCH_CH1_OUT_PITCH)
+#define BP_PXP_WFE_A_STORE_PITCH_CH0_OUT_PITCH      0
+#define BM_PXP_WFE_A_STORE_PITCH_CH0_OUT_PITCH 0x0000FFFF
+#define BF_PXP_WFE_A_STORE_PITCH_CH0_OUT_PITCH(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_PITCH_CH0_OUT_PITCH)
+
+#define HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH0      (0x00000ef0)
+#define HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_SET  (0x00000ef4)
+#define HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_CLR  (0x00000ef8)
+#define HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_TOG  (0x00000efc)
+
+#define BP_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD0      8
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD0 0xFFFFFF00
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD0(v) \
+        (((v) << 8) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD0)
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS 0x00000080
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS)
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS__0 0x0
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS__1 0x1
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD1 0x00000040
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD1(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD1)
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN 0x00000020
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN)
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN 0x00000010
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN)
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN__1 0x1
+#define BP_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP      2
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP 0x0000000C
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP)
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__3 0x3
+#define BP_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD2      0
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD2 0x00000003
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD2(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH0_RSVD2)
+
+#define HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH1      (0x00000f00)
+#define HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_SET  (0x00000f04)
+#define HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_CLR  (0x00000f08)
+#define HW_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_TOG  (0x00000f0c)
+
+#define BP_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_RSVD0      6
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_RSVD0 0xFFFFFFC0
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_RSVD0(v) \
+        (((v) << 6) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_RSVD0)
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN 0x00000020
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN)
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN__1 0x1
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN 0x00000010
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN)
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN__0 0x0
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN__1 0x1
+#define BP_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP      2
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP 0x0000000C
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP)
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__3 0x3
+#define BP_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_RSVD2      0
+#define BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_RSVD2 0x00000003
+#define BF_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_RSVD2(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_SHIFT_CTRL_CH1_RSVD2)
+
+#define HW_PXP_WFE_A_STORE_ADDR_0_CH0  (0x00000f50)
+
+#define BP_PXP_WFE_A_STORE_ADDR_0_CH0_OUT_BASE_ADDR0      0
+#define BM_PXP_WFE_A_STORE_ADDR_0_CH0_OUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_ADDR_0_CH0_OUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_ADDR_1_CH0  (0x00000f60)
+
+#define BP_PXP_WFE_A_STORE_ADDR_1_CH0_OUT_BASE_ADDR1      0
+#define BM_PXP_WFE_A_STORE_ADDR_1_CH0_OUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_ADDR_1_CH0_OUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_FILL_DATA_CH0       (0x00000f70)
+
+#define BP_PXP_WFE_A_STORE_FILL_DATA_CH0_FILL_DATA_CH0      0
+#define BM_PXP_WFE_A_STORE_FILL_DATA_CH0_FILL_DATA_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_FILL_DATA_CH0_FILL_DATA_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_ADDR_0_CH1  (0x00000f80)
+
+#define BP_PXP_WFE_A_STORE_ADDR_0_CH1_OUT_BASE_ADDR0      0
+#define BM_PXP_WFE_A_STORE_ADDR_0_CH1_OUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_ADDR_0_CH1_OUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_ADDR_1_CH1  (0x00000f90)
+
+#define BP_PXP_WFE_A_STORE_ADDR_1_CH1_OUT_BASE_ADDR1      0
+#define BM_PXP_WFE_A_STORE_ADDR_1_CH1_OUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_ADDR_1_CH1_OUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK0_H_CH0       (0x00000fa0)
+
+#define BP_PXP_WFE_A_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK0_L_CH0       (0x00000fb0)
+
+#define BP_PXP_WFE_A_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK1_H_CH0       (0x00000fc0)
+
+#define BP_PXP_WFE_A_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK1_L_CH0       (0x00000fd0)
+
+#define BP_PXP_WFE_A_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK2_H_CH0       (0x00000fe0)
+
+#define BP_PXP_WFE_A_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK2_L_CH0       (0x00000ff0)
+
+#define BP_PXP_WFE_A_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK3_H_CH0       (0x00001000)
+
+#define BP_PXP_WFE_A_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK3_L_CH0       (0x00001010)
+
+#define BP_PXP_WFE_A_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK4_H_CH0       (0x00001020)
+
+#define BP_PXP_WFE_A_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK4_L_CH0       (0x00001030)
+
+#define BP_PXP_WFE_A_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK5_H_CH0       (0x00001040)
+
+#define BP_PXP_WFE_A_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK5_L_CH0       (0x00001050)
+
+#define BP_PXP_WFE_A_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK6_H_CH0       (0x00001060)
+
+#define BP_PXP_WFE_A_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK6_L_CH0       (0x00001070)
+
+#define BP_PXP_WFE_A_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK7_H_CH0       (0x00001080)
+
+#define BP_PXP_WFE_A_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_MASK7_L_CH0       (0x00001090)
+
+#define BP_PXP_WFE_A_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0      0
+#define BM_PXP_WFE_A_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_A_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_A_STORE_D_SHIFT_L_CH0       (0x000010a0)
+
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3 0x80000000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD0 0x40000000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD0(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD0)
+#define BP_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3      24
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3 0x3F000000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2 0x00800000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD1 0x00400000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD1)
+#define BP_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2      16
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2 0x003F0000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1 0x00008000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD2 0x00004000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD2)
+#define BP_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1      8
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1 0x00003F00
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0 0x00000080
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD3 0x00000040
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_RSVD3)
+#define BP_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0      0
+#define BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0 0x0000003F
+#define BF_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0)
+
+#define HW_PXP_WFE_A_STORE_D_SHIFT_H_CH0       (0x000010b0)
+
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7 0x80000000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD0 0x40000000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD0(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD0)
+#define BP_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7      24
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7 0x3F000000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6 0x00800000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD1 0x00400000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD1)
+#define BP_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6      16
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6 0x003F0000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5 0x00008000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD2 0x00004000
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD2)
+#define BP_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5      8
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5 0x00003F00
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4 0x00000080
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4)
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD3 0x00000040
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_RSVD3)
+#define BP_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4      0
+#define BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4 0x0000003F
+#define BF_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4)
+
+#define HW_PXP_WFE_A_STORE_F_SHIFT_L_CH0       (0x000010c0)
+
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD0 0x80000000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD0(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD0)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3 0x40000000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3)
+#define BP_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3      24
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3 0x3F000000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD1 0x00800000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD1(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD1)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2 0x00400000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2)
+#define BP_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2      16
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2 0x003F0000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD2 0x00008000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD2(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD2)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1 0x00004000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1)
+#define BP_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1      8
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1 0x00003F00
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD3 0x00000080
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_RSVD3)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0 0x00000040
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0)
+#define BP_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0      0
+#define BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0 0x0000003F
+#define BF_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0)
+
+#define HW_PXP_WFE_A_STORE_F_SHIFT_H_CH0       (0x000010d0)
+
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD0 0x80000000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD0(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD0)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7 0x40000000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7)
+#define BP_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7      24
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7 0x3F000000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD1 0x00800000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD1(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD1)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6 0x00400000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6)
+#define BP_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6      16
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6 0x003F0000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD2 0x00008000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD2(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD2)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5 0x00004000
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5)
+#define BP_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5      8
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5 0x00003F00
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD3 0x00000080
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_RSVD3)
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4 0x00000040
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4)
+#define BP_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4      0
+#define BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4 0x0000003F
+#define BF_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4)
+
+#define HW_PXP_WFE_A_STORE_F_MASK_L_CH0        (0x000010e0)
+
+#define BP_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK3      24
+#define BM_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK3 0xFF000000
+#define BF_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK3(v) \
+        (((v) << 24) & BM_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK3)
+#define BP_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK2      16
+#define BM_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK2 0x00FF0000
+#define BF_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK2)
+#define BP_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK1      8
+#define BM_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK1 0x0000FF00
+#define BF_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK1)
+#define BP_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK0      0
+#define BM_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK0 0x000000FF
+#define BF_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_F_MASK_L_CH0_F_MASK0)
+
+#define HW_PXP_WFE_A_STORE_F_MASK_H_CH0        (0x000010f0)
+
+#define BP_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK7      24
+#define BM_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK7 0xFF000000
+#define BF_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK7(v) \
+        (((v) << 24) & BM_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK7)
+#define BP_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK6      16
+#define BM_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK6 0x00FF0000
+#define BF_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK6)
+#define BP_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK5      8
+#define BM_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK5 0x0000FF00
+#define BF_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK5)
+#define BP_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK4      0
+#define BM_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK4 0x000000FF
+#define BF_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STORE_F_MASK_H_CH0_F_MASK4)
+
+#define HW_PXP_WFB_FETCH_CTRL  (0x00001100)
+#define HW_PXP_WFB_FETCH_CTRL_SET      (0x00001104)
+#define HW_PXP_WFB_FETCH_CTRL_CLR      (0x00001108)
+#define HW_PXP_WFB_FETCH_CTRL_TOG      (0x0000110c)
+
+#define BM_PXP_WFB_FETCH_CTRL_BUF2_DONE_IRQ_EN 0x80000000
+#define BF_PXP_WFB_FETCH_CTRL_BUF2_DONE_IRQ_EN(v) \
+        (((v) << 31) & BM_PXP_WFB_FETCH_CTRL_BUF2_DONE_IRQ_EN)
+#define BM_PXP_WFB_FETCH_CTRL_BUF1_DONE_IRQ_EN 0x40000000
+#define BF_PXP_WFB_FETCH_CTRL_BUF1_DONE_IRQ_EN(v)  \
+        (((v) << 30) & BM_PXP_WFB_FETCH_CTRL_BUF1_DONE_IRQ_EN)
+#define BM_PXP_WFB_FETCH_CTRL_BUF2_DONE_IRQ 0x20000000
+#define BF_PXP_WFB_FETCH_CTRL_BUF2_DONE_IRQ(v)  \
+        (((v) << 29) & BM_PXP_WFB_FETCH_CTRL_BUF2_DONE_IRQ)
+#define BM_PXP_WFB_FETCH_CTRL_BUF1_DONE_IRQ 0x10000000
+#define BF_PXP_WFB_FETCH_CTRL_BUF1_DONE_IRQ(v)  \
+        (((v) << 28) & BM_PXP_WFB_FETCH_CTRL_BUF1_DONE_IRQ)
+#define BP_PXP_WFB_FETCH_CTRL_RSVD0      24
+#define BM_PXP_WFB_FETCH_CTRL_RSVD0 0x0F000000
+#define BF_PXP_WFB_FETCH_CTRL_RSVD0(v)  \
+        (((v) << 24) & BM_PXP_WFB_FETCH_CTRL_RSVD0)
+#define BP_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE      22
+#define BM_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE 0x00C00000
+#define BF_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE(v)  \
+        (((v) << 22) & BM_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE)
+#define BV_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE__1 0x1
+#define BV_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE__2 0x2
+#define BV_PXP_WFB_FETCH_CTRL_BF2_LINE_MODE__3 0x3
+#define BP_PXP_WFB_FETCH_CTRL_BF2_BYTES_PP      20
+#define BM_PXP_WFB_FETCH_CTRL_BF2_BYTES_PP 0x00300000
+#define BF_PXP_WFB_FETCH_CTRL_BF2_BYTES_PP(v)  \
+        (((v) << 20) & BM_PXP_WFB_FETCH_CTRL_BF2_BYTES_PP)
+#define BP_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE      18
+#define BM_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE 0x000C0000
+#define BF_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE(v)  \
+        (((v) << 18) & BM_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE)
+#define BV_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE__1 0x1
+#define BV_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE__2 0x2
+#define BV_PXP_WFB_FETCH_CTRL_BF1_LINE_MODE__3 0x3
+#define BP_PXP_WFB_FETCH_CTRL_BF1_BYTES_PP      16
+#define BM_PXP_WFB_FETCH_CTRL_BF1_BYTES_PP 0x00030000
+#define BF_PXP_WFB_FETCH_CTRL_BF1_BYTES_PP(v)  \
+        (((v) << 16) & BM_PXP_WFB_FETCH_CTRL_BF1_BYTES_PP)
+#define BP_PXP_WFB_FETCH_CTRL_RSVD1      14
+#define BM_PXP_WFB_FETCH_CTRL_RSVD1 0x0000C000
+#define BF_PXP_WFB_FETCH_CTRL_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_WFB_FETCH_CTRL_RSVD1)
+#define BM_PXP_WFB_FETCH_CTRL_BF2_BORDER_MODE 0x00002000
+#define BF_PXP_WFB_FETCH_CTRL_BF2_BORDER_MODE(v)  \
+        (((v) << 13) & BM_PXP_WFB_FETCH_CTRL_BF2_BORDER_MODE)
+#define BV_PXP_WFB_FETCH_CTRL_BF2_BORDER_MODE__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF2_BORDER_MODE__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF2_BURST_LEN 0x00001000
+#define BF_PXP_WFB_FETCH_CTRL_BF2_BURST_LEN(v)  \
+        (((v) << 12) & BM_PXP_WFB_FETCH_CTRL_BF2_BURST_LEN)
+#define BV_PXP_WFB_FETCH_CTRL_BF2_BURST_LEN__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF2_BURST_LEN__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF2_BYPASS_MODE 0x00000800
+#define BF_PXP_WFB_FETCH_CTRL_BF2_BYPASS_MODE(v)  \
+        (((v) << 11) & BM_PXP_WFB_FETCH_CTRL_BF2_BYPASS_MODE)
+#define BV_PXP_WFB_FETCH_CTRL_BF2_BYPASS_MODE__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF2_BYPASS_MODE__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF2_HSK_MODE 0x00000400
+#define BF_PXP_WFB_FETCH_CTRL_BF2_HSK_MODE(v)  \
+        (((v) << 10) & BM_PXP_WFB_FETCH_CTRL_BF2_HSK_MODE)
+#define BV_PXP_WFB_FETCH_CTRL_BF2_HSK_MODE__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF2_HSK_MODE__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF2_SRAM_IF 0x00000200
+#define BF_PXP_WFB_FETCH_CTRL_BF2_SRAM_IF(v)  \
+        (((v) << 9) & BM_PXP_WFB_FETCH_CTRL_BF2_SRAM_IF)
+#define BV_PXP_WFB_FETCH_CTRL_BF2_SRAM_IF__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF2_SRAM_IF__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF2_EN 0x00000100
+#define BF_PXP_WFB_FETCH_CTRL_BF2_EN(v)  \
+        (((v) << 8) & BM_PXP_WFB_FETCH_CTRL_BF2_EN)
+#define BV_PXP_WFB_FETCH_CTRL_BF2_EN__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF2_EN__1 0x1
+#define BP_PXP_WFB_FETCH_CTRL_RSVD2      6
+#define BM_PXP_WFB_FETCH_CTRL_RSVD2 0x000000C0
+#define BF_PXP_WFB_FETCH_CTRL_RSVD2(v)  \
+        (((v) << 6) & BM_PXP_WFB_FETCH_CTRL_RSVD2)
+#define BM_PXP_WFB_FETCH_CTRL_BF1_BORDER_MODE 0x00000020
+#define BF_PXP_WFB_FETCH_CTRL_BF1_BORDER_MODE(v)  \
+        (((v) << 5) & BM_PXP_WFB_FETCH_CTRL_BF1_BORDER_MODE)
+#define BV_PXP_WFB_FETCH_CTRL_BF1_BORDER_MODE__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF1_BORDER_MODE__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF1_BURST_LEN 0x00000010
+#define BF_PXP_WFB_FETCH_CTRL_BF1_BURST_LEN(v)  \
+        (((v) << 4) & BM_PXP_WFB_FETCH_CTRL_BF1_BURST_LEN)
+#define BV_PXP_WFB_FETCH_CTRL_BF1_BURST_LEN__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF1_BURST_LEN__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF1_BYPASS_MODE 0x00000008
+#define BF_PXP_WFB_FETCH_CTRL_BF1_BYPASS_MODE(v)  \
+        (((v) << 3) & BM_PXP_WFB_FETCH_CTRL_BF1_BYPASS_MODE)
+#define BV_PXP_WFB_FETCH_CTRL_BF1_BYPASS_MODE__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF1_BYPASS_MODE__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF1_HSK_MODE 0x00000004
+#define BF_PXP_WFB_FETCH_CTRL_BF1_HSK_MODE(v)  \
+        (((v) << 2) & BM_PXP_WFB_FETCH_CTRL_BF1_HSK_MODE)
+#define BV_PXP_WFB_FETCH_CTRL_BF1_HSK_MODE__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF1_HSK_MODE__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF1_SRAM_IF 0x00000002
+#define BF_PXP_WFB_FETCH_CTRL_BF1_SRAM_IF(v)  \
+        (((v) << 1) & BM_PXP_WFB_FETCH_CTRL_BF1_SRAM_IF)
+#define BV_PXP_WFB_FETCH_CTRL_BF1_SRAM_IF__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF1_SRAM_IF__1 0x1
+#define BM_PXP_WFB_FETCH_CTRL_BF1_EN 0x00000001
+#define BF_PXP_WFB_FETCH_CTRL_BF1_EN(v)  \
+        (((v) << 0) & BM_PXP_WFB_FETCH_CTRL_BF1_EN)
+#define BV_PXP_WFB_FETCH_CTRL_BF1_EN__0 0x0
+#define BV_PXP_WFB_FETCH_CTRL_BF1_EN__1 0x1
+
+#define HW_PXP_WFB_FETCH_BUF1_ADDR     (0x00001110)
+
+#define BP_PXP_WFB_FETCH_BUF1_ADDR_BUF_ADDR      0
+#define BM_PXP_WFB_FETCH_BUF1_ADDR_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_WFB_FETCH_BUF1_ADDR_BUF_ADDR(v)   (v)
+
+#define HW_PXP_WFB_FETCH_BUF1_PITCH    (0x00001120)
+
+#define BP_PXP_WFB_FETCH_BUF1_PITCH_RSVD      16
+#define BM_PXP_WFB_FETCH_BUF1_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_WFB_FETCH_BUF1_PITCH_RSVD(v) \
+        (((v) << 16) & BM_PXP_WFB_FETCH_BUF1_PITCH_RSVD)
+#define BP_PXP_WFB_FETCH_BUF1_PITCH_PITCH      0
+#define BM_PXP_WFB_FETCH_BUF1_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_WFB_FETCH_BUF1_PITCH_PITCH(v)  \
+        (((v) << 0) & BM_PXP_WFB_FETCH_BUF1_PITCH_PITCH)
+
+#define HW_PXP_WFB_FETCH_BUF1_SIZE     (0x00001130)
+
+#define BP_PXP_WFB_FETCH_BUF1_SIZE_BUF_HEIGHT      16
+#define BM_PXP_WFB_FETCH_BUF1_SIZE_BUF_HEIGHT 0xFFFF0000
+#define BF_PXP_WFB_FETCH_BUF1_SIZE_BUF_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_WFB_FETCH_BUF1_SIZE_BUF_HEIGHT)
+#define BP_PXP_WFB_FETCH_BUF1_SIZE_BUF_WIDTH      0
+#define BM_PXP_WFB_FETCH_BUF1_SIZE_BUF_WIDTH 0x0000FFFF
+#define BF_PXP_WFB_FETCH_BUF1_SIZE_BUF_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFB_FETCH_BUF1_SIZE_BUF_WIDTH)
+
+#define HW_PXP_WFB_FETCH_BUF2_ADDR     (0x00001140)
+
+#define BP_PXP_WFB_FETCH_BUF2_ADDR_BUF_ADDR      0
+#define BM_PXP_WFB_FETCH_BUF2_ADDR_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_WFB_FETCH_BUF2_ADDR_BUF_ADDR(v)   (v)
+
+#define HW_PXP_WFB_FETCH_BUF2_PITCH    (0x00001150)
+
+#define BP_PXP_WFB_FETCH_BUF2_PITCH_RSVD      16
+#define BM_PXP_WFB_FETCH_BUF2_PITCH_RSVD 0xFFFF0000
+#define BF_PXP_WFB_FETCH_BUF2_PITCH_RSVD(v) \
+        (((v) << 16) & BM_PXP_WFB_FETCH_BUF2_PITCH_RSVD)
+#define BP_PXP_WFB_FETCH_BUF2_PITCH_PITCH      0
+#define BM_PXP_WFB_FETCH_BUF2_PITCH_PITCH 0x0000FFFF
+#define BF_PXP_WFB_FETCH_BUF2_PITCH_PITCH(v)  \
+        (((v) << 0) & BM_PXP_WFB_FETCH_BUF2_PITCH_PITCH)
+
+#define HW_PXP_WFB_FETCH_BUF2_SIZE     (0x00001160)
+
+#define BP_PXP_WFB_FETCH_BUF2_SIZE_BUF_HEIGHT      16
+#define BM_PXP_WFB_FETCH_BUF2_SIZE_BUF_HEIGHT 0xFFFF0000
+#define BF_PXP_WFB_FETCH_BUF2_SIZE_BUF_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_WFB_FETCH_BUF2_SIZE_BUF_HEIGHT)
+#define BP_PXP_WFB_FETCH_BUF2_SIZE_BUF_WIDTH      0
+#define BM_PXP_WFB_FETCH_BUF2_SIZE_BUF_WIDTH 0x0000FFFF
+#define BF_PXP_WFB_FETCH_BUF2_SIZE_BUF_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFB_FETCH_BUF2_SIZE_BUF_WIDTH)
+
+#define HW_PXP_WFB_ARRAY_PIXEL0_MASK   (0x00001170)
+
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_PIXEL0_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL0_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_PIXEL0_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL0_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_PIXEL0_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_PIXEL0_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_PIXEL0_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_PIXEL0_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_PIXEL1_MASK   (0x00001180)
+
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_PIXEL1_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL1_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_PIXEL1_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL1_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_PIXEL1_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_PIXEL1_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_PIXEL1_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_PIXEL1_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_PIXEL2_MASK   (0x00001190)
+
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_PIXEL2_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL2_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_PIXEL2_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL2_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_PIXEL2_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_PIXEL2_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_PIXEL2_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_PIXEL2_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_PIXEL3_MASK   (0x000011a0)
+
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_PIXEL3_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL3_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_PIXEL3_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL3_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_PIXEL3_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_PIXEL3_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_PIXEL3_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_PIXEL3_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_PIXEL4_MASK   (0x000011b0)
+
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_PIXEL4_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL4_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_PIXEL4_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL4_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_PIXEL4_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_PIXEL4_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_PIXEL4_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_PIXEL4_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_PIXEL5_MASK   (0x000011c0)
+
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_PIXEL5_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL5_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_PIXEL5_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL5_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_PIXEL5_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_PIXEL5_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_PIXEL5_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_PIXEL5_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_PIXEL6_MASK   (0x000011d0)
+
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_PIXEL6_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL6_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_PIXEL6_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL6_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_PIXEL6_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_PIXEL6_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_PIXEL6_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_PIXEL6_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_PIXEL7_MASK   (0x000011e0)
+
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_PIXEL7_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL7_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_PIXEL7_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_PIXEL7_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_PIXEL7_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_PIXEL7_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_PIXEL7_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_PIXEL7_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG0_MASK    (0x000011f0)
+
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG0_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG0_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG0_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG0_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG0_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG0_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG0_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG0_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG0_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG0_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG0_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG0_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG1_MASK    (0x00001200)
+
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG1_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG1_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG1_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG1_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG1_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG1_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG1_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG1_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG1_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG1_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG1_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG1_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG2_MASK    (0x00001210)
+
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG2_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG2_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG2_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG2_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG2_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG2_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG2_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG2_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG2_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG2_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG2_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG2_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG3_MASK    (0x00001220)
+
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG3_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG3_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG3_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG3_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG3_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG3_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG3_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG3_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG3_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG3_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG3_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG3_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG4_MASK    (0x00001230)
+
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG4_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG4_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG4_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG4_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG4_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG4_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG4_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG4_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG4_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG4_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG4_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG4_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG5_MASK    (0x00001240)
+
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG5_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG5_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG5_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG5_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG5_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG5_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG5_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG5_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG5_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG5_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG5_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG5_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG6_MASK    (0x00001250)
+
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG6_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG6_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG6_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG6_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG6_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG6_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG6_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG6_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG6_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG6_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG6_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG6_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG7_MASK    (0x00001260)
+
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG7_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG7_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG7_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG7_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG7_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG7_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG7_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG7_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG7_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG7_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG7_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG7_MASK_L_OFS)
+
+#define HW_PXP_WFB_FETCH_BUF1_CORD     (0x00001270)
+
+#define BP_PXP_WFB_FETCH_BUF1_CORD_RSVD0      30
+#define BM_PXP_WFB_FETCH_BUF1_CORD_RSVD0 0xC0000000
+#define BF_PXP_WFB_FETCH_BUF1_CORD_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_FETCH_BUF1_CORD_RSVD0)
+#define BP_PXP_WFB_FETCH_BUF1_CORD_YCORD      16
+#define BM_PXP_WFB_FETCH_BUF1_CORD_YCORD 0x3FFF0000
+#define BF_PXP_WFB_FETCH_BUF1_CORD_YCORD(v)  \
+        (((v) << 16) & BM_PXP_WFB_FETCH_BUF1_CORD_YCORD)
+#define BP_PXP_WFB_FETCH_BUF1_CORD_RSVD1      14
+#define BM_PXP_WFB_FETCH_BUF1_CORD_RSVD1 0x0000C000
+#define BF_PXP_WFB_FETCH_BUF1_CORD_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_WFB_FETCH_BUF1_CORD_RSVD1)
+#define BP_PXP_WFB_FETCH_BUF1_CORD_XCORD      0
+#define BM_PXP_WFB_FETCH_BUF1_CORD_XCORD 0x00003FFF
+#define BF_PXP_WFB_FETCH_BUF1_CORD_XCORD(v)  \
+        (((v) << 0) & BM_PXP_WFB_FETCH_BUF1_CORD_XCORD)
+
+#define HW_PXP_WFB_FETCH_BUF2_CORD     (0x00001280)
+
+#define BP_PXP_WFB_FETCH_BUF2_CORD_RSVD0      30
+#define BM_PXP_WFB_FETCH_BUF2_CORD_RSVD0 0xC0000000
+#define BF_PXP_WFB_FETCH_BUF2_CORD_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_FETCH_BUF2_CORD_RSVD0)
+#define BP_PXP_WFB_FETCH_BUF2_CORD_YCORD      16
+#define BM_PXP_WFB_FETCH_BUF2_CORD_YCORD 0x3FFF0000
+#define BF_PXP_WFB_FETCH_BUF2_CORD_YCORD(v)  \
+        (((v) << 16) & BM_PXP_WFB_FETCH_BUF2_CORD_YCORD)
+#define BP_PXP_WFB_FETCH_BUF2_CORD_RSVD1      14
+#define BM_PXP_WFB_FETCH_BUF2_CORD_RSVD1 0x0000C000
+#define BF_PXP_WFB_FETCH_BUF2_CORD_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_WFB_FETCH_BUF2_CORD_RSVD1)
+#define BP_PXP_WFB_FETCH_BUF2_CORD_XCORD      0
+#define BM_PXP_WFB_FETCH_BUF2_CORD_XCORD 0x00003FFF
+#define BF_PXP_WFB_FETCH_BUF2_CORD_XCORD(v)  \
+        (((v) << 0) & BM_PXP_WFB_FETCH_BUF2_CORD_XCORD)
+
+#define HW_PXP_WFB_ARRAY_FLAG8_MASK    (0x00001290)
+
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG8_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG8_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG8_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG8_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG8_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG8_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG8_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG8_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG8_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG8_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG8_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG8_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG9_MASK    (0x000012a0)
+
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG9_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG9_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG9_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG9_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG9_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG9_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG9_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG9_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG9_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG9_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG9_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG9_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG10_MASK   (0x000012b0)
+
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG10_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG10_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG10_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG10_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG10_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG10_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG10_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG10_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG10_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG10_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG10_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG10_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG10_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG11_MASK   (0x000012c0)
+
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG11_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG11_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG11_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG11_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG11_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG11_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG11_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG11_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG11_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG11_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG11_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG11_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG11_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG12_MASK   (0x000012d0)
+
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG12_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG12_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG12_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG12_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG12_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG12_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG12_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG12_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG12_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG12_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG12_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG12_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG12_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG13_MASK   (0x000012e0)
+
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG13_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG13_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG13_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG13_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG13_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG13_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG13_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG13_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG13_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG13_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG13_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG13_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG13_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG14_MASK   (0x000012f0)
+
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG14_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG14_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG14_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG14_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG14_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG14_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG14_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG14_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG14_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG14_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG14_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG14_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG14_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_FLAG15_MASK   (0x00001300)
+
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_RSVD0      30
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD0 0xC0000000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD0)
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_BUF_SEL      28
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_BUF_SEL 0x30000000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_WFB_ARRAY_FLAG15_MASK_BUF_SEL)
+#define BV_PXP_WFB_ARRAY_FLAG15_MASK_BUF_SEL__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG15_MASK_BUF_SEL__1 0x1
+#define BV_PXP_WFB_ARRAY_FLAG15_MASK_BUF_SEL__2 0x2
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_RSVD1      26
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD1 0x0C000000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_RSVD1(v)  \
+        (((v) << 26) & BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD1)
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_Y 0x02000000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_Y(v)  \
+        (((v) << 25) & BM_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_Y)
+#define BV_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_Y__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_Y__1 0x1
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_X 0x01000000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_X(v)  \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_X)
+#define BV_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_X__0 0x0
+#define BV_PXP_WFB_ARRAY_FLAG15_MASK_SIGN_X__1 0x1
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_RSVD2      22
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD2 0x00C00000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD2)
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_OFFSET_Y      20
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_OFFSET_Y 0x00300000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_OFFSET_Y(v)  \
+        (((v) << 20) & BM_PXP_WFB_ARRAY_FLAG15_MASK_OFFSET_Y)
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_RSVD3      18
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD3 0x000C0000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_RSVD3(v)  \
+        (((v) << 18) & BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD3)
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_OFFSET_X      16
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_OFFSET_X 0x00030000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_OFFSET_X(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_FLAG15_MASK_OFFSET_X)
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_RSVD4      13
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD4 0x0000E000
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_RSVD4(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD4)
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_H_OFS      8
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_H_OFS 0x00001F00
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_H_OFS(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_FLAG15_MASK_H_OFS)
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_RSVD5      5
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD5 0x000000E0
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_FLAG15_MASK_RSVD5)
+#define BP_PXP_WFB_ARRAY_FLAG15_MASK_L_OFS      0
+#define BM_PXP_WFB_ARRAY_FLAG15_MASK_L_OFS 0x0000001F
+#define BF_PXP_WFB_ARRAY_FLAG15_MASK_L_OFS(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_FLAG15_MASK_L_OFS)
+
+#define HW_PXP_WFB_ARRAY_REG0  (0x00001310)
+
+#define BP_PXP_WFB_ARRAY_REG0_SW_PIXLE3      24
+#define BM_PXP_WFB_ARRAY_REG0_SW_PIXLE3 0xFF000000
+#define BF_PXP_WFB_ARRAY_REG0_SW_PIXLE3(v) \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_REG0_SW_PIXLE3)
+#define BP_PXP_WFB_ARRAY_REG0_SW_PIXLE2      16
+#define BM_PXP_WFB_ARRAY_REG0_SW_PIXLE2 0x00FF0000
+#define BF_PXP_WFB_ARRAY_REG0_SW_PIXLE2(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_REG0_SW_PIXLE2)
+#define BP_PXP_WFB_ARRAY_REG0_SW_PIXLE1      8
+#define BM_PXP_WFB_ARRAY_REG0_SW_PIXLE1 0x0000FF00
+#define BF_PXP_WFB_ARRAY_REG0_SW_PIXLE1(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_REG0_SW_PIXLE1)
+#define BP_PXP_WFB_ARRAY_REG0_SW_PIXLE0      0
+#define BM_PXP_WFB_ARRAY_REG0_SW_PIXLE0 0x000000FF
+#define BF_PXP_WFB_ARRAY_REG0_SW_PIXLE0(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_REG0_SW_PIXLE0)
+
+#define HW_PXP_WFB_ARRAY_REG1  (0x00001320)
+
+#define BP_PXP_WFB_ARRAY_REG1_SW_PIXLE7      24
+#define BM_PXP_WFB_ARRAY_REG1_SW_PIXLE7 0xFF000000
+#define BF_PXP_WFB_ARRAY_REG1_SW_PIXLE7(v) \
+        (((v) << 24) & BM_PXP_WFB_ARRAY_REG1_SW_PIXLE7)
+#define BP_PXP_WFB_ARRAY_REG1_SW_PIXLE6      16
+#define BM_PXP_WFB_ARRAY_REG1_SW_PIXLE6 0x00FF0000
+#define BF_PXP_WFB_ARRAY_REG1_SW_PIXLE6(v)  \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_REG1_SW_PIXLE6)
+#define BP_PXP_WFB_ARRAY_REG1_SW_PIXLE5      8
+#define BM_PXP_WFB_ARRAY_REG1_SW_PIXLE5 0x0000FF00
+#define BF_PXP_WFB_ARRAY_REG1_SW_PIXLE5(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_REG1_SW_PIXLE5)
+#define BP_PXP_WFB_ARRAY_REG1_SW_PIXLE4      0
+#define BM_PXP_WFB_ARRAY_REG1_SW_PIXLE4 0x000000FF
+#define BF_PXP_WFB_ARRAY_REG1_SW_PIXLE4(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_REG1_SW_PIXLE4)
+
+#define HW_PXP_WFB_ARRAY_REG2  (0x00001330)
+
+#define BP_PXP_WFB_ARRAY_REG2_RSVD0      16
+#define BM_PXP_WFB_ARRAY_REG2_RSVD0 0xFFFF0000
+#define BF_PXP_WFB_ARRAY_REG2_RSVD0(v) \
+        (((v) << 16) & BM_PXP_WFB_ARRAY_REG2_RSVD0)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG15 0x00008000
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG15(v)  \
+        (((v) << 15) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG15)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG14 0x00004000
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG14(v)  \
+        (((v) << 14) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG14)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG13 0x00002000
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG13(v)  \
+        (((v) << 13) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG13)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG12 0x00001000
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG12(v)  \
+        (((v) << 12) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG12)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG11 0x00000800
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG11(v)  \
+        (((v) << 11) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG11)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG10 0x00000400
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG10(v)  \
+        (((v) << 10) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG10)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG9 0x00000200
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG9(v)  \
+        (((v) << 9) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG9)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG8 0x00000100
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG8(v)  \
+        (((v) << 8) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG8)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG7 0x00000080
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG7(v)  \
+        (((v) << 7) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG7)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG6 0x00000040
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG6(v)  \
+        (((v) << 6) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG6)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG5 0x00000020
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG5(v)  \
+        (((v) << 5) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG5)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG4 0x00000010
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG4(v)  \
+        (((v) << 4) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG4)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG3 0x00000008
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG3(v)  \
+        (((v) << 3) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG3)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG2 0x00000004
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG2(v)  \
+        (((v) << 2) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG2)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG1 0x00000002
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG1(v)  \
+        (((v) << 1) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG1)
+#define BM_PXP_WFB_ARRAY_REG2_SW_FLAG0 0x00000001
+#define BF_PXP_WFB_ARRAY_REG2_SW_FLAG0(v)  \
+        (((v) << 0) & BM_PXP_WFB_ARRAY_REG2_SW_FLAG0)
+
+#define HW_PXP_WFE_B_STORE_CTRL_CH0    (0x00001340)
+#define HW_PXP_WFE_B_STORE_CTRL_CH0_SET        (0x00001344)
+#define HW_PXP_WFE_B_STORE_CTRL_CH0_CLR        (0x00001348)
+#define HW_PXP_WFE_B_STORE_CTRL_CH0_TOG        (0x0000134c)
+
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_ARBIT_EN 0x80000000
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_ARBIT_EN(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STORE_CTRL_CH0_ARBIT_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_ARBIT_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_ARBIT_EN__1 0x1
+#define BP_PXP_WFE_B_STORE_CTRL_CH0_RSVD0      25
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_RSVD0 0x7E000000
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_RSVD0(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STORE_CTRL_CH0_RSVD0)
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_COMBINE_2CHANNEL 0x01000000
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_COMBINE_2CHANNEL(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STORE_CTRL_CH0_COMBINE_2CHANNEL)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_COMBINE_2CHANNEL__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_COMBINE_2CHANNEL__1 0x1
+#define BP_PXP_WFE_B_STORE_CTRL_CH0_RSVD1      18
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_RSVD1 0x00FC0000
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_RSVD1(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STORE_CTRL_CH0_RSVD1)
+#define BP_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES      16
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES 0x00030000
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_WR_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_WFE_B_STORE_CTRL_CH0_RSVD2      12
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_RSVD2 0x0000F000
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_RSVD2(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STORE_CTRL_CH0_RSVD2)
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_FILL_DATA_EN 0x00000800
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_FILL_DATA_EN(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STORE_CTRL_CH0_FILL_DATA_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_FILL_DATA_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_FILL_DATA_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_PACK_IN_SEL 0x00000400
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_PACK_IN_SEL(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STORE_CTRL_CH0_PACK_IN_SEL)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_PACK_IN_SEL__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_PACK_IN_SEL__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_STORE_MEMORY_EN 0x00000200
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_STORE_MEMORY_EN(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STORE_CTRL_CH0_STORE_MEMORY_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_STORE_MEMORY_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_STORE_MEMORY_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_STORE_BYPASS_EN 0x00000100
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_STORE_BYPASS_EN(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STORE_CTRL_CH0_STORE_BYPASS_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_STORE_BYPASS_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_STORE_BYPASS_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_RSVD3 0x00000080
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STORE_CTRL_CH0_RSVD3)
+#define BP_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM      5
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM 0x00000060
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM__1 0x1
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM__2 0x2
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_LINE_NUM__3 0x3
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_EN 0x00000010
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_EN(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_ARRAY_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_HANDSHAKE_EN 0x00000008
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STORE_CTRL_CH0_HANDSHAKE_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_HANDSHAKE_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_HANDSHAKE_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_16 0x00000004
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_16)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_16__8x8   0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_16__16x16 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_EN 0x00000002
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_BLOCK_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH0_CH_EN 0x00000001
+#define BF_PXP_WFE_B_STORE_CTRL_CH0_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_CTRL_CH0_CH_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_CH_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH0_CH_EN__1 0x1
+
+#define HW_PXP_WFE_B_STORE_CTRL_CH1    (0x00001350)
+#define HW_PXP_WFE_B_STORE_CTRL_CH1_SET        (0x00001354)
+#define HW_PXP_WFE_B_STORE_CTRL_CH1_CLR        (0x00001358)
+#define HW_PXP_WFE_B_STORE_CTRL_CH1_TOG        (0x0000135c)
+
+#define BP_PXP_WFE_B_STORE_CTRL_CH1_RSVD0      18
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_RSVD0 0xFFFC0000
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_RSVD0(v) \
+        (((v) << 18) & BM_PXP_WFE_B_STORE_CTRL_CH1_RSVD0)
+#define BP_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES      16
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES 0x00030000
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES__8_bytes  0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES__16_bytes 0x1
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES__32_bytes 0x2
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_WR_NUM_BYTES__64_bytes 0x3
+#define BP_PXP_WFE_B_STORE_CTRL_CH1_RSVD1      11
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_RSVD1 0x0000F800
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_RSVD1(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STORE_CTRL_CH1_RSVD1)
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_PACK_IN_SEL 0x00000400
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_PACK_IN_SEL(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STORE_CTRL_CH1_PACK_IN_SEL)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_PACK_IN_SEL__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_PACK_IN_SEL__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_STORE_MEMORY_EN 0x00000200
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_STORE_MEMORY_EN(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STORE_CTRL_CH1_STORE_MEMORY_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_STORE_MEMORY_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_STORE_MEMORY_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_STORE_BYPASS_EN 0x00000100
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_STORE_BYPASS_EN(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STORE_CTRL_CH1_STORE_BYPASS_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_STORE_BYPASS_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_STORE_BYPASS_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_RSVD3 0x00000080
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STORE_CTRL_CH1_RSVD3)
+#define BP_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM      5
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM 0x00000060
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM__1 0x1
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM__2 0x2
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_LINE_NUM__3 0x3
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_EN 0x00000010
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_EN(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_ARRAY_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_HANDSHAKE_EN 0x00000008
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_HANDSHAKE_EN(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STORE_CTRL_CH1_HANDSHAKE_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_HANDSHAKE_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_HANDSHAKE_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_16 0x00000004
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_16(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_16)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_16__8x8   0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_16__16x16 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_EN 0x00000002
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_EN(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_BLOCK_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_CTRL_CH1_CH_EN 0x00000001
+#define BF_PXP_WFE_B_STORE_CTRL_CH1_CH_EN(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_CTRL_CH1_CH_EN)
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_CH_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_CTRL_CH1_CH_EN__1 0x1
+
+#define HW_PXP_WFE_B_STORE_STATUS_CH0  (0x00001360)
+
+#define BP_PXP_WFE_B_STORE_STATUS_CH0_STORE_BLOCK_Y      16
+#define BM_PXP_WFE_B_STORE_STATUS_CH0_STORE_BLOCK_Y 0xFFFF0000
+#define BF_PXP_WFE_B_STORE_STATUS_CH0_STORE_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_STATUS_CH0_STORE_BLOCK_Y)
+#define BP_PXP_WFE_B_STORE_STATUS_CH0_STORE_BLOCK_X      0
+#define BM_PXP_WFE_B_STORE_STATUS_CH0_STORE_BLOCK_X 0x0000FFFF
+#define BF_PXP_WFE_B_STORE_STATUS_CH0_STORE_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_STATUS_CH0_STORE_BLOCK_X)
+
+#define HW_PXP_WFE_B_STORE_STATUS_CH1  (0x00001370)
+
+#define BP_PXP_WFE_B_STORE_STATUS_CH1_STORE_BLOCK_Y      16
+#define BM_PXP_WFE_B_STORE_STATUS_CH1_STORE_BLOCK_Y 0xFFFF0000
+#define BF_PXP_WFE_B_STORE_STATUS_CH1_STORE_BLOCK_Y(v) \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_STATUS_CH1_STORE_BLOCK_Y)
+#define BP_PXP_WFE_B_STORE_STATUS_CH1_STORE_BLOCK_X      0
+#define BM_PXP_WFE_B_STORE_STATUS_CH1_STORE_BLOCK_X 0x0000FFFF
+#define BF_PXP_WFE_B_STORE_STATUS_CH1_STORE_BLOCK_X(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_STATUS_CH1_STORE_BLOCK_X)
+
+#define HW_PXP_WFE_B_STORE_SIZE_CH0    (0x00001380)
+
+#define BP_PXP_WFE_B_STORE_SIZE_CH0_OUT_HEIGHT      16
+#define BM_PXP_WFE_B_STORE_SIZE_CH0_OUT_HEIGHT 0xFFFF0000
+#define BF_PXP_WFE_B_STORE_SIZE_CH0_OUT_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_SIZE_CH0_OUT_HEIGHT)
+#define BP_PXP_WFE_B_STORE_SIZE_CH0_OUT_WIDTH      0
+#define BM_PXP_WFE_B_STORE_SIZE_CH0_OUT_WIDTH 0x0000FFFF
+#define BF_PXP_WFE_B_STORE_SIZE_CH0_OUT_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_SIZE_CH0_OUT_WIDTH)
+
+#define HW_PXP_WFE_B_STORE_SIZE_CH1    (0x00001390)
+
+#define BP_PXP_WFE_B_STORE_SIZE_CH1_OUT_HEIGHT      16
+#define BM_PXP_WFE_B_STORE_SIZE_CH1_OUT_HEIGHT 0xFFFF0000
+#define BF_PXP_WFE_B_STORE_SIZE_CH1_OUT_HEIGHT(v) \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_SIZE_CH1_OUT_HEIGHT)
+#define BP_PXP_WFE_B_STORE_SIZE_CH1_OUT_WIDTH      0
+#define BM_PXP_WFE_B_STORE_SIZE_CH1_OUT_WIDTH 0x0000FFFF
+#define BF_PXP_WFE_B_STORE_SIZE_CH1_OUT_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_SIZE_CH1_OUT_WIDTH)
+
+#define HW_PXP_WFE_B_STORE_PITCH       (0x000013a0)
+
+#define BP_PXP_WFE_B_STORE_PITCH_CH1_OUT_PITCH      16
+#define BM_PXP_WFE_B_STORE_PITCH_CH1_OUT_PITCH 0xFFFF0000
+#define BF_PXP_WFE_B_STORE_PITCH_CH1_OUT_PITCH(v) \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_PITCH_CH1_OUT_PITCH)
+#define BP_PXP_WFE_B_STORE_PITCH_CH0_OUT_PITCH      0
+#define BM_PXP_WFE_B_STORE_PITCH_CH0_OUT_PITCH 0x0000FFFF
+#define BF_PXP_WFE_B_STORE_PITCH_CH0_OUT_PITCH(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_PITCH_CH0_OUT_PITCH)
+
+#define HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH0      (0x000013b0)
+#define HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_SET  (0x000013b4)
+#define HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_CLR  (0x000013b8)
+#define HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_TOG  (0x000013bc)
+
+#define BP_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD0      8
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD0 0xFFFFFF00
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD0(v) \
+        (((v) << 8) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD0)
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS 0x00000080
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS)
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS__0 0x0
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_SHIFT_BYPASS__1 0x1
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD1 0x00000040
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD1(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD1)
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN 0x00000020
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN)
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_2P_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN 0x00000010
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN)
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUT_YUV422_1P_EN__1 0x1
+#define BP_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP      2
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP 0x0000000C
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP)
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_OUTPUT_ACTIVE_BPP__3 0x3
+#define BP_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD2      0
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD2 0x00000003
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD2(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH0_RSVD2)
+
+#define HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH1      (0x000013c0)
+#define HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_SET  (0x000013c4)
+#define HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_CLR  (0x000013c8)
+#define HW_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_TOG  (0x000013cc)
+
+#define BP_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_RSVD0      6
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_RSVD0 0xFFFFFFC0
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_RSVD0(v) \
+        (((v) << 6) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_RSVD0)
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN 0x00000020
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN)
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_2P_EN__1 0x1
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN 0x00000010
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN)
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN__0 0x0
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUT_YUV422_1P_EN__1 0x1
+#define BP_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP      2
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP 0x0000000C
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP)
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__0 0x0
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__1 0x1
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__2 0x2
+#define BV_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_OUTPUT_ACTIVE_BPP__3 0x3
+#define BP_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_RSVD2      0
+#define BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_RSVD2 0x00000003
+#define BF_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_RSVD2(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_SHIFT_CTRL_CH1_RSVD2)
+
+#define HW_PXP_WFE_B_STORE_ADDR_0_CH0  (0x00001410)
+
+#define BP_PXP_WFE_B_STORE_ADDR_0_CH0_OUT_BASE_ADDR0      0
+#define BM_PXP_WFE_B_STORE_ADDR_0_CH0_OUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_ADDR_0_CH0_OUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_ADDR_1_CH0  (0x00001420)
+
+#define BP_PXP_WFE_B_STORE_ADDR_1_CH0_OUT_BASE_ADDR1      0
+#define BM_PXP_WFE_B_STORE_ADDR_1_CH0_OUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_ADDR_1_CH0_OUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_FILL_DATA_CH0       (0x00001430)
+
+#define BP_PXP_WFE_B_STORE_FILL_DATA_CH0_FILL_DATA_CH0      0
+#define BM_PXP_WFE_B_STORE_FILL_DATA_CH0_FILL_DATA_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_FILL_DATA_CH0_FILL_DATA_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_ADDR_0_CH1  (0x00001440)
+
+#define BP_PXP_WFE_B_STORE_ADDR_0_CH1_OUT_BASE_ADDR0      0
+#define BM_PXP_WFE_B_STORE_ADDR_0_CH1_OUT_BASE_ADDR0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_ADDR_0_CH1_OUT_BASE_ADDR0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_ADDR_1_CH1  (0x00001450)
+
+#define BP_PXP_WFE_B_STORE_ADDR_1_CH1_OUT_BASE_ADDR1      0
+#define BM_PXP_WFE_B_STORE_ADDR_1_CH1_OUT_BASE_ADDR1 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_ADDR_1_CH1_OUT_BASE_ADDR1(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK0_H_CH0       (0x00001460)
+
+#define BP_PXP_WFE_B_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK0_H_CH0_D_MASK0_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK0_L_CH0       (0x00001470)
+
+#define BP_PXP_WFE_B_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK0_L_CH0_D_MASK0_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK1_H_CH0       (0x00001480)
+
+#define BP_PXP_WFE_B_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK1_H_CH0_D_MASK1_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK1_L_CH0       (0x00001490)
+
+#define BP_PXP_WFE_B_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK1_L_CH0_D_MASK1_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK2_H_CH0       (0x000014a0)
+
+#define BP_PXP_WFE_B_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK2_H_CH0_D_MASK2_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK2_L_CH0       (0x000014b0)
+
+#define BP_PXP_WFE_B_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK2_L_CH0_D_MASK2_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK3_H_CH0       (0x000014c0)
+
+#define BP_PXP_WFE_B_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK3_H_CH0_D_MASK3_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK3_L_CH0       (0x000014d0)
+
+#define BP_PXP_WFE_B_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK3_L_CH0_D_MASK3_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK4_H_CH0       (0x000014e0)
+
+#define BP_PXP_WFE_B_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK4_H_CH0_D_MASK4_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK4_L_CH0       (0x000014f0)
+
+#define BP_PXP_WFE_B_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK4_L_CH0_D_MASK4_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK5_H_CH0       (0x00001500)
+
+#define BP_PXP_WFE_B_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK5_H_CH0_D_MASK5_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK5_L_CH0       (0x00001510)
+
+#define BP_PXP_WFE_B_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK5_L_CH0_D_MASK5_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK6_H_CH0       (0x00001520)
+
+#define BP_PXP_WFE_B_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK6_H_CH0_D_MASK6_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK6_L_CH0       (0x00001530)
+
+#define BP_PXP_WFE_B_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK6_L_CH0_D_MASK6_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK7_H_CH0       (0x00001540)
+
+#define BP_PXP_WFE_B_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK7_H_CH0_D_MASK7_H_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_MASK7_L_CH0       (0x00001550)
+
+#define BP_PXP_WFE_B_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0      0
+#define BM_PXP_WFE_B_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0 0xFFFFFFFF
+#define BF_PXP_WFE_B_STORE_D_MASK7_L_CH0_D_MASK7_L_CH0(v)   (v)
+
+#define HW_PXP_WFE_B_STORE_D_SHIFT_L_CH0       (0x00001560)
+
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3 0x80000000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG3)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD0 0x40000000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD0(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD0)
+#define BP_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3      24
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3 0x3F000000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH3)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2 0x00800000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG2)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD1 0x00400000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD1)
+#define BP_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2      16
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2 0x003F0000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH2)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1 0x00008000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG1)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD2 0x00004000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD2)
+#define BP_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1      8
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1 0x00003F00
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH1)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0 0x00000080
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_FLAG0)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD3 0x00000040
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_RSVD3)
+#define BP_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0      0
+#define BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0 0x0000003F
+#define BF_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_D_SHIFT_L_CH0_D_SHIFT_WIDTH0)
+
+#define HW_PXP_WFE_B_STORE_D_SHIFT_H_CH0       (0x00001570)
+
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7 0x80000000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG7)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD0 0x40000000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD0(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD0)
+#define BP_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7      24
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7 0x3F000000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH7)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6 0x00800000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG6)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD1 0x00400000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD1)
+#define BP_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6      16
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6 0x003F0000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH6)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5 0x00008000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG5)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD2 0x00004000
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD2)
+#define BP_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5      8
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5 0x00003F00
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH5)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4 0x00000080
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_FLAG4)
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD3 0x00000040
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_RSVD3)
+#define BP_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4      0
+#define BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4 0x0000003F
+#define BF_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_D_SHIFT_H_CH0_D_SHIFT_WIDTH4)
+
+#define HW_PXP_WFE_B_STORE_F_SHIFT_L_CH0       (0x00001580)
+
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD0 0x80000000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD0(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD0)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3 0x40000000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG3)
+#define BP_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3      24
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3 0x3F000000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH3)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD1 0x00800000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD1(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD1)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2 0x00400000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG2)
+#define BP_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2      16
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2 0x003F0000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH2)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD2 0x00008000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD2(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD2)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1 0x00004000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG1)
+#define BP_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1      8
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1 0x00003F00
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH1)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD3 0x00000080
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_RSVD3)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0 0x00000040
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_FLAG0)
+#define BP_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0      0
+#define BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0 0x0000003F
+#define BF_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_F_SHIFT_L_CH0_F_SHIFT_WIDTH0)
+
+#define HW_PXP_WFE_B_STORE_F_SHIFT_H_CH0       (0x00001590)
+
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD0 0x80000000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD0(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD0)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7 0x40000000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG7)
+#define BP_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7      24
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7 0x3F000000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH7)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD1 0x00800000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD1(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD1)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6 0x00400000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG6)
+#define BP_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6      16
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6 0x003F0000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH6)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD2 0x00008000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD2(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD2)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5 0x00004000
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG5)
+#define BP_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5      8
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5 0x00003F00
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH5)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD3 0x00000080
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD3(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_RSVD3)
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4 0x00000040
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_FLAG4)
+#define BP_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4      0
+#define BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4 0x0000003F
+#define BF_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_F_SHIFT_H_CH0_F_SHIFT_WIDTH4)
+
+#define HW_PXP_WFE_B_STORE_F_MASK_L_CH0        (0x000015a0)
+
+#define BP_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK3      24
+#define BM_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK3 0xFF000000
+#define BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK3(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK3)
+#define BP_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK2      16
+#define BM_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK2 0x00FF0000
+#define BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK2)
+#define BP_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK1      8
+#define BM_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK1 0x0000FF00
+#define BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK1)
+#define BP_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK0      0
+#define BM_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK0 0x000000FF
+#define BF_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_F_MASK_L_CH0_F_MASK0)
+
+#define HW_PXP_WFE_B_STORE_F_MASK_H_CH0        (0x000015b0)
+
+#define BP_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK7      24
+#define BM_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK7 0xFF000000
+#define BF_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK7(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK7)
+#define BP_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK6      16
+#define BM_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK6 0x00FF0000
+#define BF_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK6)
+#define BP_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK5      8
+#define BM_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK5 0x0000FF00
+#define BF_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK5)
+#define BP_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK4      0
+#define BM_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK4 0x000000FF
+#define BF_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STORE_F_MASK_H_CH0_F_MASK4)
+
+#define HW_PXP_FETCH_WFE_A_DEBUG       (0x000015c0)
+
+#define BP_PXP_FETCH_WFE_A_DEBUG_RSVD      29
+#define BM_PXP_FETCH_WFE_A_DEBUG_RSVD 0xE0000000
+#define BF_PXP_FETCH_WFE_A_DEBUG_RSVD(v) \
+        (((v) << 29) & BM_PXP_FETCH_WFE_A_DEBUG_RSVD)
+#define BM_PXP_FETCH_WFE_A_DEBUG_BUF_SEL 0x10000000
+#define BF_PXP_FETCH_WFE_A_DEBUG_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_FETCH_WFE_A_DEBUG_BUF_SEL)
+#define BV_PXP_FETCH_WFE_A_DEBUG_BUF_SEL__BF0 0x0
+#define BV_PXP_FETCH_WFE_A_DEBUG_BUF_SEL__BF1 0x1
+#define BP_PXP_FETCH_WFE_A_DEBUG_ITEM_SEL      24
+#define BM_PXP_FETCH_WFE_A_DEBUG_ITEM_SEL 0x0F000000
+#define BF_PXP_FETCH_WFE_A_DEBUG_ITEM_SEL(v)  \
+        (((v) << 24) & BM_PXP_FETCH_WFE_A_DEBUG_ITEM_SEL)
+#define BP_PXP_FETCH_WFE_A_DEBUG_DEBUG_VALUE      0
+#define BM_PXP_FETCH_WFE_A_DEBUG_DEBUG_VALUE 0x00FFFFFF
+#define BF_PXP_FETCH_WFE_A_DEBUG_DEBUG_VALUE(v)  \
+        (((v) << 0) & BM_PXP_FETCH_WFE_A_DEBUG_DEBUG_VALUE)
+
+#define HW_PXP_FETCH_WFE_B_DEBUG       (0x000015d0)
+
+#define BP_PXP_FETCH_WFE_B_DEBUG_RSVD      29
+#define BM_PXP_FETCH_WFE_B_DEBUG_RSVD 0xE0000000
+#define BF_PXP_FETCH_WFE_B_DEBUG_RSVD(v) \
+        (((v) << 29) & BM_PXP_FETCH_WFE_B_DEBUG_RSVD)
+#define BM_PXP_FETCH_WFE_B_DEBUG_BUF_SEL 0x10000000
+#define BF_PXP_FETCH_WFE_B_DEBUG_BUF_SEL(v)  \
+        (((v) << 28) & BM_PXP_FETCH_WFE_B_DEBUG_BUF_SEL)
+#define BV_PXP_FETCH_WFE_B_DEBUG_BUF_SEL__BF0 0x0
+#define BV_PXP_FETCH_WFE_B_DEBUG_BUF_SEL__BF1 0x1
+#define BP_PXP_FETCH_WFE_B_DEBUG_ITEM_SEL      24
+#define BM_PXP_FETCH_WFE_B_DEBUG_ITEM_SEL 0x0F000000
+#define BF_PXP_FETCH_WFE_B_DEBUG_ITEM_SEL(v)  \
+        (((v) << 24) & BM_PXP_FETCH_WFE_B_DEBUG_ITEM_SEL)
+#define BP_PXP_FETCH_WFE_B_DEBUG_DEBUG_VALUE      0
+#define BM_PXP_FETCH_WFE_B_DEBUG_DEBUG_VALUE 0x00FFFFFF
+#define BF_PXP_FETCH_WFE_B_DEBUG_DEBUG_VALUE(v)  \
+        (((v) << 0) & BM_PXP_FETCH_WFE_B_DEBUG_DEBUG_VALUE)
+
+#define HW_PXP_DITHER_CTRL     (0x00001670)
+#define HW_PXP_DITHER_CTRL_SET (0x00001674)
+#define HW_PXP_DITHER_CTRL_CLR (0x00001678)
+#define HW_PXP_DITHER_CTRL_TOG (0x0000167c)
+
+#define BM_PXP_DITHER_CTRL_BUSY0 0x80000000
+#define BF_PXP_DITHER_CTRL_BUSY0(v) \
+        (((v) << 31) & BM_PXP_DITHER_CTRL_BUSY0)
+#define BM_PXP_DITHER_CTRL_BUSY1 0x40000000
+#define BF_PXP_DITHER_CTRL_BUSY1(v)  \
+        (((v) << 30) & BM_PXP_DITHER_CTRL_BUSY1)
+#define BM_PXP_DITHER_CTRL_BUSY2 0x20000000
+#define BF_PXP_DITHER_CTRL_BUSY2(v)  \
+        (((v) << 29) & BM_PXP_DITHER_CTRL_BUSY2)
+#define BP_PXP_DITHER_CTRL_RSVD0      25
+#define BM_PXP_DITHER_CTRL_RSVD0 0x1E000000
+#define BF_PXP_DITHER_CTRL_RSVD0(v)  \
+        (((v) << 25) & BM_PXP_DITHER_CTRL_RSVD0)
+#define BM_PXP_DITHER_CTRL_ORDERED_ROUND_MODE 0x01000000
+#define BF_PXP_DITHER_CTRL_ORDERED_ROUND_MODE(v)  \
+        (((v) << 24) & BM_PXP_DITHER_CTRL_ORDERED_ROUND_MODE)
+#define BV_PXP_DITHER_CTRL_ORDERED_ROUND_MODE__0 0x0
+#define BV_PXP_DITHER_CTRL_ORDERED_ROUND_MODE__1 0x1
+#define BM_PXP_DITHER_CTRL_FINAL_LUT_ENABLE 0x00800000
+#define BF_PXP_DITHER_CTRL_FINAL_LUT_ENABLE(v)  \
+        (((v) << 23) & BM_PXP_DITHER_CTRL_FINAL_LUT_ENABLE)
+#define BV_PXP_DITHER_CTRL_FINAL_LUT_ENABLE__Disabled 0x0
+#define BV_PXP_DITHER_CTRL_FINAL_LUT_ENABLE__Enabled  0x1
+#define BP_PXP_DITHER_CTRL_IDX_MATRIX2_SIZE      21
+#define BM_PXP_DITHER_CTRL_IDX_MATRIX2_SIZE 0x00600000
+#define BF_PXP_DITHER_CTRL_IDX_MATRIX2_SIZE(v)  \
+        (((v) << 21) & BM_PXP_DITHER_CTRL_IDX_MATRIX2_SIZE)
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX2_SIZE__0 0x0
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX2_SIZE__1 0x1
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX2_SIZE__2 0x2
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX2_SIZE__3 0x3
+#define BP_PXP_DITHER_CTRL_IDX_MATRIX1_SIZE      19
+#define BM_PXP_DITHER_CTRL_IDX_MATRIX1_SIZE 0x00180000
+#define BF_PXP_DITHER_CTRL_IDX_MATRIX1_SIZE(v)  \
+        (((v) << 19) & BM_PXP_DITHER_CTRL_IDX_MATRIX1_SIZE)
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX1_SIZE__0 0x0
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX1_SIZE__1 0x1
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX1_SIZE__2 0x2
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX1_SIZE__3 0x3
+#define BP_PXP_DITHER_CTRL_IDX_MATRIX0_SIZE      17
+#define BM_PXP_DITHER_CTRL_IDX_MATRIX0_SIZE 0x00060000
+#define BF_PXP_DITHER_CTRL_IDX_MATRIX0_SIZE(v)  \
+        (((v) << 17) & BM_PXP_DITHER_CTRL_IDX_MATRIX0_SIZE)
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX0_SIZE__0 0x0
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX0_SIZE__1 0x1
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX0_SIZE__2 0x2
+#define BV_PXP_DITHER_CTRL_IDX_MATRIX0_SIZE__3 0x3
+#define BP_PXP_DITHER_CTRL_LUT_MODE      15
+#define BM_PXP_DITHER_CTRL_LUT_MODE 0x00018000
+#define BF_PXP_DITHER_CTRL_LUT_MODE(v)  \
+        (((v) << 15) & BM_PXP_DITHER_CTRL_LUT_MODE)
+#define BV_PXP_DITHER_CTRL_LUT_MODE__0 0x0
+#define BV_PXP_DITHER_CTRL_LUT_MODE__1 0x1
+#define BV_PXP_DITHER_CTRL_LUT_MODE__2 0x2
+#define BV_PXP_DITHER_CTRL_LUT_MODE__3 0x3
+#define BP_PXP_DITHER_CTRL_NUM_QUANT_BIT      12
+#define BM_PXP_DITHER_CTRL_NUM_QUANT_BIT 0x00007000
+#define BF_PXP_DITHER_CTRL_NUM_QUANT_BIT(v)  \
+        (((v) << 12) & BM_PXP_DITHER_CTRL_NUM_QUANT_BIT)
+#define BV_PXP_DITHER_CTRL_NUM_QUANT_BIT__0 0x0
+#define BV_PXP_DITHER_CTRL_NUM_QUANT_BIT__1 0x1
+#define BV_PXP_DITHER_CTRL_NUM_QUANT_BIT__2 0x2
+#define BV_PXP_DITHER_CTRL_NUM_QUANT_BIT__3 0x3
+#define BV_PXP_DITHER_CTRL_NUM_QUANT_BIT__4 0x4
+#define BV_PXP_DITHER_CTRL_NUM_QUANT_BIT__5 0x5
+#define BV_PXP_DITHER_CTRL_NUM_QUANT_BIT__6 0x6
+#define BV_PXP_DITHER_CTRL_NUM_QUANT_BIT__7 0x7
+#define BP_PXP_DITHER_CTRL_DITHER_MODE2      9
+#define BM_PXP_DITHER_CTRL_DITHER_MODE2 0x00000E00
+#define BF_PXP_DITHER_CTRL_DITHER_MODE2(v)  \
+        (((v) << 9) & BM_PXP_DITHER_CTRL_DITHER_MODE2)
+#define BV_PXP_DITHER_CTRL_DITHER_MODE2__0 0x0
+#define BV_PXP_DITHER_CTRL_DITHER_MODE2__1 0x1
+#define BV_PXP_DITHER_CTRL_DITHER_MODE2__2 0x2
+#define BV_PXP_DITHER_CTRL_DITHER_MODE2__3 0x3
+#define BV_PXP_DITHER_CTRL_DITHER_MODE2__4 0x4
+#define BV_PXP_DITHER_CTRL_DITHER_MODE2__5 0x5
+#define BV_PXP_DITHER_CTRL_DITHER_MODE2__6 0x6
+#define BV_PXP_DITHER_CTRL_DITHER_MODE2__7 0x7
+#define BP_PXP_DITHER_CTRL_DITHER_MODE1      6
+#define BM_PXP_DITHER_CTRL_DITHER_MODE1 0x000001C0
+#define BF_PXP_DITHER_CTRL_DITHER_MODE1(v)  \
+        (((v) << 6) & BM_PXP_DITHER_CTRL_DITHER_MODE1)
+#define BV_PXP_DITHER_CTRL_DITHER_MODE1__0 0x0
+#define BV_PXP_DITHER_CTRL_DITHER_MODE1__1 0x1
+#define BV_PXP_DITHER_CTRL_DITHER_MODE1__2 0x2
+#define BV_PXP_DITHER_CTRL_DITHER_MODE1__3 0x3
+#define BV_PXP_DITHER_CTRL_DITHER_MODE1__4 0x4
+#define BV_PXP_DITHER_CTRL_DITHER_MODE1__5 0x5
+#define BV_PXP_DITHER_CTRL_DITHER_MODE1__6 0x6
+#define BV_PXP_DITHER_CTRL_DITHER_MODE1__7 0x7
+#define BP_PXP_DITHER_CTRL_DITHER_MODE0      3
+#define BM_PXP_DITHER_CTRL_DITHER_MODE0 0x00000038
+#define BF_PXP_DITHER_CTRL_DITHER_MODE0(v)  \
+        (((v) << 3) & BM_PXP_DITHER_CTRL_DITHER_MODE0)
+#define BV_PXP_DITHER_CTRL_DITHER_MODE0__0 0x0
+#define BV_PXP_DITHER_CTRL_DITHER_MODE0__1 0x1
+#define BV_PXP_DITHER_CTRL_DITHER_MODE0__2 0x2
+#define BV_PXP_DITHER_CTRL_DITHER_MODE0__3 0x3
+#define BV_PXP_DITHER_CTRL_DITHER_MODE0__4 0x4
+#define BV_PXP_DITHER_CTRL_DITHER_MODE0__5 0x5
+#define BV_PXP_DITHER_CTRL_DITHER_MODE0__6 0x6
+#define BV_PXP_DITHER_CTRL_DITHER_MODE0__7 0x7
+#define BM_PXP_DITHER_CTRL_ENABLE2 0x00000004
+#define BF_PXP_DITHER_CTRL_ENABLE2(v)  \
+        (((v) << 2) & BM_PXP_DITHER_CTRL_ENABLE2)
+#define BV_PXP_DITHER_CTRL_ENABLE2__Disabled 0x0
+#define BV_PXP_DITHER_CTRL_ENABLE2__Enabled  0x1
+#define BM_PXP_DITHER_CTRL_ENABLE1 0x00000002
+#define BF_PXP_DITHER_CTRL_ENABLE1(v)  \
+        (((v) << 1) & BM_PXP_DITHER_CTRL_ENABLE1)
+#define BV_PXP_DITHER_CTRL_ENABLE1__Disabled 0x0
+#define BV_PXP_DITHER_CTRL_ENABLE1__Enabled  0x1
+#define BM_PXP_DITHER_CTRL_ENABLE0 0x00000001
+#define BF_PXP_DITHER_CTRL_ENABLE0(v)  \
+        (((v) << 0) & BM_PXP_DITHER_CTRL_ENABLE0)
+#define BV_PXP_DITHER_CTRL_ENABLE0__Disabled 0x0
+#define BV_PXP_DITHER_CTRL_ENABLE0__Enabled  0x1
+
+#define HW_PXP_DITHER_FINAL_LUT_DATA0  (0x00001680)
+#define HW_PXP_DITHER_FINAL_LUT_DATA0_SET      (0x00001684)
+#define HW_PXP_DITHER_FINAL_LUT_DATA0_CLR      (0x00001688)
+#define HW_PXP_DITHER_FINAL_LUT_DATA0_TOG      (0x0000168c)
+
+#define BP_PXP_DITHER_FINAL_LUT_DATA0_DATA3      24
+#define BM_PXP_DITHER_FINAL_LUT_DATA0_DATA3 0xFF000000
+#define BF_PXP_DITHER_FINAL_LUT_DATA0_DATA3(v) \
+        (((v) << 24) & BM_PXP_DITHER_FINAL_LUT_DATA0_DATA3)
+#define BP_PXP_DITHER_FINAL_LUT_DATA0_DATA2      16
+#define BM_PXP_DITHER_FINAL_LUT_DATA0_DATA2 0x00FF0000
+#define BF_PXP_DITHER_FINAL_LUT_DATA0_DATA2(v)  \
+        (((v) << 16) & BM_PXP_DITHER_FINAL_LUT_DATA0_DATA2)
+#define BP_PXP_DITHER_FINAL_LUT_DATA0_DATA1      8
+#define BM_PXP_DITHER_FINAL_LUT_DATA0_DATA1 0x0000FF00
+#define BF_PXP_DITHER_FINAL_LUT_DATA0_DATA1(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FINAL_LUT_DATA0_DATA1)
+#define BP_PXP_DITHER_FINAL_LUT_DATA0_DATA0      0
+#define BM_PXP_DITHER_FINAL_LUT_DATA0_DATA0 0x000000FF
+#define BF_PXP_DITHER_FINAL_LUT_DATA0_DATA0(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FINAL_LUT_DATA0_DATA0)
+
+#define HW_PXP_DITHER_FINAL_LUT_DATA1  (0x00001690)
+#define HW_PXP_DITHER_FINAL_LUT_DATA1_SET      (0x00001694)
+#define HW_PXP_DITHER_FINAL_LUT_DATA1_CLR      (0x00001698)
+#define HW_PXP_DITHER_FINAL_LUT_DATA1_TOG      (0x0000169c)
+
+#define BP_PXP_DITHER_FINAL_LUT_DATA1_DATA7      24
+#define BM_PXP_DITHER_FINAL_LUT_DATA1_DATA7 0xFF000000
+#define BF_PXP_DITHER_FINAL_LUT_DATA1_DATA7(v) \
+        (((v) << 24) & BM_PXP_DITHER_FINAL_LUT_DATA1_DATA7)
+#define BP_PXP_DITHER_FINAL_LUT_DATA1_DATA6      16
+#define BM_PXP_DITHER_FINAL_LUT_DATA1_DATA6 0x00FF0000
+#define BF_PXP_DITHER_FINAL_LUT_DATA1_DATA6(v)  \
+        (((v) << 16) & BM_PXP_DITHER_FINAL_LUT_DATA1_DATA6)
+#define BP_PXP_DITHER_FINAL_LUT_DATA1_DATA5      8
+#define BM_PXP_DITHER_FINAL_LUT_DATA1_DATA5 0x0000FF00
+#define BF_PXP_DITHER_FINAL_LUT_DATA1_DATA5(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FINAL_LUT_DATA1_DATA5)
+#define BP_PXP_DITHER_FINAL_LUT_DATA1_DATA4      0
+#define BM_PXP_DITHER_FINAL_LUT_DATA1_DATA4 0x000000FF
+#define BF_PXP_DITHER_FINAL_LUT_DATA1_DATA4(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FINAL_LUT_DATA1_DATA4)
+
+#define HW_PXP_DITHER_FINAL_LUT_DATA2  (0x000016a0)
+#define HW_PXP_DITHER_FINAL_LUT_DATA2_SET      (0x000016a4)
+#define HW_PXP_DITHER_FINAL_LUT_DATA2_CLR      (0x000016a8)
+#define HW_PXP_DITHER_FINAL_LUT_DATA2_TOG      (0x000016ac)
+
+#define BP_PXP_DITHER_FINAL_LUT_DATA2_DATA11      24
+#define BM_PXP_DITHER_FINAL_LUT_DATA2_DATA11 0xFF000000
+#define BF_PXP_DITHER_FINAL_LUT_DATA2_DATA11(v) \
+        (((v) << 24) & BM_PXP_DITHER_FINAL_LUT_DATA2_DATA11)
+#define BP_PXP_DITHER_FINAL_LUT_DATA2_DATA10      16
+#define BM_PXP_DITHER_FINAL_LUT_DATA2_DATA10 0x00FF0000
+#define BF_PXP_DITHER_FINAL_LUT_DATA2_DATA10(v)  \
+        (((v) << 16) & BM_PXP_DITHER_FINAL_LUT_DATA2_DATA10)
+#define BP_PXP_DITHER_FINAL_LUT_DATA2_DATA9      8
+#define BM_PXP_DITHER_FINAL_LUT_DATA2_DATA9 0x0000FF00
+#define BF_PXP_DITHER_FINAL_LUT_DATA2_DATA9(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FINAL_LUT_DATA2_DATA9)
+#define BP_PXP_DITHER_FINAL_LUT_DATA2_DATA8      0
+#define BM_PXP_DITHER_FINAL_LUT_DATA2_DATA8 0x000000FF
+#define BF_PXP_DITHER_FINAL_LUT_DATA2_DATA8(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FINAL_LUT_DATA2_DATA8)
+
+#define HW_PXP_DITHER_FINAL_LUT_DATA3  (0x000016b0)
+#define HW_PXP_DITHER_FINAL_LUT_DATA3_SET      (0x000016b4)
+#define HW_PXP_DITHER_FINAL_LUT_DATA3_CLR      (0x000016b8)
+#define HW_PXP_DITHER_FINAL_LUT_DATA3_TOG      (0x000016bc)
+
+#define BP_PXP_DITHER_FINAL_LUT_DATA3_DATA15      24
+#define BM_PXP_DITHER_FINAL_LUT_DATA3_DATA15 0xFF000000
+#define BF_PXP_DITHER_FINAL_LUT_DATA3_DATA15(v) \
+        (((v) << 24) & BM_PXP_DITHER_FINAL_LUT_DATA3_DATA15)
+#define BP_PXP_DITHER_FINAL_LUT_DATA3_DATA14      16
+#define BM_PXP_DITHER_FINAL_LUT_DATA3_DATA14 0x00FF0000
+#define BF_PXP_DITHER_FINAL_LUT_DATA3_DATA14(v)  \
+        (((v) << 16) & BM_PXP_DITHER_FINAL_LUT_DATA3_DATA14)
+#define BP_PXP_DITHER_FINAL_LUT_DATA3_DATA13      8
+#define BM_PXP_DITHER_FINAL_LUT_DATA3_DATA13 0x0000FF00
+#define BF_PXP_DITHER_FINAL_LUT_DATA3_DATA13(v)  \
+        (((v) << 8) & BM_PXP_DITHER_FINAL_LUT_DATA3_DATA13)
+#define BP_PXP_DITHER_FINAL_LUT_DATA3_DATA12      0
+#define BM_PXP_DITHER_FINAL_LUT_DATA3_DATA12 0x000000FF
+#define BF_PXP_DITHER_FINAL_LUT_DATA3_DATA12(v)  \
+        (((v) << 0) & BM_PXP_DITHER_FINAL_LUT_DATA3_DATA12)
+
+#define HW_PXP_WFE_A_CTRL      (0x000016c0)
+#define HW_PXP_WFE_A_CTRL_SET  (0x000016c4)
+#define HW_PXP_WFE_A_CTRL_CLR  (0x000016c8)
+#define HW_PXP_WFE_A_CTRL_TOG  (0x000016cc)
+
+#define BM_PXP_WFE_A_CTRL_DONE 0x80000000
+#define BF_PXP_WFE_A_CTRL_DONE(v) \
+        (((v) << 31) & BM_PXP_WFE_A_CTRL_DONE)
+#define BP_PXP_WFE_A_CTRL_RSVD0      3
+#define BM_PXP_WFE_A_CTRL_RSVD0 0x7FFFFFF8
+#define BF_PXP_WFE_A_CTRL_RSVD0(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_CTRL_RSVD0)
+#define BM_PXP_WFE_A_CTRL_SW_RESET 0x00000004
+#define BF_PXP_WFE_A_CTRL_SW_RESET(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_CTRL_SW_RESET)
+#define BM_PXP_WFE_A_CTRL_RSVD1 0x00000002
+#define BF_PXP_WFE_A_CTRL_RSVD1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_CTRL_RSVD1)
+#define BM_PXP_WFE_A_CTRL_ENABLE 0x00000001
+#define BF_PXP_WFE_A_CTRL_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_CTRL_ENABLE)
+#define BV_PXP_WFE_A_CTRL_ENABLE__0 0x0
+#define BV_PXP_WFE_A_CTRL_ENABLE__1 0x1
+
+#define HW_PXP_WFE_A_DIMENSIONS        (0x000016d0)
+
+#define BP_PXP_WFE_A_DIMENSIONS_RSVD0      28
+#define BM_PXP_WFE_A_DIMENSIONS_RSVD0 0xF0000000
+#define BF_PXP_WFE_A_DIMENSIONS_RSVD0(v) \
+        (((v) << 28) & BM_PXP_WFE_A_DIMENSIONS_RSVD0)
+#define BP_PXP_WFE_A_DIMENSIONS_HEIGHT      16
+#define BM_PXP_WFE_A_DIMENSIONS_HEIGHT 0x0FFF0000
+#define BF_PXP_WFE_A_DIMENSIONS_HEIGHT(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_DIMENSIONS_HEIGHT)
+#define BP_PXP_WFE_A_DIMENSIONS_RSVD1      12
+#define BM_PXP_WFE_A_DIMENSIONS_RSVD1 0x0000F000
+#define BF_PXP_WFE_A_DIMENSIONS_RSVD1(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_DIMENSIONS_RSVD1)
+#define BP_PXP_WFE_A_DIMENSIONS_WIDTH      0
+#define BM_PXP_WFE_A_DIMENSIONS_WIDTH 0x00000FFF
+#define BF_PXP_WFE_A_DIMENSIONS_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_DIMENSIONS_WIDTH)
+
+#define HW_PXP_WFE_A_OFFSET    (0x000016e0)
+
+#define BP_PXP_WFE_A_OFFSET_RSVD0      28
+#define BM_PXP_WFE_A_OFFSET_RSVD0 0xF0000000
+#define BF_PXP_WFE_A_OFFSET_RSVD0(v) \
+        (((v) << 28) & BM_PXP_WFE_A_OFFSET_RSVD0)
+#define BP_PXP_WFE_A_OFFSET_Y_OFFSET      16
+#define BM_PXP_WFE_A_OFFSET_Y_OFFSET 0x0FFF0000
+#define BF_PXP_WFE_A_OFFSET_Y_OFFSET(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_OFFSET_Y_OFFSET)
+#define BP_PXP_WFE_A_OFFSET_RSVD1      12
+#define BM_PXP_WFE_A_OFFSET_RSVD1 0x0000F000
+#define BF_PXP_WFE_A_OFFSET_RSVD1(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_OFFSET_RSVD1)
+#define BP_PXP_WFE_A_OFFSET_X_OFFSET      0
+#define BM_PXP_WFE_A_OFFSET_X_OFFSET 0x00000FFF
+#define BF_PXP_WFE_A_OFFSET_X_OFFSET(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_OFFSET_X_OFFSET)
+
+#define HW_PXP_WFE_A_SW_DATA_REGS      (0x000016f0)
+
+#define BP_PXP_WFE_A_SW_DATA_REGS_VAL3      24
+#define BM_PXP_WFE_A_SW_DATA_REGS_VAL3 0xFF000000
+#define BF_PXP_WFE_A_SW_DATA_REGS_VAL3(v) \
+        (((v) << 24) & BM_PXP_WFE_A_SW_DATA_REGS_VAL3)
+#define BP_PXP_WFE_A_SW_DATA_REGS_VAL2      16
+#define BM_PXP_WFE_A_SW_DATA_REGS_VAL2 0x00FF0000
+#define BF_PXP_WFE_A_SW_DATA_REGS_VAL2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_SW_DATA_REGS_VAL2)
+#define BP_PXP_WFE_A_SW_DATA_REGS_VAL1      8
+#define BM_PXP_WFE_A_SW_DATA_REGS_VAL1 0x0000FF00
+#define BF_PXP_WFE_A_SW_DATA_REGS_VAL1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_SW_DATA_REGS_VAL1)
+#define BP_PXP_WFE_A_SW_DATA_REGS_VAL0      0
+#define BM_PXP_WFE_A_SW_DATA_REGS_VAL0 0x000000FF
+#define BF_PXP_WFE_A_SW_DATA_REGS_VAL0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_SW_DATA_REGS_VAL0)
+
+#define HW_PXP_WFE_A_SW_FLAG_REGS      (0x00001700)
+
+#define BP_PXP_WFE_A_SW_FLAG_REGS_RSVD      4
+#define BM_PXP_WFE_A_SW_FLAG_REGS_RSVD 0xFFFFFFF0
+#define BF_PXP_WFE_A_SW_FLAG_REGS_RSVD(v) \
+        (((v) << 4) & BM_PXP_WFE_A_SW_FLAG_REGS_RSVD)
+#define BM_PXP_WFE_A_SW_FLAG_REGS_VAL3 0x00000008
+#define BF_PXP_WFE_A_SW_FLAG_REGS_VAL3(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_SW_FLAG_REGS_VAL3)
+#define BM_PXP_WFE_A_SW_FLAG_REGS_VAL2 0x00000004
+#define BF_PXP_WFE_A_SW_FLAG_REGS_VAL2(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_SW_FLAG_REGS_VAL2)
+#define BM_PXP_WFE_A_SW_FLAG_REGS_VAL1 0x00000002
+#define BF_PXP_WFE_A_SW_FLAG_REGS_VAL1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_SW_FLAG_REGS_VAL1)
+#define BM_PXP_WFE_A_SW_FLAG_REGS_VAL0 0x00000001
+#define BF_PXP_WFE_A_SW_FLAG_REGS_VAL0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_SW_FLAG_REGS_VAL0)
+
+#define HW_PXP_WFE_A_STAGE1_MUX0       (0x00001710)
+#define HW_PXP_WFE_A_STAGE1_MUX0_SET   (0x00001714)
+#define HW_PXP_WFE_A_STAGE1_MUX0_CLR   (0x00001718)
+#define HW_PXP_WFE_A_STAGE1_MUX0_TOG   (0x0000171c)
+
+#define BP_PXP_WFE_A_STAGE1_MUX0_RSVD0      30
+#define BM_PXP_WFE_A_STAGE1_MUX0_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE1_MUX0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE1_MUX0_RSVD0)
+#define BP_PXP_WFE_A_STAGE1_MUX0_MUX3      24
+#define BM_PXP_WFE_A_STAGE1_MUX0_MUX3 0x3F000000
+#define BF_PXP_WFE_A_STAGE1_MUX0_MUX3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE1_MUX0_MUX3)
+#define BP_PXP_WFE_A_STAGE1_MUX0_RSVD1      22
+#define BM_PXP_WFE_A_STAGE1_MUX0_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE1_MUX0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE1_MUX0_RSVD1)
+#define BP_PXP_WFE_A_STAGE1_MUX0_MUX2      16
+#define BM_PXP_WFE_A_STAGE1_MUX0_MUX2 0x003F0000
+#define BF_PXP_WFE_A_STAGE1_MUX0_MUX2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE1_MUX0_MUX2)
+#define BP_PXP_WFE_A_STAGE1_MUX0_RSVD2      14
+#define BM_PXP_WFE_A_STAGE1_MUX0_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE1_MUX0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE1_MUX0_RSVD2)
+#define BP_PXP_WFE_A_STAGE1_MUX0_MUX1      8
+#define BM_PXP_WFE_A_STAGE1_MUX0_MUX1 0x00003F00
+#define BF_PXP_WFE_A_STAGE1_MUX0_MUX1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE1_MUX0_MUX1)
+#define BP_PXP_WFE_A_STAGE1_MUX0_RSVD3      6
+#define BM_PXP_WFE_A_STAGE1_MUX0_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE1_MUX0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE1_MUX0_RSVD3)
+#define BP_PXP_WFE_A_STAGE1_MUX0_MUX0      0
+#define BM_PXP_WFE_A_STAGE1_MUX0_MUX0 0x0000003F
+#define BF_PXP_WFE_A_STAGE1_MUX0_MUX0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE1_MUX0_MUX0)
+
+#define HW_PXP_WFE_A_STAGE1_MUX1       (0x00001720)
+#define HW_PXP_WFE_A_STAGE1_MUX1_SET   (0x00001724)
+#define HW_PXP_WFE_A_STAGE1_MUX1_CLR   (0x00001728)
+#define HW_PXP_WFE_A_STAGE1_MUX1_TOG   (0x0000172c)
+
+#define BP_PXP_WFE_A_STAGE1_MUX1_RSVD0      30
+#define BM_PXP_WFE_A_STAGE1_MUX1_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE1_MUX1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE1_MUX1_RSVD0)
+#define BP_PXP_WFE_A_STAGE1_MUX1_MUX7      24
+#define BM_PXP_WFE_A_STAGE1_MUX1_MUX7 0x3F000000
+#define BF_PXP_WFE_A_STAGE1_MUX1_MUX7(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE1_MUX1_MUX7)
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__INC        0x0
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__DEC        0x1
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__ADD        0x2
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__MINUS      0x3
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__AND        0x4
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__OR         0x5
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__XOR        0x6
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__SHIFTLEFT  0x7
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__SHIFTRIGHT 0x8
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__BIT_AND    0x9
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__BIT_OR     0xa
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__BIT_CMP    0xb
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX7__NOP        0xc
+#define BP_PXP_WFE_A_STAGE1_MUX1_RSVD1      22
+#define BM_PXP_WFE_A_STAGE1_MUX1_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE1_MUX1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE1_MUX1_RSVD1)
+#define BP_PXP_WFE_A_STAGE1_MUX1_MUX6      16
+#define BM_PXP_WFE_A_STAGE1_MUX1_MUX6 0x003F0000
+#define BF_PXP_WFE_A_STAGE1_MUX1_MUX6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE1_MUX1_MUX6)
+#define BP_PXP_WFE_A_STAGE1_MUX1_RSVD2      14
+#define BM_PXP_WFE_A_STAGE1_MUX1_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE1_MUX1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE1_MUX1_RSVD2)
+#define BP_PXP_WFE_A_STAGE1_MUX1_MUX5      8
+#define BM_PXP_WFE_A_STAGE1_MUX1_MUX5 0x00003F00
+#define BF_PXP_WFE_A_STAGE1_MUX1_MUX5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE1_MUX1_MUX5)
+#define BP_PXP_WFE_A_STAGE1_MUX1_RSVD3      6
+#define BM_PXP_WFE_A_STAGE1_MUX1_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE1_MUX1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE1_MUX1_RSVD3)
+#define BP_PXP_WFE_A_STAGE1_MUX1_MUX4      0
+#define BM_PXP_WFE_A_STAGE1_MUX1_MUX4 0x0000003F
+#define BF_PXP_WFE_A_STAGE1_MUX1_MUX4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE1_MUX1_MUX4)
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__INC        0x0
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__DEC        0x1
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__ADD        0x2
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__MINUS      0x3
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__AND        0x4
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__OR         0x5
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__XOR        0x6
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__SHIFTLEFT  0x7
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__SHIFTRIGHT 0x8
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__BIT_AND    0x9
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__BIT_OR     0xa
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__BIT_CMP    0xb
+#define BV_PXP_WFE_A_STAGE1_MUX1_MUX4__NOP        0xc
+
+#define HW_PXP_WFE_A_STAGE1_MUX2       (0x00001730)
+#define HW_PXP_WFE_A_STAGE1_MUX2_SET   (0x00001734)
+#define HW_PXP_WFE_A_STAGE1_MUX2_CLR   (0x00001738)
+#define HW_PXP_WFE_A_STAGE1_MUX2_TOG   (0x0000173c)
+
+#define BP_PXP_WFE_A_STAGE1_MUX2_RSVD0      30
+#define BM_PXP_WFE_A_STAGE1_MUX2_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE1_MUX2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE1_MUX2_RSVD0)
+#define BP_PXP_WFE_A_STAGE1_MUX2_MUX11      24
+#define BM_PXP_WFE_A_STAGE1_MUX2_MUX11 0x3F000000
+#define BF_PXP_WFE_A_STAGE1_MUX2_MUX11(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE1_MUX2_MUX11)
+#define BP_PXP_WFE_A_STAGE1_MUX2_RSVD1      22
+#define BM_PXP_WFE_A_STAGE1_MUX2_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE1_MUX2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE1_MUX2_RSVD1)
+#define BP_PXP_WFE_A_STAGE1_MUX2_MUX10      16
+#define BM_PXP_WFE_A_STAGE1_MUX2_MUX10 0x003F0000
+#define BF_PXP_WFE_A_STAGE1_MUX2_MUX10(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE1_MUX2_MUX10)
+#define BP_PXP_WFE_A_STAGE1_MUX2_RSVD2      14
+#define BM_PXP_WFE_A_STAGE1_MUX2_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE1_MUX2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE1_MUX2_RSVD2)
+#define BP_PXP_WFE_A_STAGE1_MUX2_MUX9      8
+#define BM_PXP_WFE_A_STAGE1_MUX2_MUX9 0x00003F00
+#define BF_PXP_WFE_A_STAGE1_MUX2_MUX9(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE1_MUX2_MUX9)
+#define BP_PXP_WFE_A_STAGE1_MUX2_RSVD3      6
+#define BM_PXP_WFE_A_STAGE1_MUX2_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE1_MUX2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE1_MUX2_RSVD3)
+#define BP_PXP_WFE_A_STAGE1_MUX2_MUX8      0
+#define BM_PXP_WFE_A_STAGE1_MUX2_MUX8 0x0000003F
+#define BF_PXP_WFE_A_STAGE1_MUX2_MUX8(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE1_MUX2_MUX8)
+
+#define HW_PXP_WFE_A_STAGE1_MUX3       (0x00001740)
+#define HW_PXP_WFE_A_STAGE1_MUX3_SET   (0x00001744)
+#define HW_PXP_WFE_A_STAGE1_MUX3_CLR   (0x00001748)
+#define HW_PXP_WFE_A_STAGE1_MUX3_TOG   (0x0000174c)
+
+#define BP_PXP_WFE_A_STAGE1_MUX3_RSVD0      30
+#define BM_PXP_WFE_A_STAGE1_MUX3_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE1_MUX3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE1_MUX3_RSVD0)
+#define BP_PXP_WFE_A_STAGE1_MUX3_MUX15      24
+#define BM_PXP_WFE_A_STAGE1_MUX3_MUX15 0x3F000000
+#define BF_PXP_WFE_A_STAGE1_MUX3_MUX15(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE1_MUX3_MUX15)
+#define BP_PXP_WFE_A_STAGE1_MUX3_RSVD1      22
+#define BM_PXP_WFE_A_STAGE1_MUX3_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE1_MUX3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE1_MUX3_RSVD1)
+#define BP_PXP_WFE_A_STAGE1_MUX3_MUX14      16
+#define BM_PXP_WFE_A_STAGE1_MUX3_MUX14 0x003F0000
+#define BF_PXP_WFE_A_STAGE1_MUX3_MUX14(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE1_MUX3_MUX14)
+#define BP_PXP_WFE_A_STAGE1_MUX3_RSVD2      14
+#define BM_PXP_WFE_A_STAGE1_MUX3_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE1_MUX3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE1_MUX3_RSVD2)
+#define BP_PXP_WFE_A_STAGE1_MUX3_MUX13      8
+#define BM_PXP_WFE_A_STAGE1_MUX3_MUX13 0x00003F00
+#define BF_PXP_WFE_A_STAGE1_MUX3_MUX13(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE1_MUX3_MUX13)
+#define BP_PXP_WFE_A_STAGE1_MUX3_RSVD3      6
+#define BM_PXP_WFE_A_STAGE1_MUX3_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE1_MUX3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE1_MUX3_RSVD3)
+#define BP_PXP_WFE_A_STAGE1_MUX3_MUX12      0
+#define BM_PXP_WFE_A_STAGE1_MUX3_MUX12 0x0000003F
+#define BF_PXP_WFE_A_STAGE1_MUX3_MUX12(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE1_MUX3_MUX12)
+
+#define HW_PXP_WFE_A_STAGE1_MUX4       (0x00001750)
+#define HW_PXP_WFE_A_STAGE1_MUX4_SET   (0x00001754)
+#define HW_PXP_WFE_A_STAGE1_MUX4_CLR   (0x00001758)
+#define HW_PXP_WFE_A_STAGE1_MUX4_TOG   (0x0000175c)
+
+#define BP_PXP_WFE_A_STAGE1_MUX4_RSVD0      24
+#define BM_PXP_WFE_A_STAGE1_MUX4_RSVD0 0xFF000000
+#define BF_PXP_WFE_A_STAGE1_MUX4_RSVD0(v) \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE1_MUX4_RSVD0)
+#define BP_PXP_WFE_A_STAGE1_MUX4_RSVD1      16
+#define BM_PXP_WFE_A_STAGE1_MUX4_RSVD1 0x00FF0000
+#define BF_PXP_WFE_A_STAGE1_MUX4_RSVD1(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE1_MUX4_RSVD1)
+#define BP_PXP_WFE_A_STAGE1_MUX4_RSVD2      14
+#define BM_PXP_WFE_A_STAGE1_MUX4_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE1_MUX4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE1_MUX4_RSVD2)
+#define BP_PXP_WFE_A_STAGE1_MUX4_MUX17      8
+#define BM_PXP_WFE_A_STAGE1_MUX4_MUX17 0x00003F00
+#define BF_PXP_WFE_A_STAGE1_MUX4_MUX17(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE1_MUX4_MUX17)
+#define BP_PXP_WFE_A_STAGE1_MUX4_RSVD3      6
+#define BM_PXP_WFE_A_STAGE1_MUX4_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE1_MUX4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE1_MUX4_RSVD3)
+#define BP_PXP_WFE_A_STAGE1_MUX4_MUX16      0
+#define BM_PXP_WFE_A_STAGE1_MUX4_MUX16 0x0000003F
+#define BF_PXP_WFE_A_STAGE1_MUX4_MUX16(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE1_MUX4_MUX16)
+
+#define HW_PXP_WFE_A_STAGE2_MUX0       (0x00001760)
+#define HW_PXP_WFE_A_STAGE2_MUX0_SET   (0x00001764)
+#define HW_PXP_WFE_A_STAGE2_MUX0_CLR   (0x00001768)
+#define HW_PXP_WFE_A_STAGE2_MUX0_TOG   (0x0000176c)
+
+#define BP_PXP_WFE_A_STAGE2_MUX0_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX0_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX0_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX0_MUX3      24
+#define BM_PXP_WFE_A_STAGE2_MUX0_MUX3 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX0_MUX3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX0_MUX3)
+#define BP_PXP_WFE_A_STAGE2_MUX0_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX0_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX0_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX0_MUX2      16
+#define BM_PXP_WFE_A_STAGE2_MUX0_MUX2 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX0_MUX2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX0_MUX2)
+#define BP_PXP_WFE_A_STAGE2_MUX0_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX0_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX0_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX0_MUX1      8
+#define BM_PXP_WFE_A_STAGE2_MUX0_MUX1 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX0_MUX1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX0_MUX1)
+#define BP_PXP_WFE_A_STAGE2_MUX0_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX0_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX0_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX0_MUX0      0
+#define BM_PXP_WFE_A_STAGE2_MUX0_MUX0 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX0_MUX0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX0_MUX0)
+
+#define HW_PXP_WFE_A_STAGE2_MUX1       (0x00001770)
+#define HW_PXP_WFE_A_STAGE2_MUX1_SET   (0x00001774)
+#define HW_PXP_WFE_A_STAGE2_MUX1_CLR   (0x00001778)
+#define HW_PXP_WFE_A_STAGE2_MUX1_TOG   (0x0000177c)
+
+#define BP_PXP_WFE_A_STAGE2_MUX1_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX1_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX1_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX1_MUX7      24
+#define BM_PXP_WFE_A_STAGE2_MUX1_MUX7 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX1_MUX7(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX1_MUX7)
+#define BP_PXP_WFE_A_STAGE2_MUX1_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX1_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX1_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX1_MUX6      16
+#define BM_PXP_WFE_A_STAGE2_MUX1_MUX6 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX1_MUX6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX1_MUX6)
+#define BP_PXP_WFE_A_STAGE2_MUX1_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX1_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX1_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX1_MUX5      8
+#define BM_PXP_WFE_A_STAGE2_MUX1_MUX5 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX1_MUX5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX1_MUX5)
+#define BP_PXP_WFE_A_STAGE2_MUX1_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX1_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX1_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX1_MUX4      0
+#define BM_PXP_WFE_A_STAGE2_MUX1_MUX4 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX1_MUX4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX1_MUX4)
+
+#define HW_PXP_WFE_A_STAGE2_MUX2       (0x00001780)
+#define HW_PXP_WFE_A_STAGE2_MUX2_SET   (0x00001784)
+#define HW_PXP_WFE_A_STAGE2_MUX2_CLR   (0x00001788)
+#define HW_PXP_WFE_A_STAGE2_MUX2_TOG   (0x0000178c)
+
+#define BP_PXP_WFE_A_STAGE2_MUX2_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX2_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX2_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX2_MUX11      24
+#define BM_PXP_WFE_A_STAGE2_MUX2_MUX11 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX2_MUX11(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX2_MUX11)
+#define BP_PXP_WFE_A_STAGE2_MUX2_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX2_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX2_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX2_MUX10      16
+#define BM_PXP_WFE_A_STAGE2_MUX2_MUX10 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX2_MUX10(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX2_MUX10)
+#define BP_PXP_WFE_A_STAGE2_MUX2_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX2_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX2_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX2_MUX9      8
+#define BM_PXP_WFE_A_STAGE2_MUX2_MUX9 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX2_MUX9(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX2_MUX9)
+#define BP_PXP_WFE_A_STAGE2_MUX2_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX2_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX2_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX2_MUX8      0
+#define BM_PXP_WFE_A_STAGE2_MUX2_MUX8 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX2_MUX8(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX2_MUX8)
+
+#define HW_PXP_WFE_A_STAGE2_MUX3       (0x00001790)
+#define HW_PXP_WFE_A_STAGE2_MUX3_SET   (0x00001794)
+#define HW_PXP_WFE_A_STAGE2_MUX3_CLR   (0x00001798)
+#define HW_PXP_WFE_A_STAGE2_MUX3_TOG   (0x0000179c)
+
+#define BP_PXP_WFE_A_STAGE2_MUX3_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX3_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX3_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX3_MUX15      24
+#define BM_PXP_WFE_A_STAGE2_MUX3_MUX15 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX3_MUX15(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX3_MUX15)
+#define BP_PXP_WFE_A_STAGE2_MUX3_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX3_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX3_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX3_MUX14      16
+#define BM_PXP_WFE_A_STAGE2_MUX3_MUX14 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX3_MUX14(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX3_MUX14)
+#define BP_PXP_WFE_A_STAGE2_MUX3_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX3_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX3_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX3_MUX13      8
+#define BM_PXP_WFE_A_STAGE2_MUX3_MUX13 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX3_MUX13(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX3_MUX13)
+#define BP_PXP_WFE_A_STAGE2_MUX3_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX3_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX3_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX3_MUX12      0
+#define BM_PXP_WFE_A_STAGE2_MUX3_MUX12 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX3_MUX12(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX3_MUX12)
+
+#define HW_PXP_WFE_A_STAGE2_MUX4       (0x000017a0)
+#define HW_PXP_WFE_A_STAGE2_MUX4_SET   (0x000017a4)
+#define HW_PXP_WFE_A_STAGE2_MUX4_CLR   (0x000017a8)
+#define HW_PXP_WFE_A_STAGE2_MUX4_TOG   (0x000017ac)
+
+#define BP_PXP_WFE_A_STAGE2_MUX4_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX4_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX4_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX4_MUX19      24
+#define BM_PXP_WFE_A_STAGE2_MUX4_MUX19 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX4_MUX19(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX4_MUX19)
+#define BP_PXP_WFE_A_STAGE2_MUX4_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX4_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX4_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX4_MUX18      16
+#define BM_PXP_WFE_A_STAGE2_MUX4_MUX18 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX4_MUX18(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX4_MUX18)
+#define BP_PXP_WFE_A_STAGE2_MUX4_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX4_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX4_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX4_MUX17      8
+#define BM_PXP_WFE_A_STAGE2_MUX4_MUX17 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX4_MUX17(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX4_MUX17)
+#define BP_PXP_WFE_A_STAGE2_MUX4_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX4_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX4_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX4_MUX16      0
+#define BM_PXP_WFE_A_STAGE2_MUX4_MUX16 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX4_MUX16(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX4_MUX16)
+
+#define HW_PXP_WFE_A_STAGE2_MUX5       (0x000017b0)
+#define HW_PXP_WFE_A_STAGE2_MUX5_SET   (0x000017b4)
+#define HW_PXP_WFE_A_STAGE2_MUX5_CLR   (0x000017b8)
+#define HW_PXP_WFE_A_STAGE2_MUX5_TOG   (0x000017bc)
+
+#define BP_PXP_WFE_A_STAGE2_MUX5_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX5_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX5_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX5_MUX23      24
+#define BM_PXP_WFE_A_STAGE2_MUX5_MUX23 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX5_MUX23(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX5_MUX23)
+#define BP_PXP_WFE_A_STAGE2_MUX5_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX5_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX5_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX5_MUX22      16
+#define BM_PXP_WFE_A_STAGE2_MUX5_MUX22 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX5_MUX22(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX5_MUX22)
+#define BP_PXP_WFE_A_STAGE2_MUX5_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX5_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX5_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX5_MUX21      8
+#define BM_PXP_WFE_A_STAGE2_MUX5_MUX21 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX5_MUX21(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX5_MUX21)
+#define BP_PXP_WFE_A_STAGE2_MUX5_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX5_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX5_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX5_MUX20      0
+#define BM_PXP_WFE_A_STAGE2_MUX5_MUX20 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX5_MUX20(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX5_MUX20)
+
+#define HW_PXP_WFE_A_STAGE2_MUX6       (0x000017c0)
+#define HW_PXP_WFE_A_STAGE2_MUX6_SET   (0x000017c4)
+#define HW_PXP_WFE_A_STAGE2_MUX6_CLR   (0x000017c8)
+#define HW_PXP_WFE_A_STAGE2_MUX6_TOG   (0x000017cc)
+
+#define BP_PXP_WFE_A_STAGE2_MUX6_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX6_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX6_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX6_MUX27      24
+#define BM_PXP_WFE_A_STAGE2_MUX6_MUX27 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX6_MUX27(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX6_MUX27)
+#define BP_PXP_WFE_A_STAGE2_MUX6_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX6_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX6_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX6_MUX26      16
+#define BM_PXP_WFE_A_STAGE2_MUX6_MUX26 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX6_MUX26(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX6_MUX26)
+#define BP_PXP_WFE_A_STAGE2_MUX6_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX6_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX6_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX6_MUX25      8
+#define BM_PXP_WFE_A_STAGE2_MUX6_MUX25 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX6_MUX25(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX6_MUX25)
+#define BP_PXP_WFE_A_STAGE2_MUX6_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX6_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX6_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX6_MUX24      0
+#define BM_PXP_WFE_A_STAGE2_MUX6_MUX24 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX6_MUX24(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX6_MUX24)
+
+#define HW_PXP_WFE_A_STAGE2_MUX7       (0x000017d0)
+#define HW_PXP_WFE_A_STAGE2_MUX7_SET   (0x000017d4)
+#define HW_PXP_WFE_A_STAGE2_MUX7_CLR   (0x000017d8)
+#define HW_PXP_WFE_A_STAGE2_MUX7_TOG   (0x000017dc)
+
+#define BP_PXP_WFE_A_STAGE2_MUX7_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX7_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX7_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX7_MUX31      24
+#define BM_PXP_WFE_A_STAGE2_MUX7_MUX31 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX7_MUX31(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX7_MUX31)
+#define BP_PXP_WFE_A_STAGE2_MUX7_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX7_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX7_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX7_MUX30      16
+#define BM_PXP_WFE_A_STAGE2_MUX7_MUX30 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX7_MUX30(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX7_MUX30)
+#define BP_PXP_WFE_A_STAGE2_MUX7_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX7_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX7_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX7_MUX29      8
+#define BM_PXP_WFE_A_STAGE2_MUX7_MUX29 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX7_MUX29(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX7_MUX29)
+#define BP_PXP_WFE_A_STAGE2_MUX7_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX7_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX7_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX7_MUX28      0
+#define BM_PXP_WFE_A_STAGE2_MUX7_MUX28 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX7_MUX28(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX7_MUX28)
+
+#define HW_PXP_WFE_A_STAGE2_MUX8       (0x000017e0)
+#define HW_PXP_WFE_A_STAGE2_MUX8_SET   (0x000017e4)
+#define HW_PXP_WFE_A_STAGE2_MUX8_CLR   (0x000017e8)
+#define HW_PXP_WFE_A_STAGE2_MUX8_TOG   (0x000017ec)
+
+#define BP_PXP_WFE_A_STAGE2_MUX8_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX8_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX8_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX8_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX8_MUX35      24
+#define BM_PXP_WFE_A_STAGE2_MUX8_MUX35 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX8_MUX35(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX8_MUX35)
+#define BP_PXP_WFE_A_STAGE2_MUX8_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX8_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX8_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX8_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX8_MUX34      16
+#define BM_PXP_WFE_A_STAGE2_MUX8_MUX34 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX8_MUX34(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX8_MUX34)
+#define BP_PXP_WFE_A_STAGE2_MUX8_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX8_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX8_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX8_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX8_MUX33      8
+#define BM_PXP_WFE_A_STAGE2_MUX8_MUX33 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX8_MUX33(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX8_MUX33)
+#define BP_PXP_WFE_A_STAGE2_MUX8_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX8_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX8_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX8_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX8_MUX32      0
+#define BM_PXP_WFE_A_STAGE2_MUX8_MUX32 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX8_MUX32(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX8_MUX32)
+
+#define HW_PXP_WFE_A_STAGE2_MUX9       (0x000017f0)
+#define HW_PXP_WFE_A_STAGE2_MUX9_SET   (0x000017f4)
+#define HW_PXP_WFE_A_STAGE2_MUX9_CLR   (0x000017f8)
+#define HW_PXP_WFE_A_STAGE2_MUX9_TOG   (0x000017fc)
+
+#define BP_PXP_WFE_A_STAGE2_MUX9_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX9_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX9_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX9_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX9_MUX39      24
+#define BM_PXP_WFE_A_STAGE2_MUX9_MUX39 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX9_MUX39(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX9_MUX39)
+#define BP_PXP_WFE_A_STAGE2_MUX9_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX9_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX9_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX9_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX9_MUX38      16
+#define BM_PXP_WFE_A_STAGE2_MUX9_MUX38 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX9_MUX38(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX9_MUX38)
+#define BP_PXP_WFE_A_STAGE2_MUX9_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX9_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX9_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX9_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX9_MUX37      8
+#define BM_PXP_WFE_A_STAGE2_MUX9_MUX37 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX9_MUX37(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX9_MUX37)
+#define BP_PXP_WFE_A_STAGE2_MUX9_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX9_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX9_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX9_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX9_MUX36      0
+#define BM_PXP_WFE_A_STAGE2_MUX9_MUX36 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX9_MUX36(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX9_MUX36)
+
+#define HW_PXP_WFE_A_STAGE2_MUX10      (0x00001800)
+#define HW_PXP_WFE_A_STAGE2_MUX10_SET  (0x00001804)
+#define HW_PXP_WFE_A_STAGE2_MUX10_CLR  (0x00001808)
+#define HW_PXP_WFE_A_STAGE2_MUX10_TOG  (0x0000180c)
+
+#define BP_PXP_WFE_A_STAGE2_MUX10_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX10_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX10_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX10_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX10_MUX43      24
+#define BM_PXP_WFE_A_STAGE2_MUX10_MUX43 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX10_MUX43(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX10_MUX43)
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__INC        0x0
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__DEC        0x1
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__ADD        0x2
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__MINUS      0x3
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__AND        0x4
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__OR         0x5
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__XOR        0x6
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__SHIFTLEFT  0x7
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__SHIFTRIGHT 0x8
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__BIT_AND    0x9
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__BIT_OR     0xa
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__BIT_CMP    0xb
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX43__NOP        0xc
+#define BP_PXP_WFE_A_STAGE2_MUX10_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX10_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX10_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX10_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX10_MUX42      16
+#define BM_PXP_WFE_A_STAGE2_MUX10_MUX42 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX10_MUX42(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX10_MUX42)
+#define BP_PXP_WFE_A_STAGE2_MUX10_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX10_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX10_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX10_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX10_MUX41      8
+#define BM_PXP_WFE_A_STAGE2_MUX10_MUX41 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX10_MUX41(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX10_MUX41)
+#define BP_PXP_WFE_A_STAGE2_MUX10_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX10_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX10_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX10_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX10_MUX40      0
+#define BM_PXP_WFE_A_STAGE2_MUX10_MUX40 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX10_MUX40(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX10_MUX40)
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__INC        0x0
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__DEC        0x1
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__ADD        0x2
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__MINUS      0x3
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__AND        0x4
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__OR         0x5
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__XOR        0x6
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__SHIFTLEFT  0x7
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__SHIFTRIGHT 0x8
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__BIT_AND    0x9
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__BIT_OR     0xa
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__BIT_CMP    0xb
+#define BV_PXP_WFE_A_STAGE2_MUX10_MUX40__NOP        0xc
+
+#define HW_PXP_WFE_A_STAGE2_MUX11      (0x00001810)
+#define HW_PXP_WFE_A_STAGE2_MUX11_SET  (0x00001814)
+#define HW_PXP_WFE_A_STAGE2_MUX11_CLR  (0x00001818)
+#define HW_PXP_WFE_A_STAGE2_MUX11_TOG  (0x0000181c)
+
+#define BP_PXP_WFE_A_STAGE2_MUX11_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_MUX11_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_MUX11_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_MUX11_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX11_MUX47      24
+#define BM_PXP_WFE_A_STAGE2_MUX11_MUX47 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_MUX11_MUX47(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_MUX11_MUX47)
+#define BP_PXP_WFE_A_STAGE2_MUX11_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_MUX11_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_MUX11_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_MUX11_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_MUX11_MUX46      16
+#define BM_PXP_WFE_A_STAGE2_MUX11_MUX46 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_MUX11_MUX46(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_MUX11_MUX46)
+#define BP_PXP_WFE_A_STAGE2_MUX11_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_MUX11_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_MUX11_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX11_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_MUX11_MUX45      8
+#define BM_PXP_WFE_A_STAGE2_MUX11_MUX45 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX11_MUX45(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX11_MUX45)
+#define BP_PXP_WFE_A_STAGE2_MUX11_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX11_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX11_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX11_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX11_MUX44      0
+#define BM_PXP_WFE_A_STAGE2_MUX11_MUX44 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX11_MUX44(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX11_MUX44)
+
+#define HW_PXP_WFE_A_STAGE2_MUX12      (0x00001820)
+#define HW_PXP_WFE_A_STAGE2_MUX12_SET  (0x00001824)
+#define HW_PXP_WFE_A_STAGE2_MUX12_CLR  (0x00001828)
+#define HW_PXP_WFE_A_STAGE2_MUX12_TOG  (0x0000182c)
+
+#define BP_PXP_WFE_A_STAGE2_MUX12_RSVD0      14
+#define BM_PXP_WFE_A_STAGE2_MUX12_RSVD0 0xFFFFC000
+#define BF_PXP_WFE_A_STAGE2_MUX12_RSVD0(v) \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_MUX12_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_MUX12_MUX49      8
+#define BM_PXP_WFE_A_STAGE2_MUX12_MUX49 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_MUX12_MUX49(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_MUX12_MUX49)
+#define BP_PXP_WFE_A_STAGE2_MUX12_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_MUX12_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_MUX12_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_MUX12_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_MUX12_MUX48      0
+#define BM_PXP_WFE_A_STAGE2_MUX12_MUX48 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_MUX12_MUX48(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_MUX12_MUX48)
+
+#define HW_PXP_WFE_A_STAGE3_MUX0       (0x00001830)
+#define HW_PXP_WFE_A_STAGE3_MUX0_SET   (0x00001834)
+#define HW_PXP_WFE_A_STAGE3_MUX0_CLR   (0x00001838)
+#define HW_PXP_WFE_A_STAGE3_MUX0_TOG   (0x0000183c)
+
+#define BP_PXP_WFE_A_STAGE3_MUX0_RSVD0      30
+#define BM_PXP_WFE_A_STAGE3_MUX0_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE3_MUX0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE3_MUX0_RSVD0)
+#define BP_PXP_WFE_A_STAGE3_MUX0_MUX3      24
+#define BM_PXP_WFE_A_STAGE3_MUX0_MUX3 0x3F000000
+#define BF_PXP_WFE_A_STAGE3_MUX0_MUX3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE3_MUX0_MUX3)
+#define BP_PXP_WFE_A_STAGE3_MUX0_RSVD1      22
+#define BM_PXP_WFE_A_STAGE3_MUX0_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE3_MUX0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE3_MUX0_RSVD1)
+#define BP_PXP_WFE_A_STAGE3_MUX0_MUX2      16
+#define BM_PXP_WFE_A_STAGE3_MUX0_MUX2 0x003F0000
+#define BF_PXP_WFE_A_STAGE3_MUX0_MUX2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE3_MUX0_MUX2)
+#define BP_PXP_WFE_A_STAGE3_MUX0_RSVD2      14
+#define BM_PXP_WFE_A_STAGE3_MUX0_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE3_MUX0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE3_MUX0_RSVD2)
+#define BP_PXP_WFE_A_STAGE3_MUX0_MUX1      8
+#define BM_PXP_WFE_A_STAGE3_MUX0_MUX1 0x00003F00
+#define BF_PXP_WFE_A_STAGE3_MUX0_MUX1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE3_MUX0_MUX1)
+#define BP_PXP_WFE_A_STAGE3_MUX0_RSVD3      6
+#define BM_PXP_WFE_A_STAGE3_MUX0_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE3_MUX0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE3_MUX0_RSVD3)
+#define BP_PXP_WFE_A_STAGE3_MUX0_MUX0      0
+#define BM_PXP_WFE_A_STAGE3_MUX0_MUX0 0x0000003F
+#define BF_PXP_WFE_A_STAGE3_MUX0_MUX0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE3_MUX0_MUX0)
+
+#define HW_PXP_WFE_A_STAGE3_MUX1       (0x00001840)
+#define HW_PXP_WFE_A_STAGE3_MUX1_SET   (0x00001844)
+#define HW_PXP_WFE_A_STAGE3_MUX1_CLR   (0x00001848)
+#define HW_PXP_WFE_A_STAGE3_MUX1_TOG   (0x0000184c)
+
+#define BP_PXP_WFE_A_STAGE3_MUX1_RSVD0      30
+#define BM_PXP_WFE_A_STAGE3_MUX1_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE3_MUX1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE3_MUX1_RSVD0)
+#define BP_PXP_WFE_A_STAGE3_MUX1_MUX7      24
+#define BM_PXP_WFE_A_STAGE3_MUX1_MUX7 0x3F000000
+#define BF_PXP_WFE_A_STAGE3_MUX1_MUX7(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE3_MUX1_MUX7)
+#define BP_PXP_WFE_A_STAGE3_MUX1_RSVD1      22
+#define BM_PXP_WFE_A_STAGE3_MUX1_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE3_MUX1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE3_MUX1_RSVD1)
+#define BP_PXP_WFE_A_STAGE3_MUX1_MUX6      16
+#define BM_PXP_WFE_A_STAGE3_MUX1_MUX6 0x003F0000
+#define BF_PXP_WFE_A_STAGE3_MUX1_MUX6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE3_MUX1_MUX6)
+#define BP_PXP_WFE_A_STAGE3_MUX1_RSVD2      14
+#define BM_PXP_WFE_A_STAGE3_MUX1_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE3_MUX1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE3_MUX1_RSVD2)
+#define BP_PXP_WFE_A_STAGE3_MUX1_MUX5      8
+#define BM_PXP_WFE_A_STAGE3_MUX1_MUX5 0x00003F00
+#define BF_PXP_WFE_A_STAGE3_MUX1_MUX5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE3_MUX1_MUX5)
+#define BP_PXP_WFE_A_STAGE3_MUX1_RSVD3      6
+#define BM_PXP_WFE_A_STAGE3_MUX1_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE3_MUX1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE3_MUX1_RSVD3)
+#define BP_PXP_WFE_A_STAGE3_MUX1_MUX4      0
+#define BM_PXP_WFE_A_STAGE3_MUX1_MUX4 0x0000003F
+#define BF_PXP_WFE_A_STAGE3_MUX1_MUX4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE3_MUX1_MUX4)
+
+#define HW_PXP_WFE_A_STAGE3_MUX2       (0x00001850)
+#define HW_PXP_WFE_A_STAGE3_MUX2_SET   (0x00001854)
+#define HW_PXP_WFE_A_STAGE3_MUX2_CLR   (0x00001858)
+#define HW_PXP_WFE_A_STAGE3_MUX2_TOG   (0x0000185c)
+
+#define BP_PXP_WFE_A_STAGE3_MUX2_RSVD0      30
+#define BM_PXP_WFE_A_STAGE3_MUX2_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE3_MUX2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE3_MUX2_RSVD0)
+#define BP_PXP_WFE_A_STAGE3_MUX2_MUX11      24
+#define BM_PXP_WFE_A_STAGE3_MUX2_MUX11 0x3F000000
+#define BF_PXP_WFE_A_STAGE3_MUX2_MUX11(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE3_MUX2_MUX11)
+#define BP_PXP_WFE_A_STAGE3_MUX2_RSVD1      22
+#define BM_PXP_WFE_A_STAGE3_MUX2_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE3_MUX2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE3_MUX2_RSVD1)
+#define BP_PXP_WFE_A_STAGE3_MUX2_MUX10      16
+#define BM_PXP_WFE_A_STAGE3_MUX2_MUX10 0x003F0000
+#define BF_PXP_WFE_A_STAGE3_MUX2_MUX10(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE3_MUX2_MUX10)
+#define BP_PXP_WFE_A_STAGE3_MUX2_RSVD2      14
+#define BM_PXP_WFE_A_STAGE3_MUX2_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE3_MUX2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE3_MUX2_RSVD2)
+#define BP_PXP_WFE_A_STAGE3_MUX2_MUX9      8
+#define BM_PXP_WFE_A_STAGE3_MUX2_MUX9 0x00003F00
+#define BF_PXP_WFE_A_STAGE3_MUX2_MUX9(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE3_MUX2_MUX9)
+#define BP_PXP_WFE_A_STAGE3_MUX2_RSVD3      6
+#define BM_PXP_WFE_A_STAGE3_MUX2_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE3_MUX2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE3_MUX2_RSVD3)
+#define BP_PXP_WFE_A_STAGE3_MUX2_MUX8      0
+#define BM_PXP_WFE_A_STAGE3_MUX2_MUX8 0x0000003F
+#define BF_PXP_WFE_A_STAGE3_MUX2_MUX8(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE3_MUX2_MUX8)
+
+#define HW_PXP_WFE_A_STAGE3_MUX3       (0x00001860)
+#define HW_PXP_WFE_A_STAGE3_MUX3_SET   (0x00001864)
+#define HW_PXP_WFE_A_STAGE3_MUX3_CLR   (0x00001868)
+#define HW_PXP_WFE_A_STAGE3_MUX3_TOG   (0x0000186c)
+
+#define BP_PXP_WFE_A_STAGE3_MUX3_RSVD0      30
+#define BM_PXP_WFE_A_STAGE3_MUX3_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE3_MUX3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE3_MUX3_RSVD0)
+#define BP_PXP_WFE_A_STAGE3_MUX3_MUX15      24
+#define BM_PXP_WFE_A_STAGE3_MUX3_MUX15 0x3F000000
+#define BF_PXP_WFE_A_STAGE3_MUX3_MUX15(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE3_MUX3_MUX15)
+#define BP_PXP_WFE_A_STAGE3_MUX3_RSVD1      22
+#define BM_PXP_WFE_A_STAGE3_MUX3_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE3_MUX3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE3_MUX3_RSVD1)
+#define BP_PXP_WFE_A_STAGE3_MUX3_MUX14      16
+#define BM_PXP_WFE_A_STAGE3_MUX3_MUX14 0x003F0000
+#define BF_PXP_WFE_A_STAGE3_MUX3_MUX14(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE3_MUX3_MUX14)
+#define BP_PXP_WFE_A_STAGE3_MUX3_RSVD2      14
+#define BM_PXP_WFE_A_STAGE3_MUX3_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE3_MUX3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE3_MUX3_RSVD2)
+#define BP_PXP_WFE_A_STAGE3_MUX3_MUX13      8
+#define BM_PXP_WFE_A_STAGE3_MUX3_MUX13 0x00003F00
+#define BF_PXP_WFE_A_STAGE3_MUX3_MUX13(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE3_MUX3_MUX13)
+#define BP_PXP_WFE_A_STAGE3_MUX3_RSVD3      6
+#define BM_PXP_WFE_A_STAGE3_MUX3_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE3_MUX3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE3_MUX3_RSVD3)
+#define BP_PXP_WFE_A_STAGE3_MUX3_MUX12      0
+#define BM_PXP_WFE_A_STAGE3_MUX3_MUX12 0x0000003F
+#define BF_PXP_WFE_A_STAGE3_MUX3_MUX12(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE3_MUX3_MUX12)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT0_0   (0x00001870)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT31)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT30)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT29)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT28)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT27)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT26)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT25)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT24)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT23)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT22)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT21)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT20)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT19)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT18)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT17)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT16)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT15)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT14)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT13)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT12)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT11)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT10)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT9)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT8)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT7)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT6)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT5)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT4)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT3)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT2)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT1)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT0_0_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT0_1   (0x00001880)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT63)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT62)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT61)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT60)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT59)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT58)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT57)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT56)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT55)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT54)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT53)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT52)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT51)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT50)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT49)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT48)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT47)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT46)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT45)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT44)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT43)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT42)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT41)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT40)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT39)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT38)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT37)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT36)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT35)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT34)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT33)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT0_1_LUTOUT32)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT0_2   (0x00001890)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT95)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT94)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT93)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT92)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT91)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT90)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT89)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT88)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT87)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT86)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT85)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT84)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT83)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT82)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT81)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT80)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT79)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT78)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT77)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT76)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT75)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT74)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT73)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT72)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT71)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT70)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT69)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT68)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT67)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT66)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT65)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT0_2_LUTOUT64)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT0_3   (0x000018a0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT127)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT126)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT125)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT124)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT123)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT122)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT121)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT120)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT119)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT118)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT117)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT116)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT115)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT114)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT113)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT112)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT111)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT110)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT109)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT108)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT107)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT106)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT105)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT104)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT103)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT102)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT101)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT100)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT99)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT98)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT97)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT0_3_LUTOUT96)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT0_4   (0x000018b0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT159)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT158)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT157)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT156)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT155)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT154)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT153)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT152)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT151)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT150)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT149)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT148)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT147)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT146)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT145)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT144)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT143)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT142)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT141)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT140)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT139)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT138)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT137)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT136)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT135)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT134)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT133)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT132)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT131)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT130)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT129)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT0_4_LUTOUT128)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT0_5   (0x000018c0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT191)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT190)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT189)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT188)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT187)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT186)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT185)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT184)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT183)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT182)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT181)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT180)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT179)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT178)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT177)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT176)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT175)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT174)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT173)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT172)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT171)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT170)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT169)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT168)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT167)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT166)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT165)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT164)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT163)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT162)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT161)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT0_5_LUTOUT160)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT0_6   (0x000018d0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT223)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT222)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT221)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT220)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT219)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT218)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT217)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT216)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT215)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT214)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT213)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT212)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT211)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT210)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT209)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT208)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT207)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT206)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT205)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT204)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT203)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT202)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT201)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT200)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT199)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT198)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT197)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT196)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT195)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT194)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT193)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT0_6_LUTOUT192)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT0_7   (0x000018e0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT255)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT254)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT253)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT252)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT251)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT250)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT249)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT248)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT247)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT246)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT245)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT244)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT243)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT242)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT241)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT240)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT239)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT238)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT237)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT236)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT235)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT234)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT233)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT232)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT231)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT230)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT229)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT228)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT227)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT226)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT225)
+#define BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT0_7_LUTOUT224)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT1_0   (0x000018f0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT31)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT30)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT29)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT28)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT27)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT26)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT25)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT24)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT23)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT22)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT21)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT20)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT19)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT18)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT17)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT16)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT15)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT14)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT13)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT12)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT11)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT10)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT9)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT8)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT7)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT6)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT5)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT4)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT3)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT2)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT1)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT1_0_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT1_1   (0x00001900)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT63)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT62)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT61)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT60)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT59)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT58)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT57)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT56)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT55)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT54)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT53)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT52)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT51)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT50)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT49)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT48)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT47)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT46)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT45)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT44)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT43)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT42)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT41)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT40)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT39)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT38)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT37)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT36)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT35)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT34)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT33)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT1_1_LUTOUT32)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT1_2   (0x00001910)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT95)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT94)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT93)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT92)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT91)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT90)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT89)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT88)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT87)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT86)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT85)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT84)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT83)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT82)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT81)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT80)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT79)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT78)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT77)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT76)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT75)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT74)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT73)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT72)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT71)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT70)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT69)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT68)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT67)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT66)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT65)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT1_2_LUTOUT64)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT1_3   (0x00001920)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT127)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT126)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT125)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT124)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT123)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT122)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT121)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT120)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT119)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT118)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT117)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT116)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT115)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT114)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT113)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT112)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT111)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT110)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT109)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT108)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT107)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT106)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT105)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT104)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT103)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT102)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT101)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT100)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT99)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT98)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT97)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT1_3_LUTOUT96)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT1_4   (0x00001930)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT159)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT158)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT157)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT156)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT155)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT154)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT153)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT152)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT151)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT150)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT149)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT148)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT147)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT146)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT145)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT144)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT143)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT142)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT141)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT140)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT139)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT138)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT137)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT136)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT135)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT134)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT133)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT132)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT131)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT130)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT129)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT1_4_LUTOUT128)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT1_5   (0x00001940)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT191)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT190)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT189)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT188)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT187)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT186)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT185)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT184)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT183)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT182)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT181)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT180)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT179)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT178)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT177)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT176)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT175)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT174)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT173)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT172)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT171)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT170)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT169)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT168)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT167)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT166)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT165)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT164)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT163)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT162)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT161)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT1_5_LUTOUT160)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT1_6   (0x00001950)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT223)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT222)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT221)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT220)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT219)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT218)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT217)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT216)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT215)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT214)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT213)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT212)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT211)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT210)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT209)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT208)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT207)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT206)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT205)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT204)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT203)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT202)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT201)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT200)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT199)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT198)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT197)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT196)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT195)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT194)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT193)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT1_6_LUTOUT192)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT1_7   (0x00001960)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT255)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT254)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT253)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT252)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT251)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT250)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT249)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT248)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT247)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT246)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT245)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT244)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT243)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT242)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT241)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT240)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT239)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT238)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT237)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT236)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT235)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT234)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT233)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT232)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT231)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT230)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT229)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT228)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT227)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT226)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT225)
+#define BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT1_7_LUTOUT224)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT2_0   (0x00001970)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT31)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT30)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT29)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT28)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT27)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT26)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT25)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT24)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT23)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT22)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT21)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT20)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT19)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT18)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT17)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT16)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT15)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT14)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT13)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT12)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT11)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT10)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT9)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT8)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT7)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT6)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT5)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT4)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT3)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT2)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT1)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT2_0_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT2_1   (0x00001980)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT63)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT62)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT61)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT60)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT59)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT58)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT57)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT56)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT55)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT54)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT53)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT52)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT51)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT50)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT49)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT48)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT47)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT46)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT45)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT44)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT43)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT42)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT41)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT40)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT39)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT38)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT37)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT36)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT35)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT34)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT33)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT2_1_LUTOUT32)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT2_2   (0x00001990)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT95)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT94)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT93)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT92)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT91)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT90)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT89)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT88)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT87)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT86)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT85)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT84)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT83)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT82)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT81)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT80)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT79)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT78)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT77)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT76)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT75)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT74)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT73)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT72)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT71)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT70)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT69)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT68)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT67)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT66)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT65)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT2_2_LUTOUT64)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT2_3   (0x000019a0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT127)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT126)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT125)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT124)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT123)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT122)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT121)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT120)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT119)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT118)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT117)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT116)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT115)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT114)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT113)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT112)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT111)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT110)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT109)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT108)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT107)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT106)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT105)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT104)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT103)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT102)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT101)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT100)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT99)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT98)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT97)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT2_3_LUTOUT96)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT2_4   (0x000019b0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT159)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT158)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT157)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT156)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT155)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT154)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT153)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT152)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT151)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT150)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT149)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT148)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT147)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT146)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT145)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT144)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT143)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT142)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT141)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT140)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT139)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT138)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT137)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT136)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT135)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT134)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT133)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT132)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT131)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT130)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT129)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT2_4_LUTOUT128)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT2_5   (0x000019c0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT191)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT190)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT189)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT188)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT187)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT186)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT185)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT184)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT183)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT182)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT181)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT180)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT179)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT178)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT177)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT176)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT175)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT174)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT173)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT172)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT171)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT170)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT169)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT168)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT167)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT166)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT165)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT164)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT163)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT162)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT161)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT2_5_LUTOUT160)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT2_6   (0x000019d0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT223)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT222)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT221)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT220)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT219)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT218)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT217)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT216)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT215)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT214)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT213)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT212)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT211)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT210)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT209)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT208)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT207)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT206)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT205)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT204)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT203)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT202)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT201)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT200)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT199)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT198)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT197)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT196)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT195)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT194)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT193)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT2_6_LUTOUT192)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT2_7   (0x000019e0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT255)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT254)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT253)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT252)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT251)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT250)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT249)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT248)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT247)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT246)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT245)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT244)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT243)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT242)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT241)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT240)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT239)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT238)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT237)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT236)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT235)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT234)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT233)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT232)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT231)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT230)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT229)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT228)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT227)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT226)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT225)
+#define BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT2_7_LUTOUT224)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT3_0   (0x000019f0)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT31)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT30)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT29)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT28)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT27)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT26)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT25)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT24)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT23)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT22)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT21)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT20)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT19)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT18)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT17)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT16)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT15)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT14)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT13)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT12)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT11)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT10)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT9)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT8)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT7)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT6)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT5)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT4)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT3)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT2)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT1)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT3_0_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT3_1   (0x00001a00)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT63)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT62)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT61)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT60)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT59)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT58)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT57)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT56)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT55)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT54)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT53)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT52)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT51)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT50)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT49)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT48)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT47)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT46)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT45)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT44)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT43)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT42)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT41)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT40)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT39)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT38)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT37)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT36)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT35)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT34)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT33)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT3_1_LUTOUT32)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT3_2   (0x00001a10)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT95)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT94)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT93)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT92)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT91)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT90)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT89)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT88)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT87)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT86)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT85)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT84)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT83)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT82)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT81)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT80)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT79)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT78)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT77)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT76)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT75)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT74)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT73)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT72)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT71)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT70)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT69)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT68)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT67)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT66)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT65)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT3_2_LUTOUT64)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT3_3   (0x00001a20)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT127)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT126)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT125)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT124)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT123)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT122)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT121)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT120)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT119)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT118)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT117)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT116)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT115)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT114)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT113)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT112)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT111)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT110)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT109)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT108)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT107)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT106)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT105)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT104)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT103)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT102)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT101)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT100)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT99)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT98)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT97)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT3_3_LUTOUT96)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT3_4   (0x00001a30)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT159)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT158)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT157)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT156)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT155)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT154)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT153)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT152)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT151)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT150)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT149)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT148)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT147)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT146)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT145)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT144)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT143)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT142)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT141)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT140)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT139)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT138)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT137)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT136)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT135)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT134)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT133)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT132)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT131)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT130)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT129)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT3_4_LUTOUT128)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT3_5   (0x00001a40)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT191)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT190)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT189)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT188)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT187)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT186)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT185)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT184)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT183)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT182)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT181)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT180)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT179)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT178)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT177)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT176)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT175)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT174)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT173)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT172)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT171)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT170)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT169)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT168)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT167)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT166)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT165)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT164)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT163)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT162)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT161)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT3_5_LUTOUT160)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT3_6   (0x00001a50)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT223)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT222)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT221)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT220)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT219)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT218)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT217)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT216)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT215)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT214)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT213)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT212)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT211)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT210)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT209)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT208)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT207)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT206)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT205)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT204)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT203)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT202)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT201)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT200)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT199)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT198)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT197)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT196)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT195)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT194)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT193)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT3_6_LUTOUT192)
+
+#define HW_PXP_WFE_A_STG1_8X1_OUT3_7   (0x00001a60)
+
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT255)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT254)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT253)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT252)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT251)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT250)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT249)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT248)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT247)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT246)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT245)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT244)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT243)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT242)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT241)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT240)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT239)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT238)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT237)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT236)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT235)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT234)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT233)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT232)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT231)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT230)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT229)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT228)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT227)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT226)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT225)
+#define BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG1_8X1_OUT3_7_LUTOUT224)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT0_0   (0x00001a70)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT3      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT3 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT2      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT2 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT1      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT1 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT0_0_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT0      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT0 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT0_0_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT0_1   (0x00001a80)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT7      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT7 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT7(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT7)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT6      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT6 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT6)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT5      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT5 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT5)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT0_1_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT4      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT4 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT0_1_LUTOUT4)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT0_2   (0x00001a90)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT11      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT11 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT11(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT11)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT10      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT10 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT10)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT9      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT9 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT9)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT0_2_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT8      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT8 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT0_2_LUTOUT8)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT0_3   (0x00001aa0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT15      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT15 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT15(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT15)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT14      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT14 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT14)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT13      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT13 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT13)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT0_3_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT12      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT12 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT0_3_LUTOUT12)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT0_4   (0x00001ab0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT19      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT19 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT19(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT19)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT18      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT18 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT18)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT17      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT17 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT17)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT0_4_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT16      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT16 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT0_4_LUTOUT16)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT0_5   (0x00001ac0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT23      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT23 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT23(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT23)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT22      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT22 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT22)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT21      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT21 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT21)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT0_5_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT20      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT20 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT0_5_LUTOUT20)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT0_6   (0x00001ad0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT27      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT27 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT27(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT27)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT26      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT26 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT26)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT25      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT25 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT25)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT0_6_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT24      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT24 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT0_6_LUTOUT24)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT0_7   (0x00001ae0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT31      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT31 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT31(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT31)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT30      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT30 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT30)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT29      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT29 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT29)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT0_7_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT28      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT28 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT0_7_LUTOUT28)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT1_0   (0x00001af0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT3      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT3 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT2      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT2 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT1      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT1 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT1_0_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT0      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT0 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT1_0_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT1_1   (0x00001b00)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT7      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT7 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT7(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT7)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT6      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT6 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT6)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT5      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT5 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT5)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT1_1_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT4      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT4 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT1_1_LUTOUT4)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT1_2   (0x00001b10)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT11      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT11 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT11(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT11)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT10      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT10 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT10)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT9      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT9 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT9)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT1_2_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT8      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT8 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT1_2_LUTOUT8)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT1_3   (0x00001b20)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT15      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT15 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT15(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT15)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT14      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT14 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT14)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT13      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT13 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT13)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT1_3_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT12      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT12 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT1_3_LUTOUT12)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT1_4   (0x00001b30)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT19      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT19 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT19(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT19)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT18      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT18 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT18)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT17      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT17 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT17)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT1_4_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT16      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT16 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT1_4_LUTOUT16)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT1_5   (0x00001b40)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT23      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT23 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT23(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT23)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT22      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT22 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT22)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT21      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT21 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT21)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT1_5_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT20      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT20 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT1_5_LUTOUT20)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT1_6   (0x00001b50)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT27      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT27 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT27(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT27)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT26      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT26 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT26)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT25      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT25 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT25)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT1_6_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT24      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT24 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT1_6_LUTOUT24)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT1_7   (0x00001b60)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT31      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT31 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT31(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT31)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT30      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT30 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT30)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT29      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT29 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT29)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT1_7_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT28      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT28 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT1_7_LUTOUT28)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT2_0   (0x00001b70)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT3      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT3 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT2      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT2 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT1      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT1 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT2_0_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT0      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT0 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT2_0_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT2_1   (0x00001b80)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT7      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT7 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT7(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT7)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT6      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT6 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT6)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT5      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT5 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT5)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT2_1_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT4      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT4 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT2_1_LUTOUT4)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT2_2   (0x00001b90)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT11      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT11 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT11(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT11)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT10      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT10 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT10)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT9      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT9 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT9)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT2_2_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT8      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT8 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT2_2_LUTOUT8)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT2_3   (0x00001ba0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT15      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT15 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT15(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT15)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT14      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT14 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT14)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT13      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT13 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT13)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT2_3_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT12      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT12 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT2_3_LUTOUT12)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT2_4   (0x00001bb0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT19      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT19 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT19(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT19)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT18      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT18 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT18)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT17      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT17 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT17)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT2_4_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT16      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT16 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT2_4_LUTOUT16)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT2_5   (0x00001bc0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT23      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT23 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT23(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT23)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT22      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT22 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT22)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT21      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT21 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT21)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT2_5_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT20      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT20 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT2_5_LUTOUT20)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT2_6   (0x00001bd0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT27      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT27 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT27(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT27)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT26      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT26 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT26)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT25      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT25 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT25)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT2_6_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT24      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT24 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT2_6_LUTOUT24)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT2_7   (0x00001be0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT31      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT31 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT31(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT31)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT30      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT30 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT30)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT29      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT29 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT29)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT2_7_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT28      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT28 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT2_7_LUTOUT28)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT3_0   (0x00001bf0)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT3      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT3 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT2      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT2 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT1      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT1 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT3_0_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT0      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT0 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT3_0_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT3_1   (0x00001c00)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT7      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT7 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT7(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT7)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT6      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT6 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT6)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT5      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT5 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT5)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT3_1_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT4      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT4 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT3_1_LUTOUT4)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT3_2   (0x00001c10)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT11      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT11 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT11(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT11)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT10      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT10 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT10)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT9      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT9 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT9)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT3_2_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT8      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT8 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT3_2_LUTOUT8)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT3_3   (0x00001c20)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT15      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT15 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT15(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT15)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT14      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT14 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT14)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT13      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT13 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT13)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT3_3_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT12      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT12 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT3_3_LUTOUT12)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT3_4   (0x00001c30)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT19      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT19 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT19(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT19)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT18      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT18 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT18)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT17      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT17 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT17)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT3_4_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT16      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT16 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT3_4_LUTOUT16)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT3_5   (0x00001c40)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT23      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT23 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT23(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT23)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT22      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT22 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT22)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT21      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT21 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT21)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT3_5_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT20      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT20 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT3_5_LUTOUT20)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT3_6   (0x00001c50)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT27      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT27 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT27(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT27)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT26      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT26 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT26)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT25      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT25 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT25)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT3_6_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT24      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT24 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT3_6_LUTOUT24)
+
+#define HW_PXP_WFE_A_STG2_5X6_OUT3_7   (0x00001c60)
+
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD0      30
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT31      24
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT31 0x3F000000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT31(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT31)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD1      22
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT30      16
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT30 0x003F0000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT30)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD2      14
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT29      8
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT29 0x00003F00
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT29)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD3      6
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X6_OUT3_7_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT28      0
+#define BM_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT28 0x0000003F
+#define BF_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X6_OUT3_7_LUTOUT28)
+
+#define HW_PXP_WFE_A_STAGE2_5X6_MASKS_0        (0x00001c70)
+
+#define BP_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD0      29
+#define BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD0 0xE0000000
+#define BF_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD0(v) \
+        (((v) << 29) & BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK3      24
+#define BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK3 0x1F000000
+#define BF_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK3)
+#define BP_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD1      21
+#define BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD1 0x00E00000
+#define BF_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD1(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK2      16
+#define BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK2 0x001F0000
+#define BF_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK2)
+#define BP_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD2      13
+#define BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD2 0x0000E000
+#define BF_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD2(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK1      8
+#define BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK1 0x00001F00
+#define BF_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK1)
+#define BP_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD3      5
+#define BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD3 0x000000E0
+#define BF_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD3(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK0      0
+#define BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK0 0x0000001F
+#define BF_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_5X6_MASKS_0_MASK0)
+
+#define HW_PXP_WFE_A_STAGE2_5X6_ADDR_0 (0x00001c80)
+
+#define BP_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD0      30
+#define BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD0 0xC0000000
+#define BF_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD0)
+#define BP_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR3      24
+#define BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR3 0x3F000000
+#define BF_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR3)
+#define BP_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD1      22
+#define BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD1 0x00C00000
+#define BF_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD1)
+#define BP_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR2      16
+#define BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR2 0x003F0000
+#define BF_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR2)
+#define BP_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD2      14
+#define BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD2 0x0000C000
+#define BF_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD2)
+#define BP_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR1      8
+#define BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR1 0x00003F00
+#define BF_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR1)
+#define BP_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD3      6
+#define BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD3 0x000000C0
+#define BF_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_RSVD3)
+#define BP_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR0      0
+#define BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR0 0x0000003F
+#define BF_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STAGE2_5X6_ADDR_0_MUXADDR0)
+
+#define HW_PXP_WFE_A_STG2_5X1_OUT0     (0x00001c90)
+
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT31)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT30)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT29)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT28)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT27)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT26)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT25)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT24)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT23)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT22)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT21)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT20)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT19)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT18)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT17)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT16)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT15)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT14)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT13)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT12)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT11)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT10)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT9)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT8)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT7)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT6)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT5)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT4)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT3)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT2)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT1)
+#define BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X1_OUT0_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG2_5X1_OUT1     (0x00001ca0)
+
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT31 0x80000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT31)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT30 0x40000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT30)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT29 0x20000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT29)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT28 0x10000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT28)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT27 0x08000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT27)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT26 0x04000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT26)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT25 0x02000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT25)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT24 0x01000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT24)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT23 0x00800000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT23)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT22 0x00400000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT22)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT21 0x00200000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT21)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT20 0x00100000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT20)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT19 0x00080000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT19)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT18 0x00040000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT18)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT17 0x00020000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT17)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT16 0x00010000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT16)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT15 0x00008000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT15)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT14 0x00004000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT14)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT13 0x00002000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT13)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT12 0x00001000
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT12)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT11 0x00000800
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT11)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT10 0x00000400
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT10)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT9 0x00000200
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT9)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT8 0x00000100
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT8)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT7 0x00000080
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT7)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT6 0x00000040
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT6)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT5 0x00000020
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT5)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT4 0x00000010
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT4)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT3 0x00000008
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT3)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT2 0x00000004
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT2)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT1 0x00000002
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT1)
+#define BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT0 0x00000001
+#define BF_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X1_OUT1_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG2_5X1_OUT2     (0x00001cb0)
+
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT31 0x80000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT31)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT30 0x40000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT30)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT29 0x20000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT29)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT28 0x10000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT28)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT27 0x08000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT27)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT26 0x04000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT26)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT25 0x02000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT25)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT24 0x01000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT24)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT23 0x00800000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT23)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT22 0x00400000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT22)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT21 0x00200000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT21)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT20 0x00100000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT20)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT19 0x00080000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT19)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT18 0x00040000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT18)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT17 0x00020000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT17)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT16 0x00010000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT16)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT15 0x00008000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT15)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT14 0x00004000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT14)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT13 0x00002000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT13)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT12 0x00001000
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT12)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT11 0x00000800
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT11)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT10 0x00000400
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT10)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT9 0x00000200
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT9)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT8 0x00000100
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT8)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT7 0x00000080
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT7)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT6 0x00000040
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT6)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT5 0x00000020
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT5)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT4 0x00000010
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT4)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT3 0x00000008
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT3)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT2 0x00000004
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT2)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT1 0x00000002
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT1)
+#define BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT0 0x00000001
+#define BF_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X1_OUT2_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG2_5X1_OUT3     (0x00001cc0)
+
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT31 0x80000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT31)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT30 0x40000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT30)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT29 0x20000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT29)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT28 0x10000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT28)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT27 0x08000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT27)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT26 0x04000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT26)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT25 0x02000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT25)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT24 0x01000000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT24)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT23 0x00800000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT23)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT22 0x00400000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT22)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT21 0x00200000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT21)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT20 0x00100000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT20)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT19 0x00080000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT19)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT18 0x00040000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT18)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT17 0x00020000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT17)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT16 0x00010000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT16)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT15 0x00008000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT15)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT14 0x00004000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT14)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT13 0x00002000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT13)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT12 0x00001000
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT12)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT11 0x00000800
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT11)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT10 0x00000400
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT10)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT9 0x00000200
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT9)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT8 0x00000100
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT8)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT7 0x00000080
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT7)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT6 0x00000040
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT6)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT5 0x00000020
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT5)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT4 0x00000010
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT4)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT3 0x00000008
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT3)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT2 0x00000004
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT2)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT1 0x00000002
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT1)
+#define BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT0 0x00000001
+#define BF_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X1_OUT3_LUTOUT0)
+
+#define HW_PXP_WFE_A_STG2_5X1_MASKS    (0x00001cd0)
+
+#define BP_PXP_WFE_A_STG2_5X1_MASKS_RSVD3      29
+#define BM_PXP_WFE_A_STG2_5X1_MASKS_RSVD3 0xE0000000
+#define BF_PXP_WFE_A_STG2_5X1_MASKS_RSVD3(v) \
+        (((v) << 29) & BM_PXP_WFE_A_STG2_5X1_MASKS_RSVD3)
+#define BP_PXP_WFE_A_STG2_5X1_MASKS_MASK3      24
+#define BM_PXP_WFE_A_STG2_5X1_MASKS_MASK3 0x1F000000
+#define BF_PXP_WFE_A_STG2_5X1_MASKS_MASK3(v)  \
+        (((v) << 24) & BM_PXP_WFE_A_STG2_5X1_MASKS_MASK3)
+#define BP_PXP_WFE_A_STG2_5X1_MASKS_RSVD2      21
+#define BM_PXP_WFE_A_STG2_5X1_MASKS_RSVD2 0x00E00000
+#define BF_PXP_WFE_A_STG2_5X1_MASKS_RSVD2(v)  \
+        (((v) << 21) & BM_PXP_WFE_A_STG2_5X1_MASKS_RSVD2)
+#define BP_PXP_WFE_A_STG2_5X1_MASKS_MASK2      16
+#define BM_PXP_WFE_A_STG2_5X1_MASKS_MASK2 0x001F0000
+#define BF_PXP_WFE_A_STG2_5X1_MASKS_MASK2(v)  \
+        (((v) << 16) & BM_PXP_WFE_A_STG2_5X1_MASKS_MASK2)
+#define BP_PXP_WFE_A_STG2_5X1_MASKS_RSVD1      13
+#define BM_PXP_WFE_A_STG2_5X1_MASKS_RSVD1 0x0000E000
+#define BF_PXP_WFE_A_STG2_5X1_MASKS_RSVD1(v)  \
+        (((v) << 13) & BM_PXP_WFE_A_STG2_5X1_MASKS_RSVD1)
+#define BP_PXP_WFE_A_STG2_5X1_MASKS_MASK1      8
+#define BM_PXP_WFE_A_STG2_5X1_MASKS_MASK1 0x00001F00
+#define BF_PXP_WFE_A_STG2_5X1_MASKS_MASK1(v)  \
+        (((v) << 8) & BM_PXP_WFE_A_STG2_5X1_MASKS_MASK1)
+#define BP_PXP_WFE_A_STG2_5X1_MASKS_RSVD0      5
+#define BM_PXP_WFE_A_STG2_5X1_MASKS_RSVD0 0x000000E0
+#define BF_PXP_WFE_A_STG2_5X1_MASKS_RSVD0(v)  \
+        (((v) << 5) & BM_PXP_WFE_A_STG2_5X1_MASKS_RSVD0)
+#define BP_PXP_WFE_A_STG2_5X1_MASKS_MASK0      0
+#define BM_PXP_WFE_A_STG2_5X1_MASKS_MASK0 0x0000001F
+#define BF_PXP_WFE_A_STG2_5X1_MASKS_MASK0(v)  \
+        (((v) << 0) & BM_PXP_WFE_A_STG2_5X1_MASKS_MASK0)
+
+#define HW_PXP_WFE_B_CTRL      (0x00001d00)
+#define HW_PXP_WFE_B_CTRL_SET  (0x00001d04)
+#define HW_PXP_WFE_B_CTRL_CLR  (0x00001d08)
+#define HW_PXP_WFE_B_CTRL_TOG  (0x00001d0c)
+
+#define BM_PXP_WFE_B_CTRL_DONE 0x80000000
+#define BF_PXP_WFE_B_CTRL_DONE(v) \
+        (((v) << 31) & BM_PXP_WFE_B_CTRL_DONE)
+#define BP_PXP_WFE_B_CTRL_RSVD0      3
+#define BM_PXP_WFE_B_CTRL_RSVD0 0x7FFFFFF8
+#define BF_PXP_WFE_B_CTRL_RSVD0(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_CTRL_RSVD0)
+#define BM_PXP_WFE_B_CTRL_SW_RESET 0x00000004
+#define BF_PXP_WFE_B_CTRL_SW_RESET(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_CTRL_SW_RESET)
+#define BM_PXP_WFE_B_CTRL_RSVD1 0x00000002
+#define BF_PXP_WFE_B_CTRL_RSVD1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_CTRL_RSVD1)
+#define BM_PXP_WFE_B_CTRL_ENABLE 0x00000001
+#define BF_PXP_WFE_B_CTRL_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_CTRL_ENABLE)
+#define BV_PXP_WFE_B_CTRL_ENABLE__0 0x0
+#define BV_PXP_WFE_B_CTRL_ENABLE__1 0x1
+
+#define HW_PXP_WFE_B_DIMENSIONS        (0x00001d10)
+
+#define BP_PXP_WFE_B_DIMENSIONS_RSVD0      28
+#define BM_PXP_WFE_B_DIMENSIONS_RSVD0 0xF0000000
+#define BF_PXP_WFE_B_DIMENSIONS_RSVD0(v) \
+        (((v) << 28) & BM_PXP_WFE_B_DIMENSIONS_RSVD0)
+#define BP_PXP_WFE_B_DIMENSIONS_HEIGHT      16
+#define BM_PXP_WFE_B_DIMENSIONS_HEIGHT 0x0FFF0000
+#define BF_PXP_WFE_B_DIMENSIONS_HEIGHT(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_DIMENSIONS_HEIGHT)
+#define BP_PXP_WFE_B_DIMENSIONS_RSVD1      12
+#define BM_PXP_WFE_B_DIMENSIONS_RSVD1 0x0000F000
+#define BF_PXP_WFE_B_DIMENSIONS_RSVD1(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_DIMENSIONS_RSVD1)
+#define BP_PXP_WFE_B_DIMENSIONS_WIDTH      0
+#define BM_PXP_WFE_B_DIMENSIONS_WIDTH 0x00000FFF
+#define BF_PXP_WFE_B_DIMENSIONS_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_DIMENSIONS_WIDTH)
+
+#define HW_PXP_WFE_B_OFFSET    (0x00001d20)
+
+#define BP_PXP_WFE_B_OFFSET_RSVD0      28
+#define BM_PXP_WFE_B_OFFSET_RSVD0 0xF0000000
+#define BF_PXP_WFE_B_OFFSET_RSVD0(v) \
+        (((v) << 28) & BM_PXP_WFE_B_OFFSET_RSVD0)
+#define BP_PXP_WFE_B_OFFSET_Y_OFFSET      16
+#define BM_PXP_WFE_B_OFFSET_Y_OFFSET 0x0FFF0000
+#define BF_PXP_WFE_B_OFFSET_Y_OFFSET(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_OFFSET_Y_OFFSET)
+#define BP_PXP_WFE_B_OFFSET_RSVD1      12
+#define BM_PXP_WFE_B_OFFSET_RSVD1 0x0000F000
+#define BF_PXP_WFE_B_OFFSET_RSVD1(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_OFFSET_RSVD1)
+#define BP_PXP_WFE_B_OFFSET_X_OFFSET      0
+#define BM_PXP_WFE_B_OFFSET_X_OFFSET 0x00000FFF
+#define BF_PXP_WFE_B_OFFSET_X_OFFSET(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_OFFSET_X_OFFSET)
+
+#define HW_PXP_WFE_B_SW_DATA_REGS      (0x00001d30)
+
+#define BP_PXP_WFE_B_SW_DATA_REGS_VAL3      24
+#define BM_PXP_WFE_B_SW_DATA_REGS_VAL3 0xFF000000
+#define BF_PXP_WFE_B_SW_DATA_REGS_VAL3(v) \
+        (((v) << 24) & BM_PXP_WFE_B_SW_DATA_REGS_VAL3)
+#define BP_PXP_WFE_B_SW_DATA_REGS_VAL2      16
+#define BM_PXP_WFE_B_SW_DATA_REGS_VAL2 0x00FF0000
+#define BF_PXP_WFE_B_SW_DATA_REGS_VAL2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_SW_DATA_REGS_VAL2)
+#define BP_PXP_WFE_B_SW_DATA_REGS_VAL1      8
+#define BM_PXP_WFE_B_SW_DATA_REGS_VAL1 0x0000FF00
+#define BF_PXP_WFE_B_SW_DATA_REGS_VAL1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_SW_DATA_REGS_VAL1)
+#define BP_PXP_WFE_B_SW_DATA_REGS_VAL0      0
+#define BM_PXP_WFE_B_SW_DATA_REGS_VAL0 0x000000FF
+#define BF_PXP_WFE_B_SW_DATA_REGS_VAL0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_SW_DATA_REGS_VAL0)
+
+#define HW_PXP_WFE_B_SW_FLAG_REGS      (0x00001d40)
+
+#define BP_PXP_WFE_B_SW_FLAG_REGS_RSVD      4
+#define BM_PXP_WFE_B_SW_FLAG_REGS_RSVD 0xFFFFFFF0
+#define BF_PXP_WFE_B_SW_FLAG_REGS_RSVD(v) \
+        (((v) << 4) & BM_PXP_WFE_B_SW_FLAG_REGS_RSVD)
+#define BM_PXP_WFE_B_SW_FLAG_REGS_VAL3 0x00000008
+#define BF_PXP_WFE_B_SW_FLAG_REGS_VAL3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_SW_FLAG_REGS_VAL3)
+#define BM_PXP_WFE_B_SW_FLAG_REGS_VAL2 0x00000004
+#define BF_PXP_WFE_B_SW_FLAG_REGS_VAL2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_SW_FLAG_REGS_VAL2)
+#define BM_PXP_WFE_B_SW_FLAG_REGS_VAL1 0x00000002
+#define BF_PXP_WFE_B_SW_FLAG_REGS_VAL1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_SW_FLAG_REGS_VAL1)
+#define BM_PXP_WFE_B_SW_FLAG_REGS_VAL0 0x00000001
+#define BF_PXP_WFE_B_SW_FLAG_REGS_VAL0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_SW_FLAG_REGS_VAL0)
+
+#define HW_PXP_WFE_B_STAGE1_MUX0       (0x00001d50)
+#define HW_PXP_WFE_B_STAGE1_MUX0_SET   (0x00001d54)
+#define HW_PXP_WFE_B_STAGE1_MUX0_CLR   (0x00001d58)
+#define HW_PXP_WFE_B_STAGE1_MUX0_TOG   (0x00001d5c)
+
+#define BP_PXP_WFE_B_STAGE1_MUX0_RSVD0      30
+#define BM_PXP_WFE_B_STAGE1_MUX0_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE1_MUX0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE1_MUX0_RSVD0)
+#define BP_PXP_WFE_B_STAGE1_MUX0_MUX3      24
+#define BM_PXP_WFE_B_STAGE1_MUX0_MUX3 0x3F000000
+#define BF_PXP_WFE_B_STAGE1_MUX0_MUX3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE1_MUX0_MUX3)
+#define BP_PXP_WFE_B_STAGE1_MUX0_RSVD1      22
+#define BM_PXP_WFE_B_STAGE1_MUX0_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE1_MUX0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE1_MUX0_RSVD1)
+#define BP_PXP_WFE_B_STAGE1_MUX0_MUX2      16
+#define BM_PXP_WFE_B_STAGE1_MUX0_MUX2 0x003F0000
+#define BF_PXP_WFE_B_STAGE1_MUX0_MUX2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE1_MUX0_MUX2)
+#define BP_PXP_WFE_B_STAGE1_MUX0_RSVD2      14
+#define BM_PXP_WFE_B_STAGE1_MUX0_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE1_MUX0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE1_MUX0_RSVD2)
+#define BP_PXP_WFE_B_STAGE1_MUX0_MUX1      8
+#define BM_PXP_WFE_B_STAGE1_MUX0_MUX1 0x00003F00
+#define BF_PXP_WFE_B_STAGE1_MUX0_MUX1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE1_MUX0_MUX1)
+#define BP_PXP_WFE_B_STAGE1_MUX0_RSVD3      6
+#define BM_PXP_WFE_B_STAGE1_MUX0_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE1_MUX0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE1_MUX0_RSVD3)
+#define BP_PXP_WFE_B_STAGE1_MUX0_MUX0      0
+#define BM_PXP_WFE_B_STAGE1_MUX0_MUX0 0x0000003F
+#define BF_PXP_WFE_B_STAGE1_MUX0_MUX0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_MUX0_MUX0)
+
+#define HW_PXP_WFE_B_STAGE1_MUX1       (0x00001d60)
+#define HW_PXP_WFE_B_STAGE1_MUX1_SET   (0x00001d64)
+#define HW_PXP_WFE_B_STAGE1_MUX1_CLR   (0x00001d68)
+#define HW_PXP_WFE_B_STAGE1_MUX1_TOG   (0x00001d6c)
+
+#define BP_PXP_WFE_B_STAGE1_MUX1_RSVD0      30
+#define BM_PXP_WFE_B_STAGE1_MUX1_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE1_MUX1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE1_MUX1_RSVD0)
+#define BP_PXP_WFE_B_STAGE1_MUX1_MUX7      24
+#define BM_PXP_WFE_B_STAGE1_MUX1_MUX7 0x3F000000
+#define BF_PXP_WFE_B_STAGE1_MUX1_MUX7(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE1_MUX1_MUX7)
+#define BP_PXP_WFE_B_STAGE1_MUX1_RSVD1      22
+#define BM_PXP_WFE_B_STAGE1_MUX1_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE1_MUX1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE1_MUX1_RSVD1)
+#define BP_PXP_WFE_B_STAGE1_MUX1_MUX6      16
+#define BM_PXP_WFE_B_STAGE1_MUX1_MUX6 0x003F0000
+#define BF_PXP_WFE_B_STAGE1_MUX1_MUX6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE1_MUX1_MUX6)
+#define BP_PXP_WFE_B_STAGE1_MUX1_RSVD2      14
+#define BM_PXP_WFE_B_STAGE1_MUX1_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE1_MUX1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE1_MUX1_RSVD2)
+#define BP_PXP_WFE_B_STAGE1_MUX1_MUX5      8
+#define BM_PXP_WFE_B_STAGE1_MUX1_MUX5 0x00003F00
+#define BF_PXP_WFE_B_STAGE1_MUX1_MUX5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE1_MUX1_MUX5)
+#define BP_PXP_WFE_B_STAGE1_MUX1_RSVD3      6
+#define BM_PXP_WFE_B_STAGE1_MUX1_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE1_MUX1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE1_MUX1_RSVD3)
+#define BP_PXP_WFE_B_STAGE1_MUX1_MUX4      0
+#define BM_PXP_WFE_B_STAGE1_MUX1_MUX4 0x0000003F
+#define BF_PXP_WFE_B_STAGE1_MUX1_MUX4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_MUX1_MUX4)
+
+#define HW_PXP_WFE_B_STAGE1_MUX2       (0x00001d70)
+#define HW_PXP_WFE_B_STAGE1_MUX2_SET   (0x00001d74)
+#define HW_PXP_WFE_B_STAGE1_MUX2_CLR   (0x00001d78)
+#define HW_PXP_WFE_B_STAGE1_MUX2_TOG   (0x00001d7c)
+
+#define BP_PXP_WFE_B_STAGE1_MUX2_RSVD0      30
+#define BM_PXP_WFE_B_STAGE1_MUX2_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE1_MUX2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE1_MUX2_RSVD0)
+#define BP_PXP_WFE_B_STAGE1_MUX2_MUX11      24
+#define BM_PXP_WFE_B_STAGE1_MUX2_MUX11 0x3F000000
+#define BF_PXP_WFE_B_STAGE1_MUX2_MUX11(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE1_MUX2_MUX11)
+#define BP_PXP_WFE_B_STAGE1_MUX2_RSVD1      22
+#define BM_PXP_WFE_B_STAGE1_MUX2_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE1_MUX2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE1_MUX2_RSVD1)
+#define BP_PXP_WFE_B_STAGE1_MUX2_MUX10      16
+#define BM_PXP_WFE_B_STAGE1_MUX2_MUX10 0x003F0000
+#define BF_PXP_WFE_B_STAGE1_MUX2_MUX10(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE1_MUX2_MUX10)
+#define BP_PXP_WFE_B_STAGE1_MUX2_RSVD2      14
+#define BM_PXP_WFE_B_STAGE1_MUX2_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE1_MUX2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE1_MUX2_RSVD2)
+#define BP_PXP_WFE_B_STAGE1_MUX2_MUX9      8
+#define BM_PXP_WFE_B_STAGE1_MUX2_MUX9 0x00003F00
+#define BF_PXP_WFE_B_STAGE1_MUX2_MUX9(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE1_MUX2_MUX9)
+#define BP_PXP_WFE_B_STAGE1_MUX2_RSVD3      6
+#define BM_PXP_WFE_B_STAGE1_MUX2_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE1_MUX2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE1_MUX2_RSVD3)
+#define BP_PXP_WFE_B_STAGE1_MUX2_MUX8      0
+#define BM_PXP_WFE_B_STAGE1_MUX2_MUX8 0x0000003F
+#define BF_PXP_WFE_B_STAGE1_MUX2_MUX8(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_MUX2_MUX8)
+
+#define HW_PXP_WFE_B_STAGE1_MUX3       (0x00001d80)
+#define HW_PXP_WFE_B_STAGE1_MUX3_SET   (0x00001d84)
+#define HW_PXP_WFE_B_STAGE1_MUX3_CLR   (0x00001d88)
+#define HW_PXP_WFE_B_STAGE1_MUX3_TOG   (0x00001d8c)
+
+#define BP_PXP_WFE_B_STAGE1_MUX3_RSVD0      30
+#define BM_PXP_WFE_B_STAGE1_MUX3_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE1_MUX3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE1_MUX3_RSVD0)
+#define BP_PXP_WFE_B_STAGE1_MUX3_MUX15      24
+#define BM_PXP_WFE_B_STAGE1_MUX3_MUX15 0x3F000000
+#define BF_PXP_WFE_B_STAGE1_MUX3_MUX15(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE1_MUX3_MUX15)
+#define BP_PXP_WFE_B_STAGE1_MUX3_RSVD1      22
+#define BM_PXP_WFE_B_STAGE1_MUX3_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE1_MUX3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE1_MUX3_RSVD1)
+#define BP_PXP_WFE_B_STAGE1_MUX3_MUX14      16
+#define BM_PXP_WFE_B_STAGE1_MUX3_MUX14 0x003F0000
+#define BF_PXP_WFE_B_STAGE1_MUX3_MUX14(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE1_MUX3_MUX14)
+#define BP_PXP_WFE_B_STAGE1_MUX3_RSVD2      14
+#define BM_PXP_WFE_B_STAGE1_MUX3_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE1_MUX3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE1_MUX3_RSVD2)
+#define BP_PXP_WFE_B_STAGE1_MUX3_MUX13      8
+#define BM_PXP_WFE_B_STAGE1_MUX3_MUX13 0x00003F00
+#define BF_PXP_WFE_B_STAGE1_MUX3_MUX13(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE1_MUX3_MUX13)
+#define BP_PXP_WFE_B_STAGE1_MUX3_RSVD3      6
+#define BM_PXP_WFE_B_STAGE1_MUX3_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE1_MUX3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE1_MUX3_RSVD3)
+#define BP_PXP_WFE_B_STAGE1_MUX3_MUX12      0
+#define BM_PXP_WFE_B_STAGE1_MUX3_MUX12 0x0000003F
+#define BF_PXP_WFE_B_STAGE1_MUX3_MUX12(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_MUX3_MUX12)
+
+#define HW_PXP_WFE_B_STAGE1_MUX4       (0x00001d90)
+#define HW_PXP_WFE_B_STAGE1_MUX4_SET   (0x00001d94)
+#define HW_PXP_WFE_B_STAGE1_MUX4_CLR   (0x00001d98)
+#define HW_PXP_WFE_B_STAGE1_MUX4_TOG   (0x00001d9c)
+
+#define BP_PXP_WFE_B_STAGE1_MUX4_RSVD0      30
+#define BM_PXP_WFE_B_STAGE1_MUX4_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE1_MUX4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE1_MUX4_RSVD0)
+#define BP_PXP_WFE_B_STAGE1_MUX4_MUX19      24
+#define BM_PXP_WFE_B_STAGE1_MUX4_MUX19 0x3F000000
+#define BF_PXP_WFE_B_STAGE1_MUX4_MUX19(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE1_MUX4_MUX19)
+#define BP_PXP_WFE_B_STAGE1_MUX4_RSVD1      22
+#define BM_PXP_WFE_B_STAGE1_MUX4_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE1_MUX4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE1_MUX4_RSVD1)
+#define BP_PXP_WFE_B_STAGE1_MUX4_MUX18      16
+#define BM_PXP_WFE_B_STAGE1_MUX4_MUX18 0x003F0000
+#define BF_PXP_WFE_B_STAGE1_MUX4_MUX18(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE1_MUX4_MUX18)
+#define BP_PXP_WFE_B_STAGE1_MUX4_RSVD2      14
+#define BM_PXP_WFE_B_STAGE1_MUX4_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE1_MUX4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE1_MUX4_RSVD2)
+#define BP_PXP_WFE_B_STAGE1_MUX4_MUX17      8
+#define BM_PXP_WFE_B_STAGE1_MUX4_MUX17 0x00003F00
+#define BF_PXP_WFE_B_STAGE1_MUX4_MUX17(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE1_MUX4_MUX17)
+#define BP_PXP_WFE_B_STAGE1_MUX4_RSVD3      6
+#define BM_PXP_WFE_B_STAGE1_MUX4_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE1_MUX4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE1_MUX4_RSVD3)
+#define BP_PXP_WFE_B_STAGE1_MUX4_MUX16      0
+#define BM_PXP_WFE_B_STAGE1_MUX4_MUX16 0x0000003F
+#define BF_PXP_WFE_B_STAGE1_MUX4_MUX16(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_MUX4_MUX16)
+
+#define HW_PXP_WFE_B_STAGE1_MUX5       (0x00001da0)
+#define HW_PXP_WFE_B_STAGE1_MUX5_SET   (0x00001da4)
+#define HW_PXP_WFE_B_STAGE1_MUX5_CLR   (0x00001da8)
+#define HW_PXP_WFE_B_STAGE1_MUX5_TOG   (0x00001dac)
+
+#define BP_PXP_WFE_B_STAGE1_MUX5_RSVD0      30
+#define BM_PXP_WFE_B_STAGE1_MUX5_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE1_MUX5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE1_MUX5_RSVD0)
+#define BP_PXP_WFE_B_STAGE1_MUX5_MUX23      24
+#define BM_PXP_WFE_B_STAGE1_MUX5_MUX23 0x3F000000
+#define BF_PXP_WFE_B_STAGE1_MUX5_MUX23(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE1_MUX5_MUX23)
+#define BP_PXP_WFE_B_STAGE1_MUX5_RSVD1      22
+#define BM_PXP_WFE_B_STAGE1_MUX5_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE1_MUX5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE1_MUX5_RSVD1)
+#define BP_PXP_WFE_B_STAGE1_MUX5_MUX22      16
+#define BM_PXP_WFE_B_STAGE1_MUX5_MUX22 0x003F0000
+#define BF_PXP_WFE_B_STAGE1_MUX5_MUX22(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE1_MUX5_MUX22)
+#define BP_PXP_WFE_B_STAGE1_MUX5_RSVD2      14
+#define BM_PXP_WFE_B_STAGE1_MUX5_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE1_MUX5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE1_MUX5_RSVD2)
+#define BP_PXP_WFE_B_STAGE1_MUX5_MUX21      8
+#define BM_PXP_WFE_B_STAGE1_MUX5_MUX21 0x00003F00
+#define BF_PXP_WFE_B_STAGE1_MUX5_MUX21(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE1_MUX5_MUX21)
+#define BP_PXP_WFE_B_STAGE1_MUX5_RSVD3      6
+#define BM_PXP_WFE_B_STAGE1_MUX5_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE1_MUX5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE1_MUX5_RSVD3)
+#define BP_PXP_WFE_B_STAGE1_MUX5_MUX20      0
+#define BM_PXP_WFE_B_STAGE1_MUX5_MUX20 0x0000003F
+#define BF_PXP_WFE_B_STAGE1_MUX5_MUX20(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_MUX5_MUX20)
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__INC        0x0
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__DEC        0x1
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__ADD        0x2
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__MINUS      0x3
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__AND        0x4
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__OR         0x5
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__XOR        0x6
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__SHIFTLEFT  0x7
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__SHIFTRIGHT 0x8
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__BIT_AND    0x9
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__BIT_OR     0xa
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__BIT_CMP    0xb
+#define BV_PXP_WFE_B_STAGE1_MUX5_MUX20__NOP        0xc
+
+#define HW_PXP_WFE_B_STAGE1_MUX6       (0x00001db0)
+#define HW_PXP_WFE_B_STAGE1_MUX6_SET   (0x00001db4)
+#define HW_PXP_WFE_B_STAGE1_MUX6_CLR   (0x00001db8)
+#define HW_PXP_WFE_B_STAGE1_MUX6_TOG   (0x00001dbc)
+
+#define BP_PXP_WFE_B_STAGE1_MUX6_RSVD0      30
+#define BM_PXP_WFE_B_STAGE1_MUX6_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE1_MUX6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE1_MUX6_RSVD0)
+#define BP_PXP_WFE_B_STAGE1_MUX6_MUX27      24
+#define BM_PXP_WFE_B_STAGE1_MUX6_MUX27 0x3F000000
+#define BF_PXP_WFE_B_STAGE1_MUX6_MUX27(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE1_MUX6_MUX27)
+#define BP_PXP_WFE_B_STAGE1_MUX6_RSVD1      22
+#define BM_PXP_WFE_B_STAGE1_MUX6_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE1_MUX6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE1_MUX6_RSVD1)
+#define BP_PXP_WFE_B_STAGE1_MUX6_MUX26      16
+#define BM_PXP_WFE_B_STAGE1_MUX6_MUX26 0x003F0000
+#define BF_PXP_WFE_B_STAGE1_MUX6_MUX26(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE1_MUX6_MUX26)
+#define BP_PXP_WFE_B_STAGE1_MUX6_RSVD2      14
+#define BM_PXP_WFE_B_STAGE1_MUX6_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE1_MUX6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE1_MUX6_RSVD2)
+#define BP_PXP_WFE_B_STAGE1_MUX6_MUX25      8
+#define BM_PXP_WFE_B_STAGE1_MUX6_MUX25 0x00003F00
+#define BF_PXP_WFE_B_STAGE1_MUX6_MUX25(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE1_MUX6_MUX25)
+#define BP_PXP_WFE_B_STAGE1_MUX6_RSVD3      6
+#define BM_PXP_WFE_B_STAGE1_MUX6_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE1_MUX6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE1_MUX6_RSVD3)
+#define BP_PXP_WFE_B_STAGE1_MUX6_MUX24      0
+#define BM_PXP_WFE_B_STAGE1_MUX6_MUX24 0x0000003F
+#define BF_PXP_WFE_B_STAGE1_MUX6_MUX24(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_MUX6_MUX24)
+
+#define HW_PXP_WFE_B_STAGE1_MUX7       (0x00001dc0)
+#define HW_PXP_WFE_B_STAGE1_MUX7_SET   (0x00001dc4)
+#define HW_PXP_WFE_B_STAGE1_MUX7_CLR   (0x00001dc8)
+#define HW_PXP_WFE_B_STAGE1_MUX7_TOG   (0x00001dcc)
+
+#define BP_PXP_WFE_B_STAGE1_MUX7_RSVD0      30
+#define BM_PXP_WFE_B_STAGE1_MUX7_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE1_MUX7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE1_MUX7_RSVD0)
+#define BP_PXP_WFE_B_STAGE1_MUX7_MUX31      24
+#define BM_PXP_WFE_B_STAGE1_MUX7_MUX31 0x3F000000
+#define BF_PXP_WFE_B_STAGE1_MUX7_MUX31(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE1_MUX7_MUX31)
+#define BP_PXP_WFE_B_STAGE1_MUX7_RSVD1      22
+#define BM_PXP_WFE_B_STAGE1_MUX7_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE1_MUX7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE1_MUX7_RSVD1)
+#define BP_PXP_WFE_B_STAGE1_MUX7_MUX30      16
+#define BM_PXP_WFE_B_STAGE1_MUX7_MUX30 0x003F0000
+#define BF_PXP_WFE_B_STAGE1_MUX7_MUX30(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE1_MUX7_MUX30)
+#define BP_PXP_WFE_B_STAGE1_MUX7_RSVD2      14
+#define BM_PXP_WFE_B_STAGE1_MUX7_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE1_MUX7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE1_MUX7_RSVD2)
+#define BP_PXP_WFE_B_STAGE1_MUX7_MUX29      8
+#define BM_PXP_WFE_B_STAGE1_MUX7_MUX29 0x00003F00
+#define BF_PXP_WFE_B_STAGE1_MUX7_MUX29(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE1_MUX7_MUX29)
+#define BP_PXP_WFE_B_STAGE1_MUX7_RSVD3      6
+#define BM_PXP_WFE_B_STAGE1_MUX7_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE1_MUX7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE1_MUX7_RSVD3)
+#define BP_PXP_WFE_B_STAGE1_MUX7_MUX28      0
+#define BM_PXP_WFE_B_STAGE1_MUX7_MUX28 0x0000003F
+#define BF_PXP_WFE_B_STAGE1_MUX7_MUX28(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_MUX7_MUX28)
+
+#define HW_PXP_WFE_B_STAGE1_MUX8       (0x00001dd0)
+#define HW_PXP_WFE_B_STAGE1_MUX8_SET   (0x00001dd4)
+#define HW_PXP_WFE_B_STAGE1_MUX8_CLR   (0x00001dd8)
+#define HW_PXP_WFE_B_STAGE1_MUX8_TOG   (0x00001ddc)
+
+#define BP_PXP_WFE_B_STAGE1_MUX8_RSVD0      6
+#define BM_PXP_WFE_B_STAGE1_MUX8_RSVD0 0xFFFFFFC0
+#define BF_PXP_WFE_B_STAGE1_MUX8_RSVD0(v) \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE1_MUX8_RSVD0)
+#define BP_PXP_WFE_B_STAGE1_MUX8_MUX32      0
+#define BM_PXP_WFE_B_STAGE1_MUX8_MUX32 0x0000003F
+#define BF_PXP_WFE_B_STAGE1_MUX8_MUX32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_MUX8_MUX32)
+
+#define HW_PXP_WFE_B_STAGE2_MUX0       (0x00001de0)
+#define HW_PXP_WFE_B_STAGE2_MUX0_SET   (0x00001de4)
+#define HW_PXP_WFE_B_STAGE2_MUX0_CLR   (0x00001de8)
+#define HW_PXP_WFE_B_STAGE2_MUX0_TOG   (0x00001dec)
+
+#define BP_PXP_WFE_B_STAGE2_MUX0_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX0_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX0_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX0_MUX3      24
+#define BM_PXP_WFE_B_STAGE2_MUX0_MUX3 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX0_MUX3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX0_MUX3)
+#define BP_PXP_WFE_B_STAGE2_MUX0_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX0_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX0_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX0_MUX2      16
+#define BM_PXP_WFE_B_STAGE2_MUX0_MUX2 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX0_MUX2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX0_MUX2)
+#define BP_PXP_WFE_B_STAGE2_MUX0_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX0_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX0_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX0_MUX1      8
+#define BM_PXP_WFE_B_STAGE2_MUX0_MUX1 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX0_MUX1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX0_MUX1)
+#define BP_PXP_WFE_B_STAGE2_MUX0_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX0_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX0_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX0_MUX0      0
+#define BM_PXP_WFE_B_STAGE2_MUX0_MUX0 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX0_MUX0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX0_MUX0)
+
+#define HW_PXP_WFE_B_STAGE2_MUX1       (0x00001df0)
+#define HW_PXP_WFE_B_STAGE2_MUX1_SET   (0x00001df4)
+#define HW_PXP_WFE_B_STAGE2_MUX1_CLR   (0x00001df8)
+#define HW_PXP_WFE_B_STAGE2_MUX1_TOG   (0x00001dfc)
+
+#define BP_PXP_WFE_B_STAGE2_MUX1_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX1_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX1_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX1_MUX7      24
+#define BM_PXP_WFE_B_STAGE2_MUX1_MUX7 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX1_MUX7(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX1_MUX7)
+#define BP_PXP_WFE_B_STAGE2_MUX1_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX1_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX1_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX1_MUX6      16
+#define BM_PXP_WFE_B_STAGE2_MUX1_MUX6 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX1_MUX6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX1_MUX6)
+#define BP_PXP_WFE_B_STAGE2_MUX1_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX1_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX1_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX1_MUX5      8
+#define BM_PXP_WFE_B_STAGE2_MUX1_MUX5 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX1_MUX5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX1_MUX5)
+#define BP_PXP_WFE_B_STAGE2_MUX1_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX1_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX1_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX1_MUX4      0
+#define BM_PXP_WFE_B_STAGE2_MUX1_MUX4 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX1_MUX4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX1_MUX4)
+
+#define HW_PXP_WFE_B_STAGE2_MUX2       (0x00001e00)
+#define HW_PXP_WFE_B_STAGE2_MUX2_SET   (0x00001e04)
+#define HW_PXP_WFE_B_STAGE2_MUX2_CLR   (0x00001e08)
+#define HW_PXP_WFE_B_STAGE2_MUX2_TOG   (0x00001e0c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX2_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX2_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX2_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX2_MUX11      24
+#define BM_PXP_WFE_B_STAGE2_MUX2_MUX11 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX2_MUX11(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX2_MUX11)
+#define BP_PXP_WFE_B_STAGE2_MUX2_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX2_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX2_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX2_MUX10      16
+#define BM_PXP_WFE_B_STAGE2_MUX2_MUX10 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX2_MUX10(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX2_MUX10)
+#define BP_PXP_WFE_B_STAGE2_MUX2_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX2_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX2_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX2_MUX9      8
+#define BM_PXP_WFE_B_STAGE2_MUX2_MUX9 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX2_MUX9(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX2_MUX9)
+#define BP_PXP_WFE_B_STAGE2_MUX2_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX2_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX2_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX2_MUX8      0
+#define BM_PXP_WFE_B_STAGE2_MUX2_MUX8 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX2_MUX8(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX2_MUX8)
+
+#define HW_PXP_WFE_B_STAGE2_MUX3       (0x00001e10)
+#define HW_PXP_WFE_B_STAGE2_MUX3_SET   (0x00001e14)
+#define HW_PXP_WFE_B_STAGE2_MUX3_CLR   (0x00001e18)
+#define HW_PXP_WFE_B_STAGE2_MUX3_TOG   (0x00001e1c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX3_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX3_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX3_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX3_MUX15      24
+#define BM_PXP_WFE_B_STAGE2_MUX3_MUX15 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX3_MUX15(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX3_MUX15)
+#define BP_PXP_WFE_B_STAGE2_MUX3_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX3_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX3_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX3_MUX14      16
+#define BM_PXP_WFE_B_STAGE2_MUX3_MUX14 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX3_MUX14(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX3_MUX14)
+#define BP_PXP_WFE_B_STAGE2_MUX3_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX3_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX3_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX3_MUX13      8
+#define BM_PXP_WFE_B_STAGE2_MUX3_MUX13 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX3_MUX13(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX3_MUX13)
+#define BP_PXP_WFE_B_STAGE2_MUX3_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX3_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX3_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX3_MUX12      0
+#define BM_PXP_WFE_B_STAGE2_MUX3_MUX12 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX3_MUX12(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX3_MUX12)
+
+#define HW_PXP_WFE_B_STAGE2_MUX4       (0x00001e20)
+#define HW_PXP_WFE_B_STAGE2_MUX4_SET   (0x00001e24)
+#define HW_PXP_WFE_B_STAGE2_MUX4_CLR   (0x00001e28)
+#define HW_PXP_WFE_B_STAGE2_MUX4_TOG   (0x00001e2c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX4_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX4_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX4_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX4_MUX19      24
+#define BM_PXP_WFE_B_STAGE2_MUX4_MUX19 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX4_MUX19(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX4_MUX19)
+#define BP_PXP_WFE_B_STAGE2_MUX4_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX4_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX4_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX4_MUX18      16
+#define BM_PXP_WFE_B_STAGE2_MUX4_MUX18 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX4_MUX18(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX4_MUX18)
+#define BP_PXP_WFE_B_STAGE2_MUX4_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX4_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX4_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX4_MUX17      8
+#define BM_PXP_WFE_B_STAGE2_MUX4_MUX17 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX4_MUX17(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX4_MUX17)
+#define BP_PXP_WFE_B_STAGE2_MUX4_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX4_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX4_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX4_MUX16      0
+#define BM_PXP_WFE_B_STAGE2_MUX4_MUX16 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX4_MUX16(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX4_MUX16)
+
+#define HW_PXP_WFE_B_STAGE2_MUX5       (0x00001e30)
+#define HW_PXP_WFE_B_STAGE2_MUX5_SET   (0x00001e34)
+#define HW_PXP_WFE_B_STAGE2_MUX5_CLR   (0x00001e38)
+#define HW_PXP_WFE_B_STAGE2_MUX5_TOG   (0x00001e3c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX5_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX5_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX5_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX5_MUX23      24
+#define BM_PXP_WFE_B_STAGE2_MUX5_MUX23 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX5_MUX23(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX5_MUX23)
+#define BP_PXP_WFE_B_STAGE2_MUX5_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX5_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX5_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX5_MUX22      16
+#define BM_PXP_WFE_B_STAGE2_MUX5_MUX22 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX5_MUX22(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX5_MUX22)
+#define BP_PXP_WFE_B_STAGE2_MUX5_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX5_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX5_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX5_MUX21      8
+#define BM_PXP_WFE_B_STAGE2_MUX5_MUX21 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX5_MUX21(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX5_MUX21)
+#define BP_PXP_WFE_B_STAGE2_MUX5_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX5_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX5_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX5_MUX20      0
+#define BM_PXP_WFE_B_STAGE2_MUX5_MUX20 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX5_MUX20(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX5_MUX20)
+
+#define HW_PXP_WFE_B_STAGE2_MUX6       (0x00001e40)
+#define HW_PXP_WFE_B_STAGE2_MUX6_SET   (0x00001e44)
+#define HW_PXP_WFE_B_STAGE2_MUX6_CLR   (0x00001e48)
+#define HW_PXP_WFE_B_STAGE2_MUX6_TOG   (0x00001e4c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX6_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX6_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX6_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX6_MUX27      24
+#define BM_PXP_WFE_B_STAGE2_MUX6_MUX27 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX6_MUX27(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX6_MUX27)
+#define BP_PXP_WFE_B_STAGE2_MUX6_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX6_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX6_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX6_MUX26      16
+#define BM_PXP_WFE_B_STAGE2_MUX6_MUX26 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX6_MUX26(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX6_MUX26)
+#define BP_PXP_WFE_B_STAGE2_MUX6_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX6_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX6_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX6_MUX25      8
+#define BM_PXP_WFE_B_STAGE2_MUX6_MUX25 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX6_MUX25(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX6_MUX25)
+#define BP_PXP_WFE_B_STAGE2_MUX6_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX6_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX6_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX6_MUX24      0
+#define BM_PXP_WFE_B_STAGE2_MUX6_MUX24 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX6_MUX24(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX6_MUX24)
+
+#define HW_PXP_WFE_B_STAGE2_MUX7       (0x00001e50)
+#define HW_PXP_WFE_B_STAGE2_MUX7_SET   (0x00001e54)
+#define HW_PXP_WFE_B_STAGE2_MUX7_CLR   (0x00001e58)
+#define HW_PXP_WFE_B_STAGE2_MUX7_TOG   (0x00001e5c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX7_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX7_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX7_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX7_MUX31      24
+#define BM_PXP_WFE_B_STAGE2_MUX7_MUX31 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX7_MUX31(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX7_MUX31)
+#define BP_PXP_WFE_B_STAGE2_MUX7_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX7_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX7_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX7_MUX30      16
+#define BM_PXP_WFE_B_STAGE2_MUX7_MUX30 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX7_MUX30(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX7_MUX30)
+#define BP_PXP_WFE_B_STAGE2_MUX7_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX7_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX7_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX7_MUX29      8
+#define BM_PXP_WFE_B_STAGE2_MUX7_MUX29 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX7_MUX29(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX7_MUX29)
+#define BP_PXP_WFE_B_STAGE2_MUX7_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX7_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX7_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX7_MUX28      0
+#define BM_PXP_WFE_B_STAGE2_MUX7_MUX28 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX7_MUX28(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX7_MUX28)
+
+#define HW_PXP_WFE_B_STAGE2_MUX8       (0x00001e60)
+#define HW_PXP_WFE_B_STAGE2_MUX8_SET   (0x00001e64)
+#define HW_PXP_WFE_B_STAGE2_MUX8_CLR   (0x00001e68)
+#define HW_PXP_WFE_B_STAGE2_MUX8_TOG   (0x00001e6c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX8_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX8_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX8_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX8_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX8_MUX35      24
+#define BM_PXP_WFE_B_STAGE2_MUX8_MUX35 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX8_MUX35(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX8_MUX35)
+#define BP_PXP_WFE_B_STAGE2_MUX8_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX8_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX8_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX8_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX8_MUX34      16
+#define BM_PXP_WFE_B_STAGE2_MUX8_MUX34 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX8_MUX34(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX8_MUX34)
+#define BP_PXP_WFE_B_STAGE2_MUX8_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX8_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX8_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX8_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX8_MUX33      8
+#define BM_PXP_WFE_B_STAGE2_MUX8_MUX33 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX8_MUX33(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX8_MUX33)
+#define BP_PXP_WFE_B_STAGE2_MUX8_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX8_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX8_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX8_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX8_MUX32      0
+#define BM_PXP_WFE_B_STAGE2_MUX8_MUX32 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX8_MUX32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX8_MUX32)
+
+#define HW_PXP_WFE_B_STAGE2_MUX9       (0x00001e70)
+#define HW_PXP_WFE_B_STAGE2_MUX9_SET   (0x00001e74)
+#define HW_PXP_WFE_B_STAGE2_MUX9_CLR   (0x00001e78)
+#define HW_PXP_WFE_B_STAGE2_MUX9_TOG   (0x00001e7c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX9_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX9_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX9_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX9_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX9_MUX39      24
+#define BM_PXP_WFE_B_STAGE2_MUX9_MUX39 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX9_MUX39(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX9_MUX39)
+#define BP_PXP_WFE_B_STAGE2_MUX9_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX9_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX9_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX9_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX9_MUX38      16
+#define BM_PXP_WFE_B_STAGE2_MUX9_MUX38 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX9_MUX38(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX9_MUX38)
+#define BP_PXP_WFE_B_STAGE2_MUX9_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX9_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX9_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX9_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX9_MUX37      8
+#define BM_PXP_WFE_B_STAGE2_MUX9_MUX37 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX9_MUX37(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX9_MUX37)
+#define BP_PXP_WFE_B_STAGE2_MUX9_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX9_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX9_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX9_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX9_MUX36      0
+#define BM_PXP_WFE_B_STAGE2_MUX9_MUX36 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX9_MUX36(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX9_MUX36)
+
+#define HW_PXP_WFE_B_STAGE2_MUX10      (0x00001e80)
+#define HW_PXP_WFE_B_STAGE2_MUX10_SET  (0x00001e84)
+#define HW_PXP_WFE_B_STAGE2_MUX10_CLR  (0x00001e88)
+#define HW_PXP_WFE_B_STAGE2_MUX10_TOG  (0x00001e8c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX10_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX10_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX10_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX10_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX10_MUX43      24
+#define BM_PXP_WFE_B_STAGE2_MUX10_MUX43 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX10_MUX43(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX10_MUX43)
+#define BP_PXP_WFE_B_STAGE2_MUX10_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX10_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX10_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX10_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX10_MUX42      16
+#define BM_PXP_WFE_B_STAGE2_MUX10_MUX42 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX10_MUX42(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX10_MUX42)
+#define BP_PXP_WFE_B_STAGE2_MUX10_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX10_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX10_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX10_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX10_MUX41      8
+#define BM_PXP_WFE_B_STAGE2_MUX10_MUX41 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX10_MUX41(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX10_MUX41)
+#define BP_PXP_WFE_B_STAGE2_MUX10_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX10_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX10_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX10_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX10_MUX40      0
+#define BM_PXP_WFE_B_STAGE2_MUX10_MUX40 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX10_MUX40(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX10_MUX40)
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__INC        0x0
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__DEC        0x1
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__ADD        0x2
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__MINUS      0x3
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__AND        0x4
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__OR         0x5
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__XOR        0x6
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__SHIFTLEFT  0x7
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__SHIFTRIGHT 0x8
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__BIT_AND    0x9
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__BIT_OR     0xa
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__BIT_CMP    0xb
+#define BV_PXP_WFE_B_STAGE2_MUX10_MUX40__NOP        0xc
+
+#define HW_PXP_WFE_B_STAGE2_MUX11      (0x00001e90)
+#define HW_PXP_WFE_B_STAGE2_MUX11_SET  (0x00001e94)
+#define HW_PXP_WFE_B_STAGE2_MUX11_CLR  (0x00001e98)
+#define HW_PXP_WFE_B_STAGE2_MUX11_TOG  (0x00001e9c)
+
+#define BP_PXP_WFE_B_STAGE2_MUX11_RSVD0      30
+#define BM_PXP_WFE_B_STAGE2_MUX11_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_MUX11_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_MUX11_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX11_MUX47      24
+#define BM_PXP_WFE_B_STAGE2_MUX11_MUX47 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_MUX11_MUX47(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_MUX11_MUX47)
+#define BP_PXP_WFE_B_STAGE2_MUX11_RSVD1      22
+#define BM_PXP_WFE_B_STAGE2_MUX11_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_MUX11_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_MUX11_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_MUX11_MUX46      16
+#define BM_PXP_WFE_B_STAGE2_MUX11_MUX46 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_MUX11_MUX46(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_MUX11_MUX46)
+#define BP_PXP_WFE_B_STAGE2_MUX11_RSVD2      14
+#define BM_PXP_WFE_B_STAGE2_MUX11_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_MUX11_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_MUX11_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_MUX11_MUX45      8
+#define BM_PXP_WFE_B_STAGE2_MUX11_MUX45 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_MUX11_MUX45(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_MUX11_MUX45)
+#define BP_PXP_WFE_B_STAGE2_MUX11_RSVD3      6
+#define BM_PXP_WFE_B_STAGE2_MUX11_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_MUX11_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX11_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_MUX11_MUX44      0
+#define BM_PXP_WFE_B_STAGE2_MUX11_MUX44 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX11_MUX44(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX11_MUX44)
+
+#define HW_PXP_WFE_B_STAGE2_MUX12      (0x00001ea0)
+#define HW_PXP_WFE_B_STAGE2_MUX12_SET  (0x00001ea4)
+#define HW_PXP_WFE_B_STAGE2_MUX12_CLR  (0x00001ea8)
+#define HW_PXP_WFE_B_STAGE2_MUX12_TOG  (0x00001eac)
+
+#define BP_PXP_WFE_B_STAGE2_MUX12_RSVD0      6
+#define BM_PXP_WFE_B_STAGE2_MUX12_RSVD0 0xFFFFFFC0
+#define BF_PXP_WFE_B_STAGE2_MUX12_RSVD0(v) \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_MUX12_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_MUX12_MUX48      0
+#define BM_PXP_WFE_B_STAGE2_MUX12_MUX48 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_MUX12_MUX48(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_MUX12_MUX48)
+
+#define HW_PXP_WFE_B_STAGE3_MUX0       (0x00001eb0)
+#define HW_PXP_WFE_B_STAGE3_MUX0_SET   (0x00001eb4)
+#define HW_PXP_WFE_B_STAGE3_MUX0_CLR   (0x00001eb8)
+#define HW_PXP_WFE_B_STAGE3_MUX0_TOG   (0x00001ebc)
+
+#define BP_PXP_WFE_B_STAGE3_MUX0_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX0_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX0_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX0_MUX3      24
+#define BM_PXP_WFE_B_STAGE3_MUX0_MUX3 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX0_MUX3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX0_MUX3)
+#define BP_PXP_WFE_B_STAGE3_MUX0_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX0_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX0_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX0_MUX2      16
+#define BM_PXP_WFE_B_STAGE3_MUX0_MUX2 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX0_MUX2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX0_MUX2)
+#define BP_PXP_WFE_B_STAGE3_MUX0_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX0_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX0_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX0_MUX1      8
+#define BM_PXP_WFE_B_STAGE3_MUX0_MUX1 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX0_MUX1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX0_MUX1)
+#define BP_PXP_WFE_B_STAGE3_MUX0_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX0_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX0_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX0_MUX0      0
+#define BM_PXP_WFE_B_STAGE3_MUX0_MUX0 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX0_MUX0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX0_MUX0)
+
+#define HW_PXP_WFE_B_STAGE3_MUX1       (0x00001ec0)
+#define HW_PXP_WFE_B_STAGE3_MUX1_SET   (0x00001ec4)
+#define HW_PXP_WFE_B_STAGE3_MUX1_CLR   (0x00001ec8)
+#define HW_PXP_WFE_B_STAGE3_MUX1_TOG   (0x00001ecc)
+
+#define BP_PXP_WFE_B_STAGE3_MUX1_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX1_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX1_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX1_MUX7      24
+#define BM_PXP_WFE_B_STAGE3_MUX1_MUX7 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX1_MUX7(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX1_MUX7)
+#define BP_PXP_WFE_B_STAGE3_MUX1_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX1_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX1_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX1_MUX6      16
+#define BM_PXP_WFE_B_STAGE3_MUX1_MUX6 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX1_MUX6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX1_MUX6)
+#define BP_PXP_WFE_B_STAGE3_MUX1_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX1_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX1_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX1_MUX5      8
+#define BM_PXP_WFE_B_STAGE3_MUX1_MUX5 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX1_MUX5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX1_MUX5)
+#define BP_PXP_WFE_B_STAGE3_MUX1_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX1_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX1_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX1_MUX4      0
+#define BM_PXP_WFE_B_STAGE3_MUX1_MUX4 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX1_MUX4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX1_MUX4)
+
+#define HW_PXP_WFE_B_STAGE3_MUX2       (0x00001ed0)
+#define HW_PXP_WFE_B_STAGE3_MUX2_SET   (0x00001ed4)
+#define HW_PXP_WFE_B_STAGE3_MUX2_CLR   (0x00001ed8)
+#define HW_PXP_WFE_B_STAGE3_MUX2_TOG   (0x00001edc)
+
+#define BP_PXP_WFE_B_STAGE3_MUX2_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX2_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX2_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX2_MUX11      24
+#define BM_PXP_WFE_B_STAGE3_MUX2_MUX11 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX2_MUX11(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX2_MUX11)
+#define BP_PXP_WFE_B_STAGE3_MUX2_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX2_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX2_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX2_MUX10      16
+#define BM_PXP_WFE_B_STAGE3_MUX2_MUX10 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX2_MUX10(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX2_MUX10)
+#define BP_PXP_WFE_B_STAGE3_MUX2_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX2_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX2_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX2_MUX9      8
+#define BM_PXP_WFE_B_STAGE3_MUX2_MUX9 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX2_MUX9(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX2_MUX9)
+#define BP_PXP_WFE_B_STAGE3_MUX2_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX2_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX2_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX2_MUX8      0
+#define BM_PXP_WFE_B_STAGE3_MUX2_MUX8 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX2_MUX8(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX2_MUX8)
+
+#define HW_PXP_WFE_B_STAGE3_MUX3       (0x00001ee0)
+#define HW_PXP_WFE_B_STAGE3_MUX3_SET   (0x00001ee4)
+#define HW_PXP_WFE_B_STAGE3_MUX3_CLR   (0x00001ee8)
+#define HW_PXP_WFE_B_STAGE3_MUX3_TOG   (0x00001eec)
+
+#define BP_PXP_WFE_B_STAGE3_MUX3_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX3_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX3_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX3_MUX15      24
+#define BM_PXP_WFE_B_STAGE3_MUX3_MUX15 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX3_MUX15(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX3_MUX15)
+#define BP_PXP_WFE_B_STAGE3_MUX3_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX3_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX3_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX3_MUX14      16
+#define BM_PXP_WFE_B_STAGE3_MUX3_MUX14 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX3_MUX14(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX3_MUX14)
+#define BP_PXP_WFE_B_STAGE3_MUX3_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX3_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX3_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX3_MUX13      8
+#define BM_PXP_WFE_B_STAGE3_MUX3_MUX13 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX3_MUX13(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX3_MUX13)
+#define BP_PXP_WFE_B_STAGE3_MUX3_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX3_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX3_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX3_MUX12      0
+#define BM_PXP_WFE_B_STAGE3_MUX3_MUX12 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX3_MUX12(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX3_MUX12)
+
+#define HW_PXP_WFE_B_STAGE3_MUX4       (0x00001ef0)
+#define HW_PXP_WFE_B_STAGE3_MUX4_SET   (0x00001ef4)
+#define HW_PXP_WFE_B_STAGE3_MUX4_CLR   (0x00001ef8)
+#define HW_PXP_WFE_B_STAGE3_MUX4_TOG   (0x00001efc)
+
+#define BP_PXP_WFE_B_STAGE3_MUX4_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX4_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX4_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX4_MUX19      24
+#define BM_PXP_WFE_B_STAGE3_MUX4_MUX19 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX4_MUX19(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX4_MUX19)
+#define BP_PXP_WFE_B_STAGE3_MUX4_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX4_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX4_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX4_MUX18      16
+#define BM_PXP_WFE_B_STAGE3_MUX4_MUX18 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX4_MUX18(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX4_MUX18)
+#define BP_PXP_WFE_B_STAGE3_MUX4_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX4_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX4_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX4_MUX17      8
+#define BM_PXP_WFE_B_STAGE3_MUX4_MUX17 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX4_MUX17(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX4_MUX17)
+#define BP_PXP_WFE_B_STAGE3_MUX4_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX4_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX4_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX4_MUX16      0
+#define BM_PXP_WFE_B_STAGE3_MUX4_MUX16 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX4_MUX16(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX4_MUX16)
+
+#define HW_PXP_WFE_B_STAGE3_MUX5       (0x00001f00)
+#define HW_PXP_WFE_B_STAGE3_MUX5_SET   (0x00001f04)
+#define HW_PXP_WFE_B_STAGE3_MUX5_CLR   (0x00001f08)
+#define HW_PXP_WFE_B_STAGE3_MUX5_TOG   (0x00001f0c)
+
+#define BP_PXP_WFE_B_STAGE3_MUX5_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX5_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX5_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX5_MUX23      24
+#define BM_PXP_WFE_B_STAGE3_MUX5_MUX23 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX5_MUX23(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX5_MUX23)
+#define BP_PXP_WFE_B_STAGE3_MUX5_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX5_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX5_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX5_MUX22      16
+#define BM_PXP_WFE_B_STAGE3_MUX5_MUX22 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX5_MUX22(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX5_MUX22)
+#define BP_PXP_WFE_B_STAGE3_MUX5_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX5_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX5_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX5_MUX21      8
+#define BM_PXP_WFE_B_STAGE3_MUX5_MUX21 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX5_MUX21(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX5_MUX21)
+#define BP_PXP_WFE_B_STAGE3_MUX5_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX5_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX5_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX5_MUX20      0
+#define BM_PXP_WFE_B_STAGE3_MUX5_MUX20 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX5_MUX20(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX5_MUX20)
+
+#define HW_PXP_WFE_B_STAGE3_MUX6       (0x00001f10)
+#define HW_PXP_WFE_B_STAGE3_MUX6_SET   (0x00001f14)
+#define HW_PXP_WFE_B_STAGE3_MUX6_CLR   (0x00001f18)
+#define HW_PXP_WFE_B_STAGE3_MUX6_TOG   (0x00001f1c)
+
+#define BP_PXP_WFE_B_STAGE3_MUX6_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX6_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX6_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX6_MUX27      24
+#define BM_PXP_WFE_B_STAGE3_MUX6_MUX27 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX6_MUX27(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX6_MUX27)
+#define BP_PXP_WFE_B_STAGE3_MUX6_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX6_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX6_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX6_MUX26      16
+#define BM_PXP_WFE_B_STAGE3_MUX6_MUX26 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX6_MUX26(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX6_MUX26)
+#define BP_PXP_WFE_B_STAGE3_MUX6_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX6_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX6_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX6_MUX25      8
+#define BM_PXP_WFE_B_STAGE3_MUX6_MUX25 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX6_MUX25(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX6_MUX25)
+#define BP_PXP_WFE_B_STAGE3_MUX6_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX6_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX6_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX6_MUX24      0
+#define BM_PXP_WFE_B_STAGE3_MUX6_MUX24 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX6_MUX24(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX6_MUX24)
+
+#define HW_PXP_WFE_B_STAGE3_MUX7       (0x00001f20)
+#define HW_PXP_WFE_B_STAGE3_MUX7_SET   (0x00001f24)
+#define HW_PXP_WFE_B_STAGE3_MUX7_CLR   (0x00001f28)
+#define HW_PXP_WFE_B_STAGE3_MUX7_TOG   (0x00001f2c)
+
+#define BP_PXP_WFE_B_STAGE3_MUX7_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX7_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX7_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX7_MUX31      24
+#define BM_PXP_WFE_B_STAGE3_MUX7_MUX31 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX7_MUX31(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX7_MUX31)
+#define BP_PXP_WFE_B_STAGE3_MUX7_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX7_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX7_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX7_MUX30      16
+#define BM_PXP_WFE_B_STAGE3_MUX7_MUX30 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX7_MUX30(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX7_MUX30)
+#define BP_PXP_WFE_B_STAGE3_MUX7_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX7_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX7_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX7_MUX29      8
+#define BM_PXP_WFE_B_STAGE3_MUX7_MUX29 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX7_MUX29(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX7_MUX29)
+#define BP_PXP_WFE_B_STAGE3_MUX7_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX7_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX7_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX7_MUX28      0
+#define BM_PXP_WFE_B_STAGE3_MUX7_MUX28 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX7_MUX28(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX7_MUX28)
+
+#define HW_PXP_WFE_B_STAGE3_MUX8       (0x00001f30)
+#define HW_PXP_WFE_B_STAGE3_MUX8_SET   (0x00001f34)
+#define HW_PXP_WFE_B_STAGE3_MUX8_CLR   (0x00001f38)
+#define HW_PXP_WFE_B_STAGE3_MUX8_TOG   (0x00001f3c)
+
+#define BP_PXP_WFE_B_STAGE3_MUX8_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX8_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX8_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX8_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX8_MUX35      24
+#define BM_PXP_WFE_B_STAGE3_MUX8_MUX35 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX8_MUX35(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX8_MUX35)
+#define BP_PXP_WFE_B_STAGE3_MUX8_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX8_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX8_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX8_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX8_MUX34      16
+#define BM_PXP_WFE_B_STAGE3_MUX8_MUX34 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX8_MUX34(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX8_MUX34)
+#define BP_PXP_WFE_B_STAGE3_MUX8_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX8_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX8_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX8_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX8_MUX33      8
+#define BM_PXP_WFE_B_STAGE3_MUX8_MUX33 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX8_MUX33(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX8_MUX33)
+#define BP_PXP_WFE_B_STAGE3_MUX8_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX8_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX8_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX8_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX8_MUX32      0
+#define BM_PXP_WFE_B_STAGE3_MUX8_MUX32 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX8_MUX32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX8_MUX32)
+
+#define HW_PXP_WFE_B_STAGE3_MUX9       (0x00001f40)
+#define HW_PXP_WFE_B_STAGE3_MUX9_SET   (0x00001f44)
+#define HW_PXP_WFE_B_STAGE3_MUX9_CLR   (0x00001f48)
+#define HW_PXP_WFE_B_STAGE3_MUX9_TOG   (0x00001f4c)
+
+#define BP_PXP_WFE_B_STAGE3_MUX9_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX9_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX9_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX9_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX9_MUX39      24
+#define BM_PXP_WFE_B_STAGE3_MUX9_MUX39 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX9_MUX39(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX9_MUX39)
+#define BP_PXP_WFE_B_STAGE3_MUX9_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX9_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX9_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX9_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX9_MUX38      16
+#define BM_PXP_WFE_B_STAGE3_MUX9_MUX38 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX9_MUX38(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX9_MUX38)
+#define BP_PXP_WFE_B_STAGE3_MUX9_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX9_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX9_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX9_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX9_MUX37      8
+#define BM_PXP_WFE_B_STAGE3_MUX9_MUX37 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX9_MUX37(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX9_MUX37)
+#define BP_PXP_WFE_B_STAGE3_MUX9_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX9_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX9_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX9_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX9_MUX36      0
+#define BM_PXP_WFE_B_STAGE3_MUX9_MUX36 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX9_MUX36(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX9_MUX36)
+
+#define HW_PXP_WFE_B_STAGE3_MUX10      (0x00001f50)
+#define HW_PXP_WFE_B_STAGE3_MUX10_SET  (0x00001f54)
+#define HW_PXP_WFE_B_STAGE3_MUX10_CLR  (0x00001f58)
+#define HW_PXP_WFE_B_STAGE3_MUX10_TOG  (0x00001f5c)
+
+#define BP_PXP_WFE_B_STAGE3_MUX10_RSVD0      30
+#define BM_PXP_WFE_B_STAGE3_MUX10_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STAGE3_MUX10_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE3_MUX10_RSVD0)
+#define BP_PXP_WFE_B_STAGE3_MUX10_MUX43      24
+#define BM_PXP_WFE_B_STAGE3_MUX10_MUX43 0x3F000000
+#define BF_PXP_WFE_B_STAGE3_MUX10_MUX43(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE3_MUX10_MUX43)
+#define BP_PXP_WFE_B_STAGE3_MUX10_RSVD1      22
+#define BM_PXP_WFE_B_STAGE3_MUX10_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STAGE3_MUX10_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE3_MUX10_RSVD1)
+#define BP_PXP_WFE_B_STAGE3_MUX10_MUX42      16
+#define BM_PXP_WFE_B_STAGE3_MUX10_MUX42 0x003F0000
+#define BF_PXP_WFE_B_STAGE3_MUX10_MUX42(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE3_MUX10_MUX42)
+#define BP_PXP_WFE_B_STAGE3_MUX10_RSVD2      14
+#define BM_PXP_WFE_B_STAGE3_MUX10_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STAGE3_MUX10_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE3_MUX10_RSVD2)
+#define BP_PXP_WFE_B_STAGE3_MUX10_MUX41      8
+#define BM_PXP_WFE_B_STAGE3_MUX10_MUX41 0x00003F00
+#define BF_PXP_WFE_B_STAGE3_MUX10_MUX41(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE3_MUX10_MUX41)
+#define BP_PXP_WFE_B_STAGE3_MUX10_RSVD3      6
+#define BM_PXP_WFE_B_STAGE3_MUX10_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STAGE3_MUX10_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE3_MUX10_RSVD3)
+#define BP_PXP_WFE_B_STAGE3_MUX10_MUX40      0
+#define BM_PXP_WFE_B_STAGE3_MUX10_MUX40 0x0000003F
+#define BF_PXP_WFE_B_STAGE3_MUX10_MUX40(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE3_MUX10_MUX40)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT0_0   (0x00001f60)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT3      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT3 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT3(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT3)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT2      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT2 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT2)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT1      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT1 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT1)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT0      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT0 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT0_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT0_1   (0x00001f70)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT7      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT7 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT7(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT7)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT6      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT6 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT6)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT5      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT5 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT5)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT4      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT4 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT0_1_LUTOUT4)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT0_2   (0x00001f80)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT11      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT11 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT11(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT11)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT10      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT10 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT10)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT9      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT9 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT9)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT8      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT8 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT0_2_LUTOUT8)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT0_3   (0x00001f90)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT15      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT15 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT15(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT15)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT14      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT14 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT14)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT13      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT13 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT13)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT12      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT12 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT0_3_LUTOUT12)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT0_4   (0x00001fa0)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT19      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT19 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT19(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT19)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT18      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT18 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT18)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT17      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT17 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT17)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT16      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT16 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT0_4_LUTOUT16)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT0_5   (0x00001fb0)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT23      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT23 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT23(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT23)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT22      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT22 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT22)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT21      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT21 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT21)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT20      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT20 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT0_5_LUTOUT20)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT0_6   (0x00001fc0)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT27      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT27 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT27(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT27)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT26      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT26 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT26)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT25      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT25 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT25)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT24      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT24 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT0_6_LUTOUT24)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT0_7   (0x00001fd0)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT31      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT31 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT31(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT31)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT30      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT30 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT30)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT29      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT29 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT29)
+#define BP_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT28      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT28 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT0_7_LUTOUT28)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT1_0   (0x00001fe0)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT3      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT3 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT3(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT3)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT2      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT2 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT2)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT1      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT1 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT1)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT0      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT0 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT1_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT1_1   (0x00001ff0)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT7      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT7 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT7(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT7)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT6      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT6 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT6)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT5      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT5 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT5)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT4      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT4 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT1_1_LUTOUT4)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT1_2   (0x00002000)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT11      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT11 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT11(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT11)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT10      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT10 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT10)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT9      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT9 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT9)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT8      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT8 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT1_2_LUTOUT8)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT1_3   (0x00002010)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT15      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT15 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT15(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT15)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT14      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT14 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT14)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT13      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT13 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT13)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT12      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT12 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT1_3_LUTOUT12)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT1_4   (0x00002020)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT19      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT19 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT19(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT19)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT18      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT18 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT18)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT17      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT17 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT17)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT16      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT16 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT1_4_LUTOUT16)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT1_5   (0x00002030)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT23      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT23 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT23(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT23)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT22      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT22 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT22)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT21      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT21 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT21)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT20      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT20 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT1_5_LUTOUT20)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT1_6   (0x00002040)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT27      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT27 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT27(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT27)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT26      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT26 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT26)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT25      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT25 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT25)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT24      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT24 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT1_6_LUTOUT24)
+
+#define HW_PXP_WFE_B_STG1_5X8_OUT1_7   (0x00002050)
+
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT31      24
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT31 0xFF000000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT31(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT31)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT30      16
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT30 0x00FF0000
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT30)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT29      8
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT29 0x0000FF00
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT29)
+#define BP_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT28      0
+#define BM_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT28 0x000000FF
+#define BF_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X8_OUT1_7_LUTOUT28)
+
+#define HW_PXP_WFE_B_STAGE1_5X8_MASKS_0        (0x00002060)
+
+#define BP_PXP_WFE_B_STAGE1_5X8_MASKS_0_RSVD2      13
+#define BM_PXP_WFE_B_STAGE1_5X8_MASKS_0_RSVD2 0xFFFFE000
+#define BF_PXP_WFE_B_STAGE1_5X8_MASKS_0_RSVD2(v) \
+        (((v) << 13) & BM_PXP_WFE_B_STAGE1_5X8_MASKS_0_RSVD2)
+#define BP_PXP_WFE_B_STAGE1_5X8_MASKS_0_MASK1      8
+#define BM_PXP_WFE_B_STAGE1_5X8_MASKS_0_MASK1 0x00001F00
+#define BF_PXP_WFE_B_STAGE1_5X8_MASKS_0_MASK1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE1_5X8_MASKS_0_MASK1)
+#define BP_PXP_WFE_B_STAGE1_5X8_MASKS_0_RSVD3      5
+#define BM_PXP_WFE_B_STAGE1_5X8_MASKS_0_RSVD3 0x000000E0
+#define BF_PXP_WFE_B_STAGE1_5X8_MASKS_0_RSVD3(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STAGE1_5X8_MASKS_0_RSVD3)
+#define BP_PXP_WFE_B_STAGE1_5X8_MASKS_0_MASK0      0
+#define BM_PXP_WFE_B_STAGE1_5X8_MASKS_0_MASK0 0x0000001F
+#define BF_PXP_WFE_B_STAGE1_5X8_MASKS_0_MASK0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE1_5X8_MASKS_0_MASK0)
+
+#define HW_PXP_WFE_B_STG1_5X1_OUT0     (0x00002070)
+
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT31)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT30)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT29)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT28)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT27)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT26)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT25)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT24)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT23)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT22)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT21)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT20)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT19)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT18)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT17)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT16)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT15)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT14)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT13)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT12)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT11)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT10)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT9)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT8)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT7)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT6)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT5)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT4)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT3)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT2)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT1)
+#define BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X1_OUT0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG1_5X1_MASKS    (0x00002080)
+
+#define BP_PXP_WFE_B_STG1_5X1_MASKS_RSVD0      5
+#define BM_PXP_WFE_B_STG1_5X1_MASKS_RSVD0 0xFFFFFFE0
+#define BF_PXP_WFE_B_STG1_5X1_MASKS_RSVD0(v) \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_5X1_MASKS_RSVD0)
+#define BP_PXP_WFE_B_STG1_5X1_MASKS_MASK0      0
+#define BM_PXP_WFE_B_STG1_5X1_MASKS_MASK0 0x0000001F
+#define BF_PXP_WFE_B_STG1_5X1_MASKS_MASK0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_5X1_MASKS_MASK0)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT0_0   (0x00002090)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT31)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT30)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT29)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT28)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT27)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT26)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT25)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT24)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT23)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT22)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT21)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT20)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT19)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT18)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT17)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT16)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT15)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT14)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT13)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT12)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT11)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT10)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT9)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT8)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT7)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT6)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT5)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT4)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT3)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT2)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT1)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT0_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT0_1   (0x000020a0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT63)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT62)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT61)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT60)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT59)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT58)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT57)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT56)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT55)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT54)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT53)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT52)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT51)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT50)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT49)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT48)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT47)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT46)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT45)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT44)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT43)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT42)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT41)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT40)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT39)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT38)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT37)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT36)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT35)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT34)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT33)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT0_1_LUTOUT32)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT0_2   (0x000020b0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT95)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT94)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT93)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT92)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT91)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT90)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT89)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT88)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT87)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT86)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT85)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT84)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT83)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT82)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT81)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT80)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT79)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT78)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT77)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT76)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT75)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT74)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT73)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT72)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT71)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT70)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT69)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT68)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT67)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT66)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT65)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT0_2_LUTOUT64)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT0_3   (0x000020c0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT127)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT126)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT125)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT124)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT123)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT122)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT121)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT120)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT119)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT118)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT117)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT116)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT115)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT114)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT113)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT112)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT111)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT110)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT109)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT108)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT107)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT106)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT105)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT104)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT103)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT102)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT101)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT100)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT99)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT98)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT97)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT0_3_LUTOUT96)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT0_4   (0x000020d0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT159)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT158)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT157)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT156)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT155)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT154)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT153)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT152)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT151)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT150)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT149)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT148)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT147)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT146)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT145)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT144)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT143)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT142)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT141)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT140)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT139)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT138)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT137)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT136)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT135)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT134)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT133)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT132)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT131)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT130)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT129)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT0_4_LUTOUT128)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT0_5   (0x000020e0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT191)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT190)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT189)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT188)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT187)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT186)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT185)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT184)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT183)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT182)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT181)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT180)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT179)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT178)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT177)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT176)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT175)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT174)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT173)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT172)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT171)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT170)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT169)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT168)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT167)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT166)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT165)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT164)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT163)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT162)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT161)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT0_5_LUTOUT160)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT0_6   (0x000020f0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT223)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT222)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT221)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT220)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT219)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT218)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT217)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT216)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT215)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT214)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT213)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT212)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT211)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT210)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT209)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT208)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT207)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT206)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT205)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT204)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT203)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT202)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT201)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT200)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT199)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT198)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT197)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT196)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT195)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT194)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT193)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT0_6_LUTOUT192)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT0_7   (0x00002100)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT255)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT254)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT253)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT252)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT251)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT250)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT249)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT248)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT247)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT246)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT245)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT244)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT243)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT242)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT241)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT240)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT239)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT238)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT237)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT236)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT235)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT234)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT233)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT232)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT231)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT230)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT229)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT228)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT227)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT226)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT225)
+#define BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT0_7_LUTOUT224)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT1_0   (0x00002110)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT31)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT30)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT29)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT28)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT27)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT26)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT25)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT24)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT23)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT22)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT21)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT20)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT19)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT18)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT17)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT16)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT15)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT14)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT13)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT12)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT11)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT10)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT9)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT8)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT7)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT6)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT5)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT4)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT3)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT2)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT1)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT1_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT1_1   (0x00002120)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT63)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT62)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT61)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT60)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT59)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT58)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT57)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT56)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT55)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT54)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT53)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT52)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT51)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT50)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT49)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT48)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT47)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT46)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT45)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT44)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT43)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT42)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT41)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT40)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT39)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT38)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT37)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT36)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT35)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT34)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT33)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT1_1_LUTOUT32)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT1_2   (0x00002130)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT95)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT94)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT93)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT92)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT91)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT90)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT89)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT88)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT87)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT86)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT85)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT84)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT83)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT82)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT81)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT80)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT79)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT78)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT77)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT76)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT75)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT74)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT73)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT72)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT71)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT70)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT69)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT68)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT67)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT66)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT65)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT1_2_LUTOUT64)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT1_3   (0x00002140)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT127)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT126)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT125)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT124)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT123)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT122)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT121)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT120)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT119)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT118)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT117)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT116)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT115)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT114)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT113)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT112)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT111)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT110)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT109)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT108)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT107)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT106)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT105)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT104)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT103)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT102)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT101)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT100)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT99)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT98)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT97)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT1_3_LUTOUT96)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT1_4   (0x00002150)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT159)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT158)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT157)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT156)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT155)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT154)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT153)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT152)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT151)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT150)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT149)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT148)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT147)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT146)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT145)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT144)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT143)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT142)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT141)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT140)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT139)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT138)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT137)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT136)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT135)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT134)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT133)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT132)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT131)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT130)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT129)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT1_4_LUTOUT128)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT1_5   (0x00002160)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT191)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT190)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT189)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT188)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT187)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT186)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT185)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT184)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT183)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT182)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT181)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT180)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT179)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT178)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT177)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT176)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT175)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT174)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT173)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT172)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT171)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT170)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT169)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT168)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT167)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT166)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT165)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT164)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT163)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT162)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT161)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT1_5_LUTOUT160)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT1_6   (0x00002170)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT223)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT222)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT221)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT220)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT219)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT218)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT217)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT216)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT215)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT214)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT213)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT212)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT211)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT210)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT209)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT208)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT207)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT206)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT205)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT204)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT203)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT202)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT201)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT200)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT199)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT198)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT197)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT196)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT195)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT194)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT193)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT1_6_LUTOUT192)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT1_7   (0x00002180)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT255)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT254)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT253)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT252)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT251)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT250)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT249)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT248)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT247)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT246)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT245)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT244)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT243)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT242)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT241)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT240)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT239)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT238)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT237)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT236)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT235)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT234)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT233)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT232)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT231)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT230)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT229)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT228)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT227)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT226)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT225)
+#define BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT1_7_LUTOUT224)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT2_0   (0x00002190)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT31)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT30)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT29)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT28)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT27)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT26)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT25)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT24)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT23)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT22)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT21)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT20)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT19)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT18)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT17)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT16)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT15)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT14)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT13)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT12)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT11)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT10)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT9)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT8)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT7)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT6)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT5)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT4)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT3)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT2)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT1)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT2_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT2_1   (0x000021a0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT63)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT62)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT61)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT60)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT59)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT58)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT57)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT56)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT55)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT54)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT53)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT52)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT51)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT50)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT49)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT48)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT47)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT46)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT45)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT44)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT43)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT42)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT41)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT40)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT39)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT38)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT37)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT36)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT35)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT34)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT33)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT2_1_LUTOUT32)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT2_2   (0x000021b0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT95)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT94)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT93)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT92)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT91)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT90)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT89)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT88)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT87)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT86)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT85)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT84)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT83)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT82)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT81)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT80)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT79)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT78)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT77)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT76)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT75)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT74)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT73)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT72)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT71)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT70)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT69)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT68)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT67)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT66)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT65)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT2_2_LUTOUT64)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT2_3   (0x000021c0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT127)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT126)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT125)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT124)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT123)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT122)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT121)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT120)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT119)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT118)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT117)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT116)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT115)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT114)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT113)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT112)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT111)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT110)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT109)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT108)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT107)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT106)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT105)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT104)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT103)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT102)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT101)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT100)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT99)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT98)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT97)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT2_3_LUTOUT96)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT2_4   (0x000021d0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT159)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT158)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT157)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT156)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT155)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT154)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT153)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT152)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT151)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT150)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT149)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT148)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT147)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT146)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT145)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT144)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT143)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT142)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT141)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT140)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT139)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT138)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT137)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT136)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT135)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT134)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT133)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT132)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT131)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT130)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT129)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT2_4_LUTOUT128)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT2_5   (0x000021e0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT191)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT190)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT189)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT188)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT187)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT186)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT185)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT184)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT183)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT182)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT181)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT180)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT179)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT178)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT177)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT176)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT175)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT174)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT173)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT172)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT171)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT170)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT169)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT168)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT167)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT166)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT165)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT164)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT163)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT162)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT161)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT2_5_LUTOUT160)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT2_6   (0x000021f0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT223)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT222)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT221)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT220)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT219)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT218)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT217)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT216)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT215)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT214)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT213)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT212)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT211)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT210)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT209)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT208)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT207)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT206)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT205)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT204)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT203)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT202)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT201)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT200)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT199)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT198)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT197)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT196)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT195)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT194)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT193)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT2_6_LUTOUT192)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT2_7   (0x00002200)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT255)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT254)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT253)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT252)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT251)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT250)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT249)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT248)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT247)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT246)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT245)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT244)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT243)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT242)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT241)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT240)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT239)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT238)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT237)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT236)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT235)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT234)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT233)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT232)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT231)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT230)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT229)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT228)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT227)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT226)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT225)
+#define BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT2_7_LUTOUT224)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT3_0   (0x00002210)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT31)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT30)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT29)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT28)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT27)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT26)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT25)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT24)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT23)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT22)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT21)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT20)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT19)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT18)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT17)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT16)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT15)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT14)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT13)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT12)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT11)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT10)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT9)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT8)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT7)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT6)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT5)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT4)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT3)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT2)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT1)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT3_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT3_1   (0x00002220)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT63)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT62)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT61)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT60)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT59)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT58)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT57)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT56)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT55)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT54)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT53)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT52)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT51)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT50)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT49)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT48)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT47)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT46)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT45)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT44)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT43)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT42)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT41)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT40)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT39)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT38)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT37)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT36)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT35)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT34)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT33)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT3_1_LUTOUT32)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT3_2   (0x00002230)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT95)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT94)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT93)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT92)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT91)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT90)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT89)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT88)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT87)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT86)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT85)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT84)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT83)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT82)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT81)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT80)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT79)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT78)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT77)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT76)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT75)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT74)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT73)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT72)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT71)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT70)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT69)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT68)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT67)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT66)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT65)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT3_2_LUTOUT64)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT3_3   (0x00002240)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT127)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT126)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT125)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT124)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT123)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT122)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT121)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT120)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT119)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT118)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT117)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT116)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT115)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT114)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT113)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT112)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT111)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT110)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT109)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT108)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT107)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT106)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT105)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT104)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT103)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT102)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT101)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT100)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT99)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT98)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT97)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT3_3_LUTOUT96)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT3_4   (0x00002250)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT159)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT158)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT157)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT156)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT155)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT154)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT153)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT152)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT151)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT150)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT149)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT148)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT147)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT146)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT145)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT144)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT143)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT142)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT141)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT140)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT139)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT138)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT137)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT136)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT135)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT134)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT133)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT132)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT131)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT130)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT129)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT3_4_LUTOUT128)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT3_5   (0x00002260)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT191)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT190)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT189)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT188)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT187)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT186)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT185)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT184)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT183)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT182)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT181)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT180)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT179)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT178)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT177)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT176)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT175)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT174)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT173)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT172)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT171)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT170)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT169)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT168)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT167)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT166)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT165)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT164)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT163)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT162)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT161)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT3_5_LUTOUT160)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT3_6   (0x00002270)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT223)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT222)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT221)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT220)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT219)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT218)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT217)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT216)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT215)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT214)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT213)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT212)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT211)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT210)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT209)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT208)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT207)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT206)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT205)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT204)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT203)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT202)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT201)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT200)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT199)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT198)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT197)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT196)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT195)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT194)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT193)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT3_6_LUTOUT192)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT3_7   (0x00002280)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT255)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT254)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT253)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT252)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT251)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT250)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT249)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT248)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT247)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT246)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT245)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT244)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT243)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT242)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT241)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT240)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT239)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT238)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT237)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT236)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT235)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT234)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT233)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT232)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT231)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT230)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT229)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT228)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT227)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT226)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT225)
+#define BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT3_7_LUTOUT224)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT4_0   (0x00002290)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT31)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT30)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT29)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT28)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT27)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT26)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT25)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT24)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT23)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT22)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT21)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT20)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT19)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT18)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT17)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT16)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT15)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT14)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT13)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT12)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT11)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT10)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT9)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT8)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT7)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT6)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT5)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT4)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT3)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT2)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT1)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT4_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT4_1   (0x000022a0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT63)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT62)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT61)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT60)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT59)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT58)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT57)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT56)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT55)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT54)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT53)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT52)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT51)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT50)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT49)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT48)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT47)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT46)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT45)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT44)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT43)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT42)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT41)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT40)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT39)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT38)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT37)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT36)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT35)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT34)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT33)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT4_1_LUTOUT32)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT4_2   (0x000022b0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT95)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT94)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT93)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT92)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT91)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT90)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT89)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT88)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT87)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT86)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT85)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT84)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT83)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT82)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT81)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT80)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT79)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT78)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT77)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT76)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT75)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT74)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT73)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT72)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT71)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT70)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT69)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT68)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT67)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT66)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT65)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT4_2_LUTOUT64)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT4_3   (0x000022c0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT127)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT126)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT125)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT124)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT123)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT122)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT121)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT120)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT119)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT118)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT117)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT116)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT115)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT114)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT113)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT112)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT111)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT110)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT109)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT108)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT107)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT106)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT105)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT104)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT103)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT102)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT101)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT100)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT99)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT98)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT97)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT4_3_LUTOUT96)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT4_4   (0x000022d0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT159)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT158)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT157)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT156)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT155)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT154)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT153)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT152)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT151)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT150)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT149)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT148)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT147)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT146)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT145)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT144)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT143)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT142)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT141)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT140)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT139)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT138)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT137)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT136)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT135)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT134)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT133)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT132)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT131)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT130)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT129)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT4_4_LUTOUT128)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT4_5   (0x000022e0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT191)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT190)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT189)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT188)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT187)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT186)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT185)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT184)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT183)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT182)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT181)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT180)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT179)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT178)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT177)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT176)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT175)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT174)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT173)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT172)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT171)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT170)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT169)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT168)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT167)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT166)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT165)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT164)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT163)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT162)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT161)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT4_5_LUTOUT160)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT4_6   (0x000022f0)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT223)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT222)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT221)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT220)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT219)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT218)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT217)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT216)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT215)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT214)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT213)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT212)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT211)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT210)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT209)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT208)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT207)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT206)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT205)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT204)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT203)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT202)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT201)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT200)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT199)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT198)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT197)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT196)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT195)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT194)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT193)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT4_6_LUTOUT192)
+
+#define HW_PXP_WFE_B_STG1_8X1_OUT4_7   (0x00002300)
+
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT255)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT254)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT253)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT252)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT251)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT250)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT249)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT248)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT247)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT246)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT245)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT244)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT243)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT242)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT241)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT240)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT239)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT238)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT237)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT236)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT235)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT234)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT233)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT232)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT231)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT230)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT229)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT228)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT227)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT226)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT225)
+#define BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG1_8X1_OUT4_7_LUTOUT224)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT0_0   (0x00002310)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT3      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT3 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT2      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT2 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT1      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT1 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT0_0_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT0      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT0 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT0_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT0_1   (0x00002320)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT7      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT7 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT7(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT7)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT6      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT6 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT6)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT5      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT5 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT5)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT0_1_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT4      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT4 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT0_1_LUTOUT4)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT0_2   (0x00002330)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT11      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT11 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT11(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT11)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT10      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT10 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT10)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT9      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT9 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT9)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT0_2_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT8      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT8 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT0_2_LUTOUT8)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT0_3   (0x00002340)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT15      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT15 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT15(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT15)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT14      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT14 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT14)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT13      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT13 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT13)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT0_3_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT12      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT12 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT0_3_LUTOUT12)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT0_4   (0x00002350)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT19      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT19 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT19(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT19)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT18      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT18 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT18)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT17      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT17 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT17)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT0_4_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT16      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT16 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT0_4_LUTOUT16)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT0_5   (0x00002360)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT23      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT23 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT23(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT23)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT22      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT22 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT22)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT21      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT21 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT21)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT0_5_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT20      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT20 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT0_5_LUTOUT20)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT0_6   (0x00002370)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT27      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT27 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT27(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT27)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT26      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT26 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT26)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT25      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT25 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT25)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT0_6_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT24      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT24 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT0_6_LUTOUT24)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT0_7   (0x00002380)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT31      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT31 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT31(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT31)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT30      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT30 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT30)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT29      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT29 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT29)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT0_7_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT28      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT28 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT0_7_LUTOUT28)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT1_0   (0x00002390)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT3      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT3 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT2      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT2 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT1      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT1 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT1_0_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT0      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT0 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT1_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT1_1   (0x000023a0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT7      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT7 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT7(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT7)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT6      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT6 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT6)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT5      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT5 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT5)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT1_1_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT4      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT4 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT1_1_LUTOUT4)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT1_2   (0x000023b0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT11      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT11 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT11(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT11)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT10      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT10 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT10)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT9      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT9 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT9)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT1_2_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT8      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT8 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT1_2_LUTOUT8)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT1_3   (0x000023c0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT15      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT15 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT15(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT15)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT14      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT14 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT14)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT13      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT13 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT13)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT1_3_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT12      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT12 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT1_3_LUTOUT12)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT1_4   (0x000023d0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT19      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT19 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT19(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT19)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT18      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT18 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT18)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT17      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT17 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT17)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT1_4_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT16      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT16 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT1_4_LUTOUT16)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT1_5   (0x000023e0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT23      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT23 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT23(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT23)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT22      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT22 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT22)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT21      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT21 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT21)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT1_5_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT20      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT20 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT1_5_LUTOUT20)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT1_6   (0x000023f0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT27      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT27 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT27(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT27)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT26      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT26 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT26)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT25      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT25 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT25)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT1_6_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT24      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT24 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT1_6_LUTOUT24)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT1_7   (0x00002400)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT31      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT31 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT31(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT31)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT30      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT30 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT30)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT29      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT29 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT29)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT1_7_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT28      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT28 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT1_7_LUTOUT28)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT2_0   (0x00002410)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT3      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT3 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT2      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT2 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT1      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT1 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT2_0_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT0      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT0 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT2_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT2_1   (0x00002420)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT7      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT7 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT7(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT7)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT6      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT6 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT6)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT5      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT5 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT5)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT2_1_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT4      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT4 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT2_1_LUTOUT4)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT2_2   (0x00002430)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT11      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT11 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT11(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT11)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT10      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT10 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT10)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT9      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT9 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT9)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT2_2_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT8      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT8 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT2_2_LUTOUT8)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT2_3   (0x00002440)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT15      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT15 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT15(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT15)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT14      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT14 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT14)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT13      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT13 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT13)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT2_3_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT12      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT12 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT2_3_LUTOUT12)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT2_4   (0x00002450)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT19      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT19 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT19(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT19)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT18      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT18 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT18)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT17      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT17 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT17)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT2_4_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT16      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT16 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT2_4_LUTOUT16)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT2_5   (0x00002460)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT23      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT23 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT23(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT23)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT22      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT22 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT22)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT21      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT21 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT21)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT2_5_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT20      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT20 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT2_5_LUTOUT20)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT2_6   (0x00002470)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT27      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT27 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT27(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT27)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT26      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT26 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT26)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT25      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT25 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT25)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT2_6_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT24      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT24 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT2_6_LUTOUT24)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT2_7   (0x00002480)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT31      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT31 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT31(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT31)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT30      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT30 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT30)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT29      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT29 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT29)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT2_7_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT28      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT28 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT2_7_LUTOUT28)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT3_0   (0x00002490)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT3      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT3 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT2      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT2 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT1      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT1 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT3_0_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT0      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT0 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT3_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT3_1   (0x000024a0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT7      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT7 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT7(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT7)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT6      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT6 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT6(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT6)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT5      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT5 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT5(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT5)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT3_1_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT4      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT4 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT4(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT3_1_LUTOUT4)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT3_2   (0x000024b0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT11      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT11 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT11(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT11)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT10      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT10 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT10(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT10)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT9      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT9 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT9(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT9)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT3_2_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT8      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT8 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT8(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT3_2_LUTOUT8)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT3_3   (0x000024c0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT15      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT15 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT15(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT15)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT14      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT14 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT14(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT14)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT13      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT13 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT13(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT13)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT3_3_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT12      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT12 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT12(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT3_3_LUTOUT12)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT3_4   (0x000024e0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT19      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT19 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT19(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT19)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT18      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT18 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT18(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT18)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT17      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT17 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT17(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT17)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT3_4_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT16      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT16 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT16(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT3_4_LUTOUT16)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT3_5   (0x000024f0)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT23      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT23 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT23(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT23)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT22      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT22 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT22(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT22)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT21      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT21 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT21(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT21)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT3_5_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT20      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT20 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT20(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT3_5_LUTOUT20)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT3_6   (0x00002500)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT27      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT27 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT27(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT27)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT26      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT26 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT26(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT26)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT25      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT25 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT25(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT25)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT3_6_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT24      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT24 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT24(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT3_6_LUTOUT24)
+
+#define HW_PXP_WFE_B_STG2_5X6_OUT3_7   (0x00002510)
+
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD0      30
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD0 0xC0000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD0(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT31      24
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT31 0x3F000000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT31(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT31)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD1      22
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD1 0x00C00000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT30      16
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT30 0x003F0000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT30(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT30)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD2      14
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD2 0x0000C000
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD2(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT29      8
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT29 0x00003F00
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT29(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT29)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD3      6
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD3 0x000000C0
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD3(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X6_OUT3_7_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT28      0
+#define BM_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT28 0x0000003F
+#define BF_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT28(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X6_OUT3_7_LUTOUT28)
+
+#define HW_PXP_WFE_B_STAGE2_5X6_MASKS_0        (0x00002520)
+
+#define BP_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD3      29
+#define BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD3 0xE0000000
+#define BF_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD3(v) \
+        (((v) << 29) & BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK3      24
+#define BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK3 0x1F000000
+#define BF_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK3)
+#define BP_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD2      21
+#define BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD2 0x00E00000
+#define BF_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD2(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK2      16
+#define BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK2 0x001F0000
+#define BF_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK2)
+#define BP_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD1      13
+#define BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD1 0x0000E000
+#define BF_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD1(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK1      8
+#define BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK1 0x00001F00
+#define BF_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK1)
+#define BP_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD0      5
+#define BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD0 0x000000E0
+#define BF_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD0(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK0      0
+#define BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK0 0x0000001F
+#define BF_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_5X6_MASKS_0_MASK0)
+
+#define HW_PXP_WFE_B_STAGE2_5X6_ADDR_0 (0x00002530)
+
+#define BP_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD3      30
+#define BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD3 0xC0000000
+#define BF_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD3(v) \
+        (((v) << 30) & BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD3)
+#define BP_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR3      24
+#define BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR3 0x3F000000
+#define BF_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR3)
+#define BP_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD2      22
+#define BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD2 0x00C00000
+#define BF_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD2)
+#define BP_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR2      16
+#define BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR2 0x003F0000
+#define BF_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR2)
+#define BP_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD1      14
+#define BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD1 0x0000C000
+#define BF_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD1)
+#define BP_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR1      8
+#define BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR1 0x00003F00
+#define BF_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR1)
+#define BP_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD0      6
+#define BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD0 0x000000C0
+#define BF_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_RSVD0)
+#define BP_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR0      0
+#define BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR0 0x0000003F
+#define BF_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STAGE2_5X6_ADDR_0_MUXADDR0)
+
+#define HW_PXP_WFE_B_STG2_5X1_OUT0     (0x00002540)
+
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT31)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT30)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT29)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT28)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT27)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT26)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT25)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT24)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT23)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT22)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT21)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT20)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT19)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT18)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT17)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT16)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT15)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT14)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT13)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT12)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT11)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT10)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT9)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT8)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT7)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT6)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT5)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT4)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT3)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT2)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT1)
+#define BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X1_OUT0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG2_5X1_OUT1     (0x00002550)
+
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT31)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT30)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT29)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT28)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT27)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT26)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT25)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT24)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT23)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT22)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT21)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT20)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT19)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT18)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT17)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT16)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT15)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT14)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT13)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT12)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT11)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT10)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT9)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT8)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT7)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT6)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT5)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT4)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT3)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT2)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT1)
+#define BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X1_OUT1_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG2_5X1_OUT2     (0x00002560)
+
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT31)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT30)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT29)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT28)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT27)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT26)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT25)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT24)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT23)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT22)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT21)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT20)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT19)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT18)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT17)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT16)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT15)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT14)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT13)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT12)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT11)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT10)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT9)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT8)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT7)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT6)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT5)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT4)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT3)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT2)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT1)
+#define BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X1_OUT2_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG2_5X1_OUT3     (0x00002570)
+
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT31)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT30)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT29)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT28)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT27)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT26)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT25)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT24)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT23)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT22)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT21)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT20)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT19)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT18)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT17)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT16)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT15)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT14)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT13)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT12)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT11)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT10)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT9)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT8)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT7)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT6)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT5)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT4)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT3)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT2)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT1)
+#define BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X1_OUT3_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG2_5X1_MASKS    (0x00002580)
+
+#define BP_PXP_WFE_B_STG2_5X1_MASKS_RSVD3      29
+#define BM_PXP_WFE_B_STG2_5X1_MASKS_RSVD3 0xE0000000
+#define BF_PXP_WFE_B_STG2_5X1_MASKS_RSVD3(v) \
+        (((v) << 29) & BM_PXP_WFE_B_STG2_5X1_MASKS_RSVD3)
+#define BP_PXP_WFE_B_STG2_5X1_MASKS_MASK3      24
+#define BM_PXP_WFE_B_STG2_5X1_MASKS_MASK3 0x1F000000
+#define BF_PXP_WFE_B_STG2_5X1_MASKS_MASK3(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG2_5X1_MASKS_MASK3)
+#define BP_PXP_WFE_B_STG2_5X1_MASKS_RSVD2      21
+#define BM_PXP_WFE_B_STG2_5X1_MASKS_RSVD2 0x00E00000
+#define BF_PXP_WFE_B_STG2_5X1_MASKS_RSVD2(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG2_5X1_MASKS_RSVD2)
+#define BP_PXP_WFE_B_STG2_5X1_MASKS_MASK2      16
+#define BM_PXP_WFE_B_STG2_5X1_MASKS_MASK2 0x001F0000
+#define BF_PXP_WFE_B_STG2_5X1_MASKS_MASK2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG2_5X1_MASKS_MASK2)
+#define BP_PXP_WFE_B_STG2_5X1_MASKS_RSVD1      13
+#define BM_PXP_WFE_B_STG2_5X1_MASKS_RSVD1 0x0000E000
+#define BF_PXP_WFE_B_STG2_5X1_MASKS_RSVD1(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG2_5X1_MASKS_RSVD1)
+#define BP_PXP_WFE_B_STG2_5X1_MASKS_MASK1      8
+#define BM_PXP_WFE_B_STG2_5X1_MASKS_MASK1 0x00001F00
+#define BF_PXP_WFE_B_STG2_5X1_MASKS_MASK1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG2_5X1_MASKS_MASK1)
+#define BP_PXP_WFE_B_STG2_5X1_MASKS_RSVD0      5
+#define BM_PXP_WFE_B_STG2_5X1_MASKS_RSVD0 0x000000E0
+#define BF_PXP_WFE_B_STG2_5X1_MASKS_RSVD0(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG2_5X1_MASKS_RSVD0)
+#define BP_PXP_WFE_B_STG2_5X1_MASKS_MASK0      0
+#define BM_PXP_WFE_B_STG2_5X1_MASKS_MASK0 0x0000001F
+#define BF_PXP_WFE_B_STG2_5X1_MASKS_MASK0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG2_5X1_MASKS_MASK0)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT0_0  (0x00002590)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT31)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT30)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT29)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT28)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT27)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT26)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT25)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT24)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT23)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT22)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT21)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT20)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT19)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT18)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT17)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT16)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT15)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT14)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT13)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT12)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT11)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT10)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT9)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT8)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT7)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT6)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT5)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT4)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT3)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT2)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT1)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT0_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT0_1  (0x000025a0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT63)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT62)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT61)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT60)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT59)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT58)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT57)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT56)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT55)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT54)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT53)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT52)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT51)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT50)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT49)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT48)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT47)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT46)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT45)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT44)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT43)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT42)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT41)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT40)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT39)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT38)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT37)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT36)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT35)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT34)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT33)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT0_1_LUTOUT32)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT0_2  (0x000025b0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT95)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT94)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT93)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT92)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT91)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT90)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT89)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT88)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT87)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT86)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT85)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT84)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT83)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT82)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT81)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT80)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT79)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT78)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT77)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT76)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT75)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT74)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT73)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT72)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT71)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT70)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT69)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT68)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT67)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT66)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT65)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT0_2_LUTOUT64)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT0_3  (0x000025c0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT127)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT126)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT125)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT124)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT123)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT122)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT121)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT120)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT119)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT118)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT117)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT116)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT115)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT114)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT113)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT112)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT111)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT110)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT109)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT108)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT107)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT106)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT105)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT104)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT103)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT102)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT101)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT100)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT99)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT98)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT97)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT0_3_LUTOUT96)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT0_4  (0x000025d0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT159)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT158)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT157)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT156)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT155)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT154)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT153)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT152)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT151)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT150)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT149)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT148)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT147)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT146)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT145)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT144)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT143)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT142)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT141)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT140)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT139)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT138)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT137)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT136)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT135)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT134)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT133)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT132)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT131)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT130)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT129)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT0_4_LUTOUT128)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT0_5  (0x000025e0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT191)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT190)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT189)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT188)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT187)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT186)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT185)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT184)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT183)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT182)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT181)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT180)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT179)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT178)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT177)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT176)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT175)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT174)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT173)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT172)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT171)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT170)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT169)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT168)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT167)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT166)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT165)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT164)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT163)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT162)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT161)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT0_5_LUTOUT160)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT0_6  (0x000025f0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT223)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT222)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT221)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT220)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT219)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT218)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT217)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT216)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT215)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT214)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT213)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT212)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT211)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT210)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT209)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT208)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT207)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT206)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT205)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT204)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT203)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT202)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT201)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT200)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT199)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT198)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT197)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT196)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT195)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT194)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT193)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT0_6_LUTOUT192)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT0_7  (0x00002600)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT255)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT254)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT253)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT252)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT251)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT250)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT249)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT248)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT247)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT246)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT245)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT244)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT243)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT242)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT241)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT240)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT239)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT238)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT237)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT236)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT235)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT234)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT233)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT232)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT231)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT230)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT229)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT228)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT227)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT226)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT225)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT0_7_LUTOUT224)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT1_0  (0x00002610)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT31)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT30)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT29)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT28)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT27)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT26)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT25)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT24)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT23)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT22)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT21)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT20)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT19)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT18)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT17)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT16)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT15)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT14)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT13)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT12)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT11)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT10)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT9)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT8)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT7)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT6)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT5)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT4)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT3)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT2)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT1)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT1_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT1_1  (0x00002620)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT63)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT62)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT61)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT60)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT59)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT58)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT57)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT56)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT55)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT54)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT53)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT52)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT51)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT50)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT49)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT48)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT47)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT46)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT45)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT44)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT43)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT42)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT41)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT40)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT39)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT38)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT37)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT36)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT35)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT34)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT33)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT1_1_LUTOUT32)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT1_2  (0x00002630)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT95)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT94)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT93)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT92)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT91)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT90)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT89)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT88)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT87)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT86)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT85)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT84)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT83)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT82)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT81)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT80)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT79)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT78)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT77)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT76)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT75)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT74)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT73)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT72)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT71)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT70)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT69)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT68)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT67)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT66)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT65)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT1_2_LUTOUT64)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT1_3  (0x00002640)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT127)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT126)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT125)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT124)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT123)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT122)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT121)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT120)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT119)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT118)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT117)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT116)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT115)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT114)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT113)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT112)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT111)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT110)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT109)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT108)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT107)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT106)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT105)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT104)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT103)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT102)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT101)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT100)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT99)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT98)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT97)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT1_3_LUTOUT96)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT1_4  (0x00002650)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT159)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT158)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT157)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT156)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT155)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT154)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT153)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT152)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT151)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT150)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT149)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT148)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT147)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT146)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT145)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT144)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT143)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT142)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT141)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT140)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT139)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT138)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT137)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT136)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT135)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT134)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT133)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT132)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT131)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT130)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT129)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT1_4_LUTOUT128)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT1_5  (0x00002660)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT191)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT190)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT189)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT188)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT187)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT186)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT185)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT184)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT183)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT182)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT181)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT180)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT179)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT178)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT177)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT176)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT175)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT174)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT173)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT172)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT171)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT170)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT169)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT168)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT167)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT166)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT165)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT164)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT163)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT162)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT161)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT1_5_LUTOUT160)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT1_6  (0x00002670)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT223)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT222)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT221)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT220)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT219)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT218)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT217)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT216)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT215)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT214)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT213)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT212)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT211)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT210)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT209)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT208)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT207)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT206)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT205)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT204)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT203)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT202)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT201)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT200)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT199)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT198)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT197)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT196)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT195)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT194)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT193)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT1_6_LUTOUT192)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT1_7  (0x00002680)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT255)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT254)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT253)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT252)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT251)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT250)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT249)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT248)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT247)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT246)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT245)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT244)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT243)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT242)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT241)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT240)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT239)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT238)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT237)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT236)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT235)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT234)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT233)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT232)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT231)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT230)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT229)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT228)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT227)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT226)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT225)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT1_7_LUTOUT224)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT2_0  (0x00002690)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT31)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT30)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT29)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT28)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT27)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT26)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT25)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT24)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT23)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT22)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT21)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT20)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT19)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT18)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT17)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT16)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT15)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT14)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT13)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT12)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT11)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT10)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT9)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT8)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT7)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT6)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT5)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT4)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT3)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT2)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT1)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT2_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT2_1  (0x000026a0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT63)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT62)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT61)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT60)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT59)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT58)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT57)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT56)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT55)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT54)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT53)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT52)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT51)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT50)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT49)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT48)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT47)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT46)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT45)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT44)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT43)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT42)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT41)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT40)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT39)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT38)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT37)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT36)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT35)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT34)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT33)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT2_1_LUTOUT32)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT2_2  (0x000026b0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT95)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT94)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT93)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT92)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT91)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT90)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT89)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT88)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT87)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT86)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT85)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT84)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT83)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT82)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT81)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT80)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT79)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT78)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT77)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT76)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT75)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT74)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT73)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT72)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT71)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT70)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT69)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT68)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT67)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT66)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT65)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT2_2_LUTOUT64)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT2_3  (0x000026c0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT127)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT126)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT125)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT124)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT123)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT122)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT121)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT120)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT119)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT118)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT117)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT116)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT115)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT114)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT113)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT112)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT111)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT110)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT109)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT108)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT107)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT106)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT105)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT104)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT103)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT102)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT101)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT100)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT99)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT98)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT97)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT2_3_LUTOUT96)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT2_4  (0x000026d0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT159)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT158)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT157)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT156)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT155)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT154)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT153)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT152)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT151)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT150)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT149)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT148)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT147)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT146)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT145)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT144)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT143)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT142)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT141)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT140)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT139)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT138)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT137)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT136)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT135)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT134)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT133)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT132)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT131)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT130)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT129)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT2_4_LUTOUT128)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT2_5  (0x000026e0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT191)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT190)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT189)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT188)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT187)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT186)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT185)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT184)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT183)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT182)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT181)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT180)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT179)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT178)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT177)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT176)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT175)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT174)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT173)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT172)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT171)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT170)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT169)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT168)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT167)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT166)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT165)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT164)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT163)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT162)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT161)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT2_5_LUTOUT160)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT2_6  (0x000026f0)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT223)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT222)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT221)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT220)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT219)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT218)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT217)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT216)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT215)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT214)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT213)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT212)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT211)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT210)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT209)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT208)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT207)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT206)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT205)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT204)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT203)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT202)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT201)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT200)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT199)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT198)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT197)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT196)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT195)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT194)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT193)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT2_6_LUTOUT192)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT2_7  (0x00002700)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT255)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT254)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT253)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT252)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT251)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT250)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT249)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT248)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT247)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT246)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT245)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT244)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT243)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT242)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT241)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT240)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT239)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT238)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT237)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT236)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT235)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT234)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT233)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT232)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT231)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT230)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT229)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT228)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT227)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT226)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT225)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT2_7_LUTOUT224)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT3_0  (0x00002710)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT31 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT31(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT31)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT30 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT30(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT30)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT29 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT29(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT29)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT28 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT28(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT28)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT27 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT27(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT27)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT26 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT26(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT26)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT25 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT25(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT25)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT24 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT24(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT24)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT23 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT23(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT23)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT22 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT22(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT22)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT21 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT21(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT21)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT20 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT20(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT20)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT19 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT19(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT19)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT18 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT18(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT18)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT17 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT17(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT17)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT16 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT16(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT16)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT15 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT15(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT15)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT14 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT14(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT14)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT13 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT13(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT13)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT12 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT12(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT12)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT11 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT11(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT11)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT10 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT10(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT10)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT9 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT9(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT9)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT8 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT8(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT8)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT7 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT7(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT7)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT6 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT6(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT6)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT5 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT5(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT5)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT4 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT4(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT4)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT3 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT3(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT3)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT2 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT2(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT2)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT1 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT1(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT1)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT0 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT3_0_LUTOUT0)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT3_1  (0x00002720)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT63 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT63(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT63)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT62 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT62(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT62)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT61 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT61(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT61)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT60 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT60(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT60)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT59 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT59(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT59)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT58 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT58(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT58)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT57 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT57(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT57)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT56 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT56(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT56)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT55 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT55(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT55)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT54 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT54(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT54)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT53 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT53(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT53)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT52 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT52(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT52)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT51 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT51(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT51)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT50 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT50(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT50)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT49 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT49(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT49)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT48 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT48(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT48)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT47 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT47(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT47)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT46 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT46(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT46)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT45 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT45(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT45)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT44 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT44(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT44)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT43 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT43(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT43)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT42 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT42(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT42)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT41 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT41(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT41)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT40 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT40(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT40)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT39 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT39(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT39)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT38 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT38(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT38)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT37 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT37(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT37)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT36 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT36(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT36)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT35 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT35(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT35)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT34 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT34(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT34)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT33 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT33(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT33)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT32 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT32(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT3_1_LUTOUT32)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT3_2  (0x00002730)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT95 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT95(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT95)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT94 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT94(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT94)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT93 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT93(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT93)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT92 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT92(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT92)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT91 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT91(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT91)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT90 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT90(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT90)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT89 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT89(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT89)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT88 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT88(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT88)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT87 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT87(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT87)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT86 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT86(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT86)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT85 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT85(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT85)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT84 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT84(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT84)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT83 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT83(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT83)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT82 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT82(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT82)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT81 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT81(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT81)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT80 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT80(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT80)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT79 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT79(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT79)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT78 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT78(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT78)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT77 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT77(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT77)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT76 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT76(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT76)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT75 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT75(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT75)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT74 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT74(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT74)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT73 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT73(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT73)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT72 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT72(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT72)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT71 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT71(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT71)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT70 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT70(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT70)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT69 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT69(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT69)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT68 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT68(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT68)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT67 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT67(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT67)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT66 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT66(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT66)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT65 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT65(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT65)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT64 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT64(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT3_2_LUTOUT64)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT3_3  (0x00002740)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT127 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT127(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT127)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT126 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT126(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT126)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT125 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT125(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT125)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT124 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT124(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT124)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT123 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT123(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT123)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT122 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT122(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT122)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT121 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT121(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT121)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT120 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT120(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT120)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT119 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT119(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT119)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT118 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT118(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT118)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT117 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT117(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT117)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT116 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT116(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT116)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT115 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT115(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT115)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT114 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT114(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT114)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT113 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT113(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT113)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT112 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT112(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT112)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT111 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT111(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT111)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT110 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT110(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT110)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT109 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT109(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT109)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT108 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT108(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT108)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT107 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT107(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT107)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT106 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT106(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT106)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT105 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT105(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT105)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT104 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT104(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT104)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT103 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT103(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT103)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT102 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT102(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT102)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT101 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT101(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT101)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT100 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT100(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT100)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT99 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT99(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT99)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT98 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT98(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT98)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT97 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT97(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT97)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT96 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT96(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT3_3_LUTOUT96)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT3_4  (0x00002750)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT159 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT159(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT159)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT158 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT158(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT158)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT157 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT157(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT157)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT156 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT156(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT156)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT155 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT155(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT155)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT154 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT154(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT154)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT153 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT153(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT153)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT152 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT152(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT152)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT151 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT151(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT151)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT150 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT150(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT150)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT149 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT149(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT149)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT148 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT148(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT148)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT147 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT147(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT147)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT146 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT146(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT146)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT145 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT145(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT145)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT144 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT144(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT144)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT143 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT143(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT143)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT142 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT142(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT142)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT141 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT141(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT141)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT140 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT140(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT140)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT139 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT139(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT139)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT138 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT138(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT138)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT137 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT137(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT137)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT136 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT136(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT136)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT135 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT135(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT135)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT134 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT134(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT134)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT133 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT133(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT133)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT132 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT132(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT132)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT131 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT131(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT131)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT130 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT130(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT130)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT129 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT129(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT129)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT128 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT128(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT3_4_LUTOUT128)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT3_5  (0x00002760)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT191 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT191(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT191)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT190 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT190(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT190)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT189 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT189(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT189)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT188 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT188(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT188)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT187 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT187(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT187)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT186 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT186(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT186)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT185 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT185(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT185)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT184 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT184(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT184)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT183 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT183(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT183)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT182 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT182(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT182)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT181 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT181(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT181)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT180 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT180(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT180)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT179 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT179(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT179)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT178 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT178(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT178)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT177 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT177(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT177)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT176 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT176(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT176)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT175 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT175(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT175)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT174 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT174(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT174)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT173 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT173(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT173)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT172 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT172(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT172)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT171 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT171(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT171)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT170 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT170(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT170)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT169 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT169(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT169)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT168 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT168(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT168)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT167 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT167(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT167)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT166 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT166(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT166)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT165 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT165(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT165)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT164 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT164(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT164)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT163 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT163(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT163)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT162 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT162(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT162)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT161 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT161(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT161)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT160 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT160(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT3_5_LUTOUT160)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT3_6  (0x00002770)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT223 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT223(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT223)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT222 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT222(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT222)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT221 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT221(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT221)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT220 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT220(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT220)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT219 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT219(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT219)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT218 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT218(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT218)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT217 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT217(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT217)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT216 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT216(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT216)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT215 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT215(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT215)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT214 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT214(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT214)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT213 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT213(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT213)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT212 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT212(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT212)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT211 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT211(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT211)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT210 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT210(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT210)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT209 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT209(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT209)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT208 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT208(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT208)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT207 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT207(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT207)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT206 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT206(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT206)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT205 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT205(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT205)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT204 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT204(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT204)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT203 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT203(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT203)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT202 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT202(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT202)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT201 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT201(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT201)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT200 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT200(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT200)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT199 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT199(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT199)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT198 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT198(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT198)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT197 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT197(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT197)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT196 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT196(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT196)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT195 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT195(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT195)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT194 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT194(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT194)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT193 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT193(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT193)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT192 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT192(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT3_6_LUTOUT192)
+
+#define HW_PXP_WFE_B_STG3_F8X1_OUT3_7  (0x00002780)
+
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT255 0x80000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT255(v) \
+        (((v) << 31) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT255)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT254 0x40000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT254(v)  \
+        (((v) << 30) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT254)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT253 0x20000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT253(v)  \
+        (((v) << 29) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT253)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT252 0x10000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT252(v)  \
+        (((v) << 28) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT252)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT251 0x08000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT251(v)  \
+        (((v) << 27) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT251)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT250 0x04000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT250(v)  \
+        (((v) << 26) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT250)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT249 0x02000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT249(v)  \
+        (((v) << 25) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT249)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT248 0x01000000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT248(v)  \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT248)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT247 0x00800000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT247(v)  \
+        (((v) << 23) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT247)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT246 0x00400000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT246(v)  \
+        (((v) << 22) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT246)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT245 0x00200000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT245(v)  \
+        (((v) << 21) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT245)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT244 0x00100000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT244(v)  \
+        (((v) << 20) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT244)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT243 0x00080000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT243(v)  \
+        (((v) << 19) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT243)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT242 0x00040000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT242(v)  \
+        (((v) << 18) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT242)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT241 0x00020000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT241(v)  \
+        (((v) << 17) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT241)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT240 0x00010000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT240(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT240)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT239 0x00008000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT239(v)  \
+        (((v) << 15) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT239)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT238 0x00004000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT238(v)  \
+        (((v) << 14) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT238)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT237 0x00002000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT237(v)  \
+        (((v) << 13) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT237)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT236 0x00001000
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT236(v)  \
+        (((v) << 12) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT236)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT235 0x00000800
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT235(v)  \
+        (((v) << 11) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT235)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT234 0x00000400
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT234(v)  \
+        (((v) << 10) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT234)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT233 0x00000200
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT233(v)  \
+        (((v) << 9) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT233)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT232 0x00000100
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT232(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT232)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT231 0x00000080
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT231(v)  \
+        (((v) << 7) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT231)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT230 0x00000040
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT230(v)  \
+        (((v) << 6) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT230)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT229 0x00000020
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT229(v)  \
+        (((v) << 5) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT229)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT228 0x00000010
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT228(v)  \
+        (((v) << 4) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT228)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT227 0x00000008
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT227(v)  \
+        (((v) << 3) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT227)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT226 0x00000004
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT226(v)  \
+        (((v) << 2) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT226)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT225 0x00000002
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT225(v)  \
+        (((v) << 1) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT225)
+#define BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT224 0x00000001
+#define BF_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT224(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_OUT3_7_LUTOUT224)
+
+#define HW_PXP_WFE_B_STG3_F8X1_MASKS   (0x00002790)
+
+#define BP_PXP_WFE_B_STG3_F8X1_MASKS_MASK3      24
+#define BM_PXP_WFE_B_STG3_F8X1_MASKS_MASK3 0xFF000000
+#define BF_PXP_WFE_B_STG3_F8X1_MASKS_MASK3(v) \
+        (((v) << 24) & BM_PXP_WFE_B_STG3_F8X1_MASKS_MASK3)
+#define BP_PXP_WFE_B_STG3_F8X1_MASKS_MASK2      16
+#define BM_PXP_WFE_B_STG3_F8X1_MASKS_MASK2 0x00FF0000
+#define BF_PXP_WFE_B_STG3_F8X1_MASKS_MASK2(v)  \
+        (((v) << 16) & BM_PXP_WFE_B_STG3_F8X1_MASKS_MASK2)
+#define BP_PXP_WFE_B_STG3_F8X1_MASKS_MASK1      8
+#define BM_PXP_WFE_B_STG3_F8X1_MASKS_MASK1 0x0000FF00
+#define BF_PXP_WFE_B_STG3_F8X1_MASKS_MASK1(v)  \
+        (((v) << 8) & BM_PXP_WFE_B_STG3_F8X1_MASKS_MASK1)
+#define BP_PXP_WFE_B_STG3_F8X1_MASKS_MASK0      0
+#define BM_PXP_WFE_B_STG3_F8X1_MASKS_MASK0 0x000000FF
+#define BF_PXP_WFE_B_STG3_F8X1_MASKS_MASK0(v)  \
+        (((v) << 0) & BM_PXP_WFE_B_STG3_F8X1_MASKS_MASK0)
+
+#define HW_PXP_ALU_A_CTRL      (0x00002810)
+#define HW_PXP_ALU_A_CTRL_SET  (0x00002814)
+#define HW_PXP_ALU_A_CTRL_CLR  (0x00002818)
+#define HW_PXP_ALU_A_CTRL_TOG  (0x0000281c)
+
+#define BP_PXP_ALU_A_CTRL_RSVD0      29
+#define BM_PXP_ALU_A_CTRL_RSVD0 0xE0000000
+#define BF_PXP_ALU_A_CTRL_RSVD0(v) \
+        (((v) << 29) & BM_PXP_ALU_A_CTRL_RSVD0)
+#define BM_PXP_ALU_A_CTRL_DONE 0x10000000
+#define BF_PXP_ALU_A_CTRL_DONE(v)  \
+        (((v) << 28) & BM_PXP_ALU_A_CTRL_DONE)
+#define BP_PXP_ALU_A_CTRL_RSVD1      21
+#define BM_PXP_ALU_A_CTRL_RSVD1 0x0FE00000
+#define BF_PXP_ALU_A_CTRL_RSVD1(v)  \
+        (((v) << 21) & BM_PXP_ALU_A_CTRL_RSVD1)
+#define BM_PXP_ALU_A_CTRL_DONE_IRQ_EN 0x00100000
+#define BF_PXP_ALU_A_CTRL_DONE_IRQ_EN(v)  \
+        (((v) << 20) & BM_PXP_ALU_A_CTRL_DONE_IRQ_EN)
+#define BP_PXP_ALU_A_CTRL_RSVD2      17
+#define BM_PXP_ALU_A_CTRL_RSVD2 0x000E0000
+#define BF_PXP_ALU_A_CTRL_RSVD2(v)  \
+        (((v) << 17) & BM_PXP_ALU_A_CTRL_RSVD2)
+#define BM_PXP_ALU_A_CTRL_DONE_IRQ_FLAG 0x00010000
+#define BF_PXP_ALU_A_CTRL_DONE_IRQ_FLAG(v)  \
+        (((v) << 16) & BM_PXP_ALU_A_CTRL_DONE_IRQ_FLAG)
+#define BP_PXP_ALU_A_CTRL_RSVD3      13
+#define BM_PXP_ALU_A_CTRL_RSVD3 0x0000E000
+#define BF_PXP_ALU_A_CTRL_RSVD3(v)  \
+        (((v) << 13) & BM_PXP_ALU_A_CTRL_RSVD3)
+#define BM_PXP_ALU_A_CTRL_BYPASS 0x00001000
+#define BF_PXP_ALU_A_CTRL_BYPASS(v)  \
+        (((v) << 12) & BM_PXP_ALU_A_CTRL_BYPASS)
+#define BV_PXP_ALU_A_CTRL_BYPASS__0 0x0
+#define BV_PXP_ALU_A_CTRL_BYPASS__1 0x1
+#define BP_PXP_ALU_A_CTRL_RSVD4      9
+#define BM_PXP_ALU_A_CTRL_RSVD4 0x00000E00
+#define BF_PXP_ALU_A_CTRL_RSVD4(v)  \
+        (((v) << 9) & BM_PXP_ALU_A_CTRL_RSVD4)
+#define BM_PXP_ALU_A_CTRL_SW_RESET 0x00000100
+#define BF_PXP_ALU_A_CTRL_SW_RESET(v)  \
+        (((v) << 8) & BM_PXP_ALU_A_CTRL_SW_RESET)
+#define BP_PXP_ALU_A_CTRL_RSVD5      5
+#define BM_PXP_ALU_A_CTRL_RSVD5 0x000000E0
+#define BF_PXP_ALU_A_CTRL_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_ALU_A_CTRL_RSVD5)
+#define BM_PXP_ALU_A_CTRL_START 0x00000010
+#define BF_PXP_ALU_A_CTRL_START(v)  \
+        (((v) << 4) & BM_PXP_ALU_A_CTRL_START)
+#define BP_PXP_ALU_A_CTRL_RSVD6      1
+#define BM_PXP_ALU_A_CTRL_RSVD6 0x0000000E
+#define BF_PXP_ALU_A_CTRL_RSVD6(v)  \
+        (((v) << 1) & BM_PXP_ALU_A_CTRL_RSVD6)
+#define BM_PXP_ALU_A_CTRL_ENABLE 0x00000001
+#define BF_PXP_ALU_A_CTRL_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_ALU_A_CTRL_ENABLE)
+#define BV_PXP_ALU_A_CTRL_ENABLE__0 0x0
+#define BV_PXP_ALU_A_CTRL_ENABLE__1 0x1
+
+#define HW_PXP_ALU_A_BUF_SIZE  (0x00002820)
+
+#define BP_PXP_ALU_A_BUF_SIZE_RSVD0      28
+#define BM_PXP_ALU_A_BUF_SIZE_RSVD0 0xF0000000
+#define BF_PXP_ALU_A_BUF_SIZE_RSVD0(v) \
+        (((v) << 28) & BM_PXP_ALU_A_BUF_SIZE_RSVD0)
+#define BP_PXP_ALU_A_BUF_SIZE_BUF_HEIGHT      16
+#define BM_PXP_ALU_A_BUF_SIZE_BUF_HEIGHT 0x0FFF0000
+#define BF_PXP_ALU_A_BUF_SIZE_BUF_HEIGHT(v)  \
+        (((v) << 16) & BM_PXP_ALU_A_BUF_SIZE_BUF_HEIGHT)
+#define BP_PXP_ALU_A_BUF_SIZE_RSVD1      12
+#define BM_PXP_ALU_A_BUF_SIZE_RSVD1 0x0000F000
+#define BF_PXP_ALU_A_BUF_SIZE_RSVD1(v)  \
+        (((v) << 12) & BM_PXP_ALU_A_BUF_SIZE_RSVD1)
+#define BP_PXP_ALU_A_BUF_SIZE_BUF_WIDTH      0
+#define BM_PXP_ALU_A_BUF_SIZE_BUF_WIDTH 0x00000FFF
+#define BF_PXP_ALU_A_BUF_SIZE_BUF_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_ALU_A_BUF_SIZE_BUF_WIDTH)
+
+#define HW_PXP_ALU_A_INST_ENTRY        (0x00002830)
+
+#define BP_PXP_ALU_A_INST_ENTRY_RSVD0      16
+#define BM_PXP_ALU_A_INST_ENTRY_RSVD0 0xFFFF0000
+#define BF_PXP_ALU_A_INST_ENTRY_RSVD0(v) \
+        (((v) << 16) & BM_PXP_ALU_A_INST_ENTRY_RSVD0)
+#define BP_PXP_ALU_A_INST_ENTRY_ENTRY_ADDR      0
+#define BM_PXP_ALU_A_INST_ENTRY_ENTRY_ADDR 0x0000FFFF
+#define BF_PXP_ALU_A_INST_ENTRY_ENTRY_ADDR(v)  \
+        (((v) << 0) & BM_PXP_ALU_A_INST_ENTRY_ENTRY_ADDR)
+
+#define HW_PXP_ALU_A_PARAM     (0x00002840)
+
+#define BP_PXP_ALU_A_PARAM_RSVD0      16
+#define BM_PXP_ALU_A_PARAM_RSVD0 0xFFFF0000
+#define BF_PXP_ALU_A_PARAM_RSVD0(v) \
+        (((v) << 16) & BM_PXP_ALU_A_PARAM_RSVD0)
+#define BP_PXP_ALU_A_PARAM_PARAM1      8
+#define BM_PXP_ALU_A_PARAM_PARAM1 0x0000FF00
+#define BF_PXP_ALU_A_PARAM_PARAM1(v)  \
+        (((v) << 8) & BM_PXP_ALU_A_PARAM_PARAM1)
+#define BP_PXP_ALU_A_PARAM_PARAM0      0
+#define BM_PXP_ALU_A_PARAM_PARAM0 0x000000FF
+#define BF_PXP_ALU_A_PARAM_PARAM0(v)  \
+        (((v) << 0) & BM_PXP_ALU_A_PARAM_PARAM0)
+
+#define HW_PXP_ALU_A_CONFIG    (0x00002850)
+
+#define BP_PXP_ALU_A_CONFIG_BUF_ADDR      0
+#define BM_PXP_ALU_A_CONFIG_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_ALU_A_CONFIG_BUF_ADDR(v)   (v)
+
+#define HW_PXP_ALU_A_LUT_CONFIG        (0x00002860)
+#define HW_PXP_ALU_A_LUT_CONFIG_SET    (0x00002864)
+#define HW_PXP_ALU_A_LUT_CONFIG_CLR    (0x00002868)
+#define HW_PXP_ALU_A_LUT_CONFIG_TOG    (0x0000286c)
+
+#define BP_PXP_ALU_A_LUT_CONFIG_RSVD0      6
+#define BM_PXP_ALU_A_LUT_CONFIG_RSVD0 0xFFFFFFC0
+#define BF_PXP_ALU_A_LUT_CONFIG_RSVD0(v) \
+        (((v) << 6) & BM_PXP_ALU_A_LUT_CONFIG_RSVD0)
+#define BP_PXP_ALU_A_LUT_CONFIG_MODE      4
+#define BM_PXP_ALU_A_LUT_CONFIG_MODE 0x00000030
+#define BF_PXP_ALU_A_LUT_CONFIG_MODE(v)  \
+        (((v) << 4) & BM_PXP_ALU_A_LUT_CONFIG_MODE)
+#define BV_PXP_ALU_A_LUT_CONFIG_MODE__0 0x0
+#define BV_PXP_ALU_A_LUT_CONFIG_MODE__1 0x1
+#define BV_PXP_ALU_A_LUT_CONFIG_MODE__2 0x2
+#define BV_PXP_ALU_A_LUT_CONFIG_MODE__3 0x3
+#define BP_PXP_ALU_A_LUT_CONFIG_RSVD1      1
+#define BM_PXP_ALU_A_LUT_CONFIG_RSVD1 0x0000000E
+#define BF_PXP_ALU_A_LUT_CONFIG_RSVD1(v)  \
+        (((v) << 1) & BM_PXP_ALU_A_LUT_CONFIG_RSVD1)
+#define BM_PXP_ALU_A_LUT_CONFIG_EN 0x00000001
+#define BF_PXP_ALU_A_LUT_CONFIG_EN(v)  \
+        (((v) << 0) & BM_PXP_ALU_A_LUT_CONFIG_EN)
+
+#define HW_PXP_ALU_A_LUT_DATA0 (0x00002870)
+
+#define BP_PXP_ALU_A_LUT_DATA0_LUT_DATA_L      0
+#define BM_PXP_ALU_A_LUT_DATA0_LUT_DATA_L 0xFFFFFFFF
+#define BF_PXP_ALU_A_LUT_DATA0_LUT_DATA_L(v)   (v)
+
+#define HW_PXP_ALU_A_LUT_DATA1 (0x00002880)
+
+#define BP_PXP_ALU_A_LUT_DATA1_LUT_DATA_H      0
+#define BM_PXP_ALU_A_LUT_DATA1_LUT_DATA_H 0xFFFFFFFF
+#define BF_PXP_ALU_A_LUT_DATA1_LUT_DATA_H(v)   (v)
+
+#define HW_PXP_ALU_A_DBG       (0x00002890)
+
+#define BP_PXP_ALU_A_DBG_DEBUG_SEL      24
+#define BM_PXP_ALU_A_DBG_DEBUG_SEL 0xFF000000
+#define BF_PXP_ALU_A_DBG_DEBUG_SEL(v) \
+        (((v) << 24) & BM_PXP_ALU_A_DBG_DEBUG_SEL)
+#define BP_PXP_ALU_A_DBG_DEBUG_VALUE      0
+#define BM_PXP_ALU_A_DBG_DEBUG_VALUE 0x00FFFFFF
+#define BF_PXP_ALU_A_DBG_DEBUG_VALUE(v)  \
+        (((v) << 0) & BM_PXP_ALU_A_DBG_DEBUG_VALUE)
+
+#define HW_PXP_ALU_B_CTRL      (0x000028a0)
+#define HW_PXP_ALU_B_CTRL_SET  (0x000028a4)
+#define HW_PXP_ALU_B_CTRL_CLR  (0x000028a8)
+#define HW_PXP_ALU_B_CTRL_TOG  (0x000028ac)
+
+#define BP_PXP_ALU_B_CTRL_RSVD0      29
+#define BM_PXP_ALU_B_CTRL_RSVD0 0xE0000000
+#define BF_PXP_ALU_B_CTRL_RSVD0(v) \
+        (((v) << 29) & BM_PXP_ALU_B_CTRL_RSVD0)
+#define BM_PXP_ALU_B_CTRL_DONE 0x10000000
+#define BF_PXP_ALU_B_CTRL_DONE(v)  \
+        (((v) << 28) & BM_PXP_ALU_B_CTRL_DONE)
+#define BP_PXP_ALU_B_CTRL_RSVD1      21
+#define BM_PXP_ALU_B_CTRL_RSVD1 0x0FE00000
+#define BF_PXP_ALU_B_CTRL_RSVD1(v)  \
+        (((v) << 21) & BM_PXP_ALU_B_CTRL_RSVD1)
+#define BM_PXP_ALU_B_CTRL_DONE_IRQ_EN 0x00100000
+#define BF_PXP_ALU_B_CTRL_DONE_IRQ_EN(v)  \
+        (((v) << 20) & BM_PXP_ALU_B_CTRL_DONE_IRQ_EN)
+#define BP_PXP_ALU_B_CTRL_RSVD2      17
+#define BM_PXP_ALU_B_CTRL_RSVD2 0x000E0000
+#define BF_PXP_ALU_B_CTRL_RSVD2(v)  \
+        (((v) << 17) & BM_PXP_ALU_B_CTRL_RSVD2)
+#define BM_PXP_ALU_B_CTRL_DONE_IRQ_FLAG 0x00010000
+#define BF_PXP_ALU_B_CTRL_DONE_IRQ_FLAG(v)  \
+        (((v) << 16) & BM_PXP_ALU_B_CTRL_DONE_IRQ_FLAG)
+#define BP_PXP_ALU_B_CTRL_RSVD3      13
+#define BM_PXP_ALU_B_CTRL_RSVD3 0x0000E000
+#define BF_PXP_ALU_B_CTRL_RSVD3(v)  \
+        (((v) << 13) & BM_PXP_ALU_B_CTRL_RSVD3)
+#define BM_PXP_ALU_B_CTRL_BYPASS 0x00001000
+#define BF_PXP_ALU_B_CTRL_BYPASS(v)  \
+        (((v) << 12) & BM_PXP_ALU_B_CTRL_BYPASS)
+#define BV_PXP_ALU_B_CTRL_BYPASS__0 0x0
+#define BV_PXP_ALU_B_CTRL_BYPASS__1 0x1
+#define BP_PXP_ALU_B_CTRL_RSVD4      9
+#define BM_PXP_ALU_B_CTRL_RSVD4 0x00000E00
+#define BF_PXP_ALU_B_CTRL_RSVD4(v)  \
+        (((v) << 9) & BM_PXP_ALU_B_CTRL_RSVD4)
+#define BM_PXP_ALU_B_CTRL_SW_RESET 0x00000100
+#define BF_PXP_ALU_B_CTRL_SW_RESET(v)  \
+        (((v) << 8) & BM_PXP_ALU_B_CTRL_SW_RESET)
+#define BP_PXP_ALU_B_CTRL_RSVD5      5
+#define BM_PXP_ALU_B_CTRL_RSVD5 0x000000E0
+#define BF_PXP_ALU_B_CTRL_RSVD5(v)  \
+        (((v) << 5) & BM_PXP_ALU_B_CTRL_RSVD5)
+#define BM_PXP_ALU_B_CTRL_START 0x00000010
+#define BF_PXP_ALU_B_CTRL_START(v)  \
+        (((v) << 4) & BM_PXP_ALU_B_CTRL_START)
+#define BP_PXP_ALU_B_CTRL_RSVD6      1
+#define BM_PXP_ALU_B_CTRL_RSVD6 0x0000000E
+#define BF_PXP_ALU_B_CTRL_RSVD6(v)  \
+        (((v) << 1) & BM_PXP_ALU_B_CTRL_RSVD6)
+#define BM_PXP_ALU_B_CTRL_ENABLE 0x00000001
+#define BF_PXP_ALU_B_CTRL_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_ALU_B_CTRL_ENABLE)
+#define BV_PXP_ALU_B_CTRL_ENABLE__0 0x0
+#define BV_PXP_ALU_B_CTRL_ENABLE__1 0x1
+
+#define HW_PXP_ALU_B_BUF_SIZE  (0x000028b0)
+
+#define BP_PXP_ALU_B_BUF_SIZE_RSVD0      28
+#define BM_PXP_ALU_B_BUF_SIZE_RSVD0 0xF0000000
+#define BF_PXP_ALU_B_BUF_SIZE_RSVD0(v) \
+        (((v) << 28) & BM_PXP_ALU_B_BUF_SIZE_RSVD0)
+#define BP_PXP_ALU_B_BUF_SIZE_BUF_HEIGHT      16
+#define BM_PXP_ALU_B_BUF_SIZE_BUF_HEIGHT 0x0FFF0000
+#define BF_PXP_ALU_B_BUF_SIZE_BUF_HEIGHT(v)  \
+        (((v) << 16) & BM_PXP_ALU_B_BUF_SIZE_BUF_HEIGHT)
+#define BP_PXP_ALU_B_BUF_SIZE_RSVD1      12
+#define BM_PXP_ALU_B_BUF_SIZE_RSVD1 0x0000F000
+#define BF_PXP_ALU_B_BUF_SIZE_RSVD1(v)  \
+        (((v) << 12) & BM_PXP_ALU_B_BUF_SIZE_RSVD1)
+#define BP_PXP_ALU_B_BUF_SIZE_BUF_WIDTH      0
+#define BM_PXP_ALU_B_BUF_SIZE_BUF_WIDTH 0x00000FFF
+#define BF_PXP_ALU_B_BUF_SIZE_BUF_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_ALU_B_BUF_SIZE_BUF_WIDTH)
+
+#define HW_PXP_ALU_B_INST_ENTRY        (0x000028c0)
+
+#define BP_PXP_ALU_B_INST_ENTRY_RSVD0      16
+#define BM_PXP_ALU_B_INST_ENTRY_RSVD0 0xFFFF0000
+#define BF_PXP_ALU_B_INST_ENTRY_RSVD0(v) \
+        (((v) << 16) & BM_PXP_ALU_B_INST_ENTRY_RSVD0)
+#define BP_PXP_ALU_B_INST_ENTRY_ENTRY_ADDR      0
+#define BM_PXP_ALU_B_INST_ENTRY_ENTRY_ADDR 0x0000FFFF
+#define BF_PXP_ALU_B_INST_ENTRY_ENTRY_ADDR(v)  \
+        (((v) << 0) & BM_PXP_ALU_B_INST_ENTRY_ENTRY_ADDR)
+
+#define HW_PXP_ALU_B_PARAM     (0x000028d0)
+
+#define BP_PXP_ALU_B_PARAM_RSVD0      16
+#define BM_PXP_ALU_B_PARAM_RSVD0 0xFFFF0000
+#define BF_PXP_ALU_B_PARAM_RSVD0(v) \
+        (((v) << 16) & BM_PXP_ALU_B_PARAM_RSVD0)
+#define BP_PXP_ALU_B_PARAM_PARAM1      8
+#define BM_PXP_ALU_B_PARAM_PARAM1 0x0000FF00
+#define BF_PXP_ALU_B_PARAM_PARAM1(v)  \
+        (((v) << 8) & BM_PXP_ALU_B_PARAM_PARAM1)
+#define BP_PXP_ALU_B_PARAM_PARAM0      0
+#define BM_PXP_ALU_B_PARAM_PARAM0 0x000000FF
+#define BF_PXP_ALU_B_PARAM_PARAM0(v)  \
+        (((v) << 0) & BM_PXP_ALU_B_PARAM_PARAM0)
+
+#define HW_PXP_ALU_B_CONFIG    (0x000028e0)
+
+#define BP_PXP_ALU_B_CONFIG_BUF_ADDR      0
+#define BM_PXP_ALU_B_CONFIG_BUF_ADDR 0xFFFFFFFF
+#define BF_PXP_ALU_B_CONFIG_BUF_ADDR(v)   (v)
+
+#define HW_PXP_ALU_B_LUT_CONFIG        (0x000028f0)
+#define HW_PXP_ALU_B_LUT_CONFIG_SET    (0x000028f4)
+#define HW_PXP_ALU_B_LUT_CONFIG_CLR    (0x000028f8)
+#define HW_PXP_ALU_B_LUT_CONFIG_TOG    (0x000028fc)
+
+#define BP_PXP_ALU_B_LUT_CONFIG_RSVD0      6
+#define BM_PXP_ALU_B_LUT_CONFIG_RSVD0 0xFFFFFFC0
+#define BF_PXP_ALU_B_LUT_CONFIG_RSVD0(v) \
+        (((v) << 6) & BM_PXP_ALU_B_LUT_CONFIG_RSVD0)
+#define BP_PXP_ALU_B_LUT_CONFIG_MODE      4
+#define BM_PXP_ALU_B_LUT_CONFIG_MODE 0x00000030
+#define BF_PXP_ALU_B_LUT_CONFIG_MODE(v)  \
+        (((v) << 4) & BM_PXP_ALU_B_LUT_CONFIG_MODE)
+#define BV_PXP_ALU_B_LUT_CONFIG_MODE__0 0x0
+#define BV_PXP_ALU_B_LUT_CONFIG_MODE__1 0x1
+#define BV_PXP_ALU_B_LUT_CONFIG_MODE__2 0x2
+#define BV_PXP_ALU_B_LUT_CONFIG_MODE__3 0x3
+#define BP_PXP_ALU_B_LUT_CONFIG_RSVD1      1
+#define BM_PXP_ALU_B_LUT_CONFIG_RSVD1 0x0000000E
+#define BF_PXP_ALU_B_LUT_CONFIG_RSVD1(v)  \
+        (((v) << 1) & BM_PXP_ALU_B_LUT_CONFIG_RSVD1)
+#define BM_PXP_ALU_B_LUT_CONFIG_EN 0x00000001
+#define BF_PXP_ALU_B_LUT_CONFIG_EN(v)  \
+        (((v) << 0) & BM_PXP_ALU_B_LUT_CONFIG_EN)
+
+#define HW_PXP_ALU_B_LUT_DATA0 (0x00002900)
+
+#define BP_PXP_ALU_B_LUT_DATA0_LUT_DATA_L      0
+#define BM_PXP_ALU_B_LUT_DATA0_LUT_DATA_L 0xFFFFFFFF
+#define BF_PXP_ALU_B_LUT_DATA0_LUT_DATA_L(v)   (v)
+
+#define HW_PXP_ALU_B_LUT_DATA1 (0x00002910)
+
+#define BP_PXP_ALU_B_LUT_DATA1_LUT_DATA_H      0
+#define BM_PXP_ALU_B_LUT_DATA1_LUT_DATA_H 0xFFFFFFFF
+#define BF_PXP_ALU_B_LUT_DATA1_LUT_DATA_H(v)   (v)
+
+#define HW_PXP_ALU_B_DBG       (0x00002920)
+
+#define BP_PXP_ALU_B_DBG_DEBUG_SEL      24
+#define BM_PXP_ALU_B_DBG_DEBUG_SEL 0xFF000000
+#define BF_PXP_ALU_B_DBG_DEBUG_SEL(v) \
+        (((v) << 24) & BM_PXP_ALU_B_DBG_DEBUG_SEL)
+#define BP_PXP_ALU_B_DBG_DEBUG_VALUE      0
+#define BM_PXP_ALU_B_DBG_DEBUG_VALUE 0x00FFFFFF
+#define BF_PXP_ALU_B_DBG_DEBUG_VALUE(v)  \
+        (((v) << 0) & BM_PXP_ALU_B_DBG_DEBUG_VALUE)
+
+#define HW_PXP_HIST_A_CTRL     (0x00002a00)
+
+#define BP_PXP_HIST_A_CTRL_RSVD4      27
+#define BM_PXP_HIST_A_CTRL_RSVD4 0xF8000000
+#define BF_PXP_HIST_A_CTRL_RSVD4(v) \
+        (((v) << 27) & BM_PXP_HIST_A_CTRL_RSVD4)
+#define BP_PXP_HIST_A_CTRL_PIXEL_WIDTH      24
+#define BM_PXP_HIST_A_CTRL_PIXEL_WIDTH 0x07000000
+#define BF_PXP_HIST_A_CTRL_PIXEL_WIDTH(v)  \
+        (((v) << 24) & BM_PXP_HIST_A_CTRL_PIXEL_WIDTH)
+#define BM_PXP_HIST_A_CTRL_RSVD3 0x00800000
+#define BF_PXP_HIST_A_CTRL_RSVD3(v)  \
+        (((v) << 23) & BM_PXP_HIST_A_CTRL_RSVD3)
+#define BP_PXP_HIST_A_CTRL_PIXEL_OFFSET      16
+#define BM_PXP_HIST_A_CTRL_PIXEL_OFFSET 0x007F0000
+#define BF_PXP_HIST_A_CTRL_PIXEL_OFFSET(v)  \
+        (((v) << 16) & BM_PXP_HIST_A_CTRL_PIXEL_OFFSET)
+#define BP_PXP_HIST_A_CTRL_RSVD2      13
+#define BM_PXP_HIST_A_CTRL_RSVD2 0x0000E000
+#define BF_PXP_HIST_A_CTRL_RSVD2(v)  \
+        (((v) << 13) & BM_PXP_HIST_A_CTRL_RSVD2)
+#define BP_PXP_HIST_A_CTRL_STATUS      8
+#define BM_PXP_HIST_A_CTRL_STATUS 0x00001F00
+#define BF_PXP_HIST_A_CTRL_STATUS(v)  \
+        (((v) << 8) & BM_PXP_HIST_A_CTRL_STATUS)
+#define BP_PXP_HIST_A_CTRL_RSVD1      5
+#define BM_PXP_HIST_A_CTRL_RSVD1 0x000000E0
+#define BF_PXP_HIST_A_CTRL_RSVD1(v)  \
+        (((v) << 5) & BM_PXP_HIST_A_CTRL_RSVD1)
+#define BM_PXP_HIST_A_CTRL_CLEAR 0x00000010
+#define BF_PXP_HIST_A_CTRL_CLEAR(v)  \
+        (((v) << 4) & BM_PXP_HIST_A_CTRL_CLEAR)
+#define BP_PXP_HIST_A_CTRL_RSVD0      1
+#define BM_PXP_HIST_A_CTRL_RSVD0 0x0000000E
+#define BF_PXP_HIST_A_CTRL_RSVD0(v)  \
+        (((v) << 1) & BM_PXP_HIST_A_CTRL_RSVD0)
+#define BM_PXP_HIST_A_CTRL_ENABLE 0x00000001
+#define BF_PXP_HIST_A_CTRL_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_HIST_A_CTRL_ENABLE)
+
+#define HW_PXP_HIST_A_MASK     (0x00002a10)
+
+#define BP_PXP_HIST_A_MASK_MASK_VALUE1      24
+#define BM_PXP_HIST_A_MASK_MASK_VALUE1 0xFF000000
+#define BF_PXP_HIST_A_MASK_MASK_VALUE1(v) \
+        (((v) << 24) & BM_PXP_HIST_A_MASK_MASK_VALUE1)
+#define BP_PXP_HIST_A_MASK_MASK_VALUE0      16
+#define BM_PXP_HIST_A_MASK_MASK_VALUE0 0x00FF0000
+#define BF_PXP_HIST_A_MASK_MASK_VALUE0(v)  \
+        (((v) << 16) & BM_PXP_HIST_A_MASK_MASK_VALUE0)
+#define BP_PXP_HIST_A_MASK_MASK_WIDTH      13
+#define BM_PXP_HIST_A_MASK_MASK_WIDTH 0x0000E000
+#define BF_PXP_HIST_A_MASK_MASK_WIDTH(v)  \
+        (((v) << 13) & BM_PXP_HIST_A_MASK_MASK_WIDTH)
+#define BP_PXP_HIST_A_MASK_MASK_OFFSET      6
+#define BM_PXP_HIST_A_MASK_MASK_OFFSET 0x00001FC0
+#define BF_PXP_HIST_A_MASK_MASK_OFFSET(v)  \
+        (((v) << 6) & BM_PXP_HIST_A_MASK_MASK_OFFSET)
+#define BP_PXP_HIST_A_MASK_MASK_MODE      4
+#define BM_PXP_HIST_A_MASK_MASK_MODE 0x00000030
+#define BF_PXP_HIST_A_MASK_MASK_MODE(v)  \
+        (((v) << 4) & BM_PXP_HIST_A_MASK_MASK_MODE)
+#define BV_PXP_HIST_A_MASK_MASK_MODE__EQUAL     0x0
+#define BV_PXP_HIST_A_MASK_MASK_MODE__NOT_EQUAL 0x1
+#define BV_PXP_HIST_A_MASK_MASK_MODE__INSIDE    0x2
+#define BV_PXP_HIST_A_MASK_MASK_MODE__OUTSIDE   0x3
+#define BP_PXP_HIST_A_MASK_RSVD0      1
+#define BM_PXP_HIST_A_MASK_RSVD0 0x0000000E
+#define BF_PXP_HIST_A_MASK_RSVD0(v)  \
+        (((v) << 1) & BM_PXP_HIST_A_MASK_RSVD0)
+#define BM_PXP_HIST_A_MASK_MASK_EN 0x00000001
+#define BF_PXP_HIST_A_MASK_MASK_EN(v)  \
+        (((v) << 0) & BM_PXP_HIST_A_MASK_MASK_EN)
+
+#define HW_PXP_HIST_A_BUF_SIZE (0x00002a20)
+
+#define BP_PXP_HIST_A_BUF_SIZE_RSVD0      28
+#define BM_PXP_HIST_A_BUF_SIZE_RSVD0 0xF0000000
+#define BF_PXP_HIST_A_BUF_SIZE_RSVD0(v) \
+        (((v) << 28) & BM_PXP_HIST_A_BUF_SIZE_RSVD0)
+#define BP_PXP_HIST_A_BUF_SIZE_HEIGHT      16
+#define BM_PXP_HIST_A_BUF_SIZE_HEIGHT 0x0FFF0000
+#define BF_PXP_HIST_A_BUF_SIZE_HEIGHT(v)  \
+        (((v) << 16) & BM_PXP_HIST_A_BUF_SIZE_HEIGHT)
+#define BP_PXP_HIST_A_BUF_SIZE_RSVD1      12
+#define BM_PXP_HIST_A_BUF_SIZE_RSVD1 0x0000F000
+#define BF_PXP_HIST_A_BUF_SIZE_RSVD1(v)  \
+        (((v) << 12) & BM_PXP_HIST_A_BUF_SIZE_RSVD1)
+#define BP_PXP_HIST_A_BUF_SIZE_WIDTH      0
+#define BM_PXP_HIST_A_BUF_SIZE_WIDTH 0x00000FFF
+#define BF_PXP_HIST_A_BUF_SIZE_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_HIST_A_BUF_SIZE_WIDTH)
+
+#define HW_PXP_HIST_A_TOTAL_PIXEL      (0x00002a30)
+
+#define BP_PXP_HIST_A_TOTAL_PIXEL_RSVD0      24
+#define BM_PXP_HIST_A_TOTAL_PIXEL_RSVD0 0xFF000000
+#define BF_PXP_HIST_A_TOTAL_PIXEL_RSVD0(v) \
+        (((v) << 24) & BM_PXP_HIST_A_TOTAL_PIXEL_RSVD0)
+#define BP_PXP_HIST_A_TOTAL_PIXEL_TOTAL_PIXEL      0
+#define BM_PXP_HIST_A_TOTAL_PIXEL_TOTAL_PIXEL 0x00FFFFFF
+#define BF_PXP_HIST_A_TOTAL_PIXEL_TOTAL_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_HIST_A_TOTAL_PIXEL_TOTAL_PIXEL)
+
+#define HW_PXP_HIST_A_ACTIVE_AREA_X    (0x00002a40)
+
+#define BP_PXP_HIST_A_ACTIVE_AREA_X_RSVD1      28
+#define BM_PXP_HIST_A_ACTIVE_AREA_X_RSVD1 0xF0000000
+#define BF_PXP_HIST_A_ACTIVE_AREA_X_RSVD1(v) \
+        (((v) << 28) & BM_PXP_HIST_A_ACTIVE_AREA_X_RSVD1)
+#define BP_PXP_HIST_A_ACTIVE_AREA_X_MAX_X_OFFSET      16
+#define BM_PXP_HIST_A_ACTIVE_AREA_X_MAX_X_OFFSET 0x0FFF0000
+#define BF_PXP_HIST_A_ACTIVE_AREA_X_MAX_X_OFFSET(v)  \
+        (((v) << 16) & BM_PXP_HIST_A_ACTIVE_AREA_X_MAX_X_OFFSET)
+#define BP_PXP_HIST_A_ACTIVE_AREA_X_RSVD0      12
+#define BM_PXP_HIST_A_ACTIVE_AREA_X_RSVD0 0x0000F000
+#define BF_PXP_HIST_A_ACTIVE_AREA_X_RSVD0(v)  \
+        (((v) << 12) & BM_PXP_HIST_A_ACTIVE_AREA_X_RSVD0)
+#define BP_PXP_HIST_A_ACTIVE_AREA_X_MIN_X_OFFSET      0
+#define BM_PXP_HIST_A_ACTIVE_AREA_X_MIN_X_OFFSET 0x00000FFF
+#define BF_PXP_HIST_A_ACTIVE_AREA_X_MIN_X_OFFSET(v)  \
+        (((v) << 0) & BM_PXP_HIST_A_ACTIVE_AREA_X_MIN_X_OFFSET)
+
+#define HW_PXP_HIST_A_ACTIVE_AREA_Y    (0x00002a50)
+
+#define BP_PXP_HIST_A_ACTIVE_AREA_Y_RSVD1      28
+#define BM_PXP_HIST_A_ACTIVE_AREA_Y_RSVD1 0xF0000000
+#define BF_PXP_HIST_A_ACTIVE_AREA_Y_RSVD1(v) \
+        (((v) << 28) & BM_PXP_HIST_A_ACTIVE_AREA_Y_RSVD1)
+#define BP_PXP_HIST_A_ACTIVE_AREA_Y_MAX_Y_OFFSET      16
+#define BM_PXP_HIST_A_ACTIVE_AREA_Y_MAX_Y_OFFSET 0x0FFF0000
+#define BF_PXP_HIST_A_ACTIVE_AREA_Y_MAX_Y_OFFSET(v)  \
+        (((v) << 16) & BM_PXP_HIST_A_ACTIVE_AREA_Y_MAX_Y_OFFSET)
+#define BP_PXP_HIST_A_ACTIVE_AREA_Y_RSVD0      12
+#define BM_PXP_HIST_A_ACTIVE_AREA_Y_RSVD0 0x0000F000
+#define BF_PXP_HIST_A_ACTIVE_AREA_Y_RSVD0(v)  \
+        (((v) << 12) & BM_PXP_HIST_A_ACTIVE_AREA_Y_RSVD0)
+#define BP_PXP_HIST_A_ACTIVE_AREA_Y_MIN_Y_OFFSET      0
+#define BM_PXP_HIST_A_ACTIVE_AREA_Y_MIN_Y_OFFSET 0x00000FFF
+#define BF_PXP_HIST_A_ACTIVE_AREA_Y_MIN_Y_OFFSET(v)  \
+        (((v) << 0) & BM_PXP_HIST_A_ACTIVE_AREA_Y_MIN_Y_OFFSET)
+
+#define HW_PXP_HIST_A_RAW_STAT0        (0x00002a60)
+
+#define BP_PXP_HIST_A_RAW_STAT0_STAT0      0
+#define BM_PXP_HIST_A_RAW_STAT0_STAT0 0xFFFFFFFF
+#define BF_PXP_HIST_A_RAW_STAT0_STAT0(v)   (v)
+
+#define HW_PXP_HIST_A_RAW_STAT1        (0x00002a70)
+
+#define BP_PXP_HIST_A_RAW_STAT1_STAT1      0
+#define BM_PXP_HIST_A_RAW_STAT1_STAT1 0xFFFFFFFF
+#define BF_PXP_HIST_A_RAW_STAT1_STAT1(v)   (v)
+
+#define HW_PXP_HIST_B_CTRL     (0x00002a80)
+
+#define BP_PXP_HIST_B_CTRL_RSVD4      27
+#define BM_PXP_HIST_B_CTRL_RSVD4 0xF8000000
+#define BF_PXP_HIST_B_CTRL_RSVD4(v) \
+        (((v) << 27) & BM_PXP_HIST_B_CTRL_RSVD4)
+#define BP_PXP_HIST_B_CTRL_PIXEL_WIDTH      24
+#define BM_PXP_HIST_B_CTRL_PIXEL_WIDTH 0x07000000
+#define BF_PXP_HIST_B_CTRL_PIXEL_WIDTH(v)  \
+        (((v) << 24) & BM_PXP_HIST_B_CTRL_PIXEL_WIDTH)
+#define BM_PXP_HIST_B_CTRL_RSVD3 0x00800000
+#define BF_PXP_HIST_B_CTRL_RSVD3(v)  \
+        (((v) << 23) & BM_PXP_HIST_B_CTRL_RSVD3)
+#define BP_PXP_HIST_B_CTRL_PIXEL_OFFSET      16
+#define BM_PXP_HIST_B_CTRL_PIXEL_OFFSET 0x007F0000
+#define BF_PXP_HIST_B_CTRL_PIXEL_OFFSET(v)  \
+        (((v) << 16) & BM_PXP_HIST_B_CTRL_PIXEL_OFFSET)
+#define BP_PXP_HIST_B_CTRL_RSVD2      13
+#define BM_PXP_HIST_B_CTRL_RSVD2 0x0000E000
+#define BF_PXP_HIST_B_CTRL_RSVD2(v)  \
+        (((v) << 13) & BM_PXP_HIST_B_CTRL_RSVD2)
+#define BP_PXP_HIST_B_CTRL_STATUS      8
+#define BM_PXP_HIST_B_CTRL_STATUS 0x00001F00
+#define BF_PXP_HIST_B_CTRL_STATUS(v)  \
+        (((v) << 8) & BM_PXP_HIST_B_CTRL_STATUS)
+#define BP_PXP_HIST_B_CTRL_RSVD1      5
+#define BM_PXP_HIST_B_CTRL_RSVD1 0x000000E0
+#define BF_PXP_HIST_B_CTRL_RSVD1(v)  \
+        (((v) << 5) & BM_PXP_HIST_B_CTRL_RSVD1)
+#define BM_PXP_HIST_B_CTRL_CLEAR 0x00000010
+#define BF_PXP_HIST_B_CTRL_CLEAR(v)  \
+        (((v) << 4) & BM_PXP_HIST_B_CTRL_CLEAR)
+#define BP_PXP_HIST_B_CTRL_RSVD0      1
+#define BM_PXP_HIST_B_CTRL_RSVD0 0x0000000E
+#define BF_PXP_HIST_B_CTRL_RSVD0(v)  \
+        (((v) << 1) & BM_PXP_HIST_B_CTRL_RSVD0)
+#define BM_PXP_HIST_B_CTRL_ENABLE 0x00000001
+#define BF_PXP_HIST_B_CTRL_ENABLE(v)  \
+        (((v) << 0) & BM_PXP_HIST_B_CTRL_ENABLE)
+
+#define HW_PXP_HIST_B_MASK     (0x00002a90)
+
+#define BP_PXP_HIST_B_MASK_MASK_VALUE1      24
+#define BM_PXP_HIST_B_MASK_MASK_VALUE1 0xFF000000
+#define BF_PXP_HIST_B_MASK_MASK_VALUE1(v) \
+        (((v) << 24) & BM_PXP_HIST_B_MASK_MASK_VALUE1)
+#define BP_PXP_HIST_B_MASK_MASK_VALUE0      16
+#define BM_PXP_HIST_B_MASK_MASK_VALUE0 0x00FF0000
+#define BF_PXP_HIST_B_MASK_MASK_VALUE0(v)  \
+        (((v) << 16) & BM_PXP_HIST_B_MASK_MASK_VALUE0)
+#define BP_PXP_HIST_B_MASK_MASK_WIDTH      13
+#define BM_PXP_HIST_B_MASK_MASK_WIDTH 0x0000E000
+#define BF_PXP_HIST_B_MASK_MASK_WIDTH(v)  \
+        (((v) << 13) & BM_PXP_HIST_B_MASK_MASK_WIDTH)
+#define BP_PXP_HIST_B_MASK_MASK_OFFSET      6
+#define BM_PXP_HIST_B_MASK_MASK_OFFSET 0x00001FC0
+#define BF_PXP_HIST_B_MASK_MASK_OFFSET(v)  \
+        (((v) << 6) & BM_PXP_HIST_B_MASK_MASK_OFFSET)
+#define BP_PXP_HIST_B_MASK_MASK_MODE      4
+#define BM_PXP_HIST_B_MASK_MASK_MODE 0x00000030
+#define BF_PXP_HIST_B_MASK_MASK_MODE(v)  \
+        (((v) << 4) & BM_PXP_HIST_B_MASK_MASK_MODE)
+#define BV_PXP_HIST_B_MASK_MASK_MODE__EQUAL     0x0
+#define BV_PXP_HIST_B_MASK_MASK_MODE__NOT_EQUAL 0x1
+#define BV_PXP_HIST_B_MASK_MASK_MODE__INSIDE    0x2
+#define BV_PXP_HIST_B_MASK_MASK_MODE__OUTSIDE   0x3
+#define BP_PXP_HIST_B_MASK_RSVD0      1
+#define BM_PXP_HIST_B_MASK_RSVD0 0x0000000E
+#define BF_PXP_HIST_B_MASK_RSVD0(v)  \
+        (((v) << 1) & BM_PXP_HIST_B_MASK_RSVD0)
+#define BM_PXP_HIST_B_MASK_MASK_EN 0x00000001
+#define BF_PXP_HIST_B_MASK_MASK_EN(v)  \
+        (((v) << 0) & BM_PXP_HIST_B_MASK_MASK_EN)
+
+#define HW_PXP_HIST_B_BUF_SIZE (0x00002aa0)
+
+#define BP_PXP_HIST_B_BUF_SIZE_RSVD0      28
+#define BM_PXP_HIST_B_BUF_SIZE_RSVD0 0xF0000000
+#define BF_PXP_HIST_B_BUF_SIZE_RSVD0(v) \
+        (((v) << 28) & BM_PXP_HIST_B_BUF_SIZE_RSVD0)
+#define BP_PXP_HIST_B_BUF_SIZE_HEIGHT      16
+#define BM_PXP_HIST_B_BUF_SIZE_HEIGHT 0x0FFF0000
+#define BF_PXP_HIST_B_BUF_SIZE_HEIGHT(v)  \
+        (((v) << 16) & BM_PXP_HIST_B_BUF_SIZE_HEIGHT)
+#define BP_PXP_HIST_B_BUF_SIZE_RSVD1      12
+#define BM_PXP_HIST_B_BUF_SIZE_RSVD1 0x0000F000
+#define BF_PXP_HIST_B_BUF_SIZE_RSVD1(v)  \
+        (((v) << 12) & BM_PXP_HIST_B_BUF_SIZE_RSVD1)
+#define BP_PXP_HIST_B_BUF_SIZE_WIDTH      0
+#define BM_PXP_HIST_B_BUF_SIZE_WIDTH 0x00000FFF
+#define BF_PXP_HIST_B_BUF_SIZE_WIDTH(v)  \
+        (((v) << 0) & BM_PXP_HIST_B_BUF_SIZE_WIDTH)
+
+#define HW_PXP_HIST_B_TOTAL_PIXEL      (0x00002ab0)
+
+#define BP_PXP_HIST_B_TOTAL_PIXEL_RSVD0      24
+#define BM_PXP_HIST_B_TOTAL_PIXEL_RSVD0 0xFF000000
+#define BF_PXP_HIST_B_TOTAL_PIXEL_RSVD0(v) \
+        (((v) << 24) & BM_PXP_HIST_B_TOTAL_PIXEL_RSVD0)
+#define BP_PXP_HIST_B_TOTAL_PIXEL_TOTAL_PIXEL      0
+#define BM_PXP_HIST_B_TOTAL_PIXEL_TOTAL_PIXEL 0x00FFFFFF
+#define BF_PXP_HIST_B_TOTAL_PIXEL_TOTAL_PIXEL(v)  \
+        (((v) << 0) & BM_PXP_HIST_B_TOTAL_PIXEL_TOTAL_PIXEL)
+
+#define HW_PXP_HIST_B_ACTIVE_AREA_X    (0x00002ac0)
+
+#define BP_PXP_HIST_B_ACTIVE_AREA_X_RSVD1      28
+#define BM_PXP_HIST_B_ACTIVE_AREA_X_RSVD1 0xF0000000
+#define BF_PXP_HIST_B_ACTIVE_AREA_X_RSVD1(v) \
+        (((v) << 28) & BM_PXP_HIST_B_ACTIVE_AREA_X_RSVD1)
+#define BP_PXP_HIST_B_ACTIVE_AREA_X_MAX_X_OFFSET      16
+#define BM_PXP_HIST_B_ACTIVE_AREA_X_MAX_X_OFFSET 0x0FFF0000
+#define BF_PXP_HIST_B_ACTIVE_AREA_X_MAX_X_OFFSET(v)  \
+        (((v) << 16) & BM_PXP_HIST_B_ACTIVE_AREA_X_MAX_X_OFFSET)
+#define BP_PXP_HIST_B_ACTIVE_AREA_X_RSVD0      12
+#define BM_PXP_HIST_B_ACTIVE_AREA_X_RSVD0 0x0000F000
+#define BF_PXP_HIST_B_ACTIVE_AREA_X_RSVD0(v)  \
+        (((v) << 12) & BM_PXP_HIST_B_ACTIVE_AREA_X_RSVD0)
+#define BP_PXP_HIST_B_ACTIVE_AREA_X_MIN_X_OFFSET      0
+#define BM_PXP_HIST_B_ACTIVE_AREA_X_MIN_X_OFFSET 0x00000FFF
+#define BF_PXP_HIST_B_ACTIVE_AREA_X_MIN_X_OFFSET(v)  \
+        (((v) << 0) & BM_PXP_HIST_B_ACTIVE_AREA_X_MIN_X_OFFSET)
+
+#define HW_PXP_HIST_B_ACTIVE_AREA_Y    (0x00002ad0)
+
+#define BP_PXP_HIST_B_ACTIVE_AREA_Y_RSVD1      28
+#define BM_PXP_HIST_B_ACTIVE_AREA_Y_RSVD1 0xF0000000
+#define BF_PXP_HIST_B_ACTIVE_AREA_Y_RSVD1(v) \
+        (((v) << 28) & BM_PXP_HIST_B_ACTIVE_AREA_Y_RSVD1)
+#define BP_PXP_HIST_B_ACTIVE_AREA_Y_MAX_Y_OFFSET      16
+#define BM_PXP_HIST_B_ACTIVE_AREA_Y_MAX_Y_OFFSET 0x0FFF0000
+#define BF_PXP_HIST_B_ACTIVE_AREA_Y_MAX_Y_OFFSET(v)  \
+        (((v) << 16) & BM_PXP_HIST_B_ACTIVE_AREA_Y_MAX_Y_OFFSET)
+#define BP_PXP_HIST_B_ACTIVE_AREA_Y_RSVD0      12
+#define BM_PXP_HIST_B_ACTIVE_AREA_Y_RSVD0 0x0000F000
+#define BF_PXP_HIST_B_ACTIVE_AREA_Y_RSVD0(v)  \
+        (((v) << 12) & BM_PXP_HIST_B_ACTIVE_AREA_Y_RSVD0)
+#define BP_PXP_HIST_B_ACTIVE_AREA_Y_MIN_Y_OFFSET      0
+#define BM_PXP_HIST_B_ACTIVE_AREA_Y_MIN_Y_OFFSET 0x00000FFF
+#define BF_PXP_HIST_B_ACTIVE_AREA_Y_MIN_Y_OFFSET(v)  \
+        (((v) << 0) & BM_PXP_HIST_B_ACTIVE_AREA_Y_MIN_Y_OFFSET)
+
+#define HW_PXP_HIST_B_RAW_STAT0        (0x00002ae0)
+
+#define BP_PXP_HIST_B_RAW_STAT0_STAT0      0
+#define BM_PXP_HIST_B_RAW_STAT0_STAT0 0xFFFFFFFF
+#define BF_PXP_HIST_B_RAW_STAT0_STAT0(v)   (v)
+
+#define HW_PXP_HIST_B_RAW_STAT1        (0x00002af0)
+
+#define BP_PXP_HIST_B_RAW_STAT1_STAT1      0
+#define BM_PXP_HIST_B_RAW_STAT1_STAT1 0xFFFFFFFF
+#define BF_PXP_HIST_B_RAW_STAT1_STAT1(v)   (v)
+
+#define HW_PXP_HIST2_PARAM     (0x00002b00)
+
+#define BP_PXP_HIST2_PARAM_RSVD      16
+#define BM_PXP_HIST2_PARAM_RSVD 0xFFFF0000
+#define BF_PXP_HIST2_PARAM_RSVD(v) \
+        (((v) << 16) & BM_PXP_HIST2_PARAM_RSVD)
+#define BP_PXP_HIST2_PARAM_RSVD1      14
+#define BM_PXP_HIST2_PARAM_RSVD1 0x0000C000
+#define BF_PXP_HIST2_PARAM_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_HIST2_PARAM_RSVD1)
+#define BP_PXP_HIST2_PARAM_VALUE1      8
+#define BM_PXP_HIST2_PARAM_VALUE1 0x00003F00
+#define BF_PXP_HIST2_PARAM_VALUE1(v)  \
+        (((v) << 8) & BM_PXP_HIST2_PARAM_VALUE1)
+#define BP_PXP_HIST2_PARAM_RSVD0      6
+#define BM_PXP_HIST2_PARAM_RSVD0 0x000000C0
+#define BF_PXP_HIST2_PARAM_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_HIST2_PARAM_RSVD0)
+#define BP_PXP_HIST2_PARAM_VALUE0      0
+#define BM_PXP_HIST2_PARAM_VALUE0 0x0000003F
+#define BF_PXP_HIST2_PARAM_VALUE0(v)  \
+        (((v) << 0) & BM_PXP_HIST2_PARAM_VALUE0)
+
+#define HW_PXP_HIST4_PARAM     (0x00002b10)
+
+#define BP_PXP_HIST4_PARAM_RSVD3      30
+#define BM_PXP_HIST4_PARAM_RSVD3 0xC0000000
+#define BF_PXP_HIST4_PARAM_RSVD3(v) \
+        (((v) << 30) & BM_PXP_HIST4_PARAM_RSVD3)
+#define BP_PXP_HIST4_PARAM_VALUE3      24
+#define BM_PXP_HIST4_PARAM_VALUE3 0x3F000000
+#define BF_PXP_HIST4_PARAM_VALUE3(v)  \
+        (((v) << 24) & BM_PXP_HIST4_PARAM_VALUE3)
+#define BP_PXP_HIST4_PARAM_RSVD2      22
+#define BM_PXP_HIST4_PARAM_RSVD2 0x00C00000
+#define BF_PXP_HIST4_PARAM_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_HIST4_PARAM_RSVD2)
+#define BP_PXP_HIST4_PARAM_VALUE2      16
+#define BM_PXP_HIST4_PARAM_VALUE2 0x003F0000
+#define BF_PXP_HIST4_PARAM_VALUE2(v)  \
+        (((v) << 16) & BM_PXP_HIST4_PARAM_VALUE2)
+#define BP_PXP_HIST4_PARAM_RSVD1      14
+#define BM_PXP_HIST4_PARAM_RSVD1 0x0000C000
+#define BF_PXP_HIST4_PARAM_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_HIST4_PARAM_RSVD1)
+#define BP_PXP_HIST4_PARAM_VALUE1      8
+#define BM_PXP_HIST4_PARAM_VALUE1 0x00003F00
+#define BF_PXP_HIST4_PARAM_VALUE1(v)  \
+        (((v) << 8) & BM_PXP_HIST4_PARAM_VALUE1)
+#define BP_PXP_HIST4_PARAM_RSVD0      6
+#define BM_PXP_HIST4_PARAM_RSVD0 0x000000C0
+#define BF_PXP_HIST4_PARAM_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_HIST4_PARAM_RSVD0)
+#define BP_PXP_HIST4_PARAM_VALUE0      0
+#define BM_PXP_HIST4_PARAM_VALUE0 0x0000003F
+#define BF_PXP_HIST4_PARAM_VALUE0(v)  \
+        (((v) << 0) & BM_PXP_HIST4_PARAM_VALUE0)
+
+#define HW_PXP_HIST8_PARAM0    (0x00002b20)
+
+#define BP_PXP_HIST8_PARAM0_RSVD3      30
+#define BM_PXP_HIST8_PARAM0_RSVD3 0xC0000000
+#define BF_PXP_HIST8_PARAM0_RSVD3(v) \
+        (((v) << 30) & BM_PXP_HIST8_PARAM0_RSVD3)
+#define BP_PXP_HIST8_PARAM0_VALUE3      24
+#define BM_PXP_HIST8_PARAM0_VALUE3 0x3F000000
+#define BF_PXP_HIST8_PARAM0_VALUE3(v)  \
+        (((v) << 24) & BM_PXP_HIST8_PARAM0_VALUE3)
+#define BP_PXP_HIST8_PARAM0_RSVD2      22
+#define BM_PXP_HIST8_PARAM0_RSVD2 0x00C00000
+#define BF_PXP_HIST8_PARAM0_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_HIST8_PARAM0_RSVD2)
+#define BP_PXP_HIST8_PARAM0_VALUE2      16
+#define BM_PXP_HIST8_PARAM0_VALUE2 0x003F0000
+#define BF_PXP_HIST8_PARAM0_VALUE2(v)  \
+        (((v) << 16) & BM_PXP_HIST8_PARAM0_VALUE2)
+#define BP_PXP_HIST8_PARAM0_RSVD1      14
+#define BM_PXP_HIST8_PARAM0_RSVD1 0x0000C000
+#define BF_PXP_HIST8_PARAM0_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_HIST8_PARAM0_RSVD1)
+#define BP_PXP_HIST8_PARAM0_VALUE1      8
+#define BM_PXP_HIST8_PARAM0_VALUE1 0x00003F00
+#define BF_PXP_HIST8_PARAM0_VALUE1(v)  \
+        (((v) << 8) & BM_PXP_HIST8_PARAM0_VALUE1)
+#define BP_PXP_HIST8_PARAM0_RSVD0      6
+#define BM_PXP_HIST8_PARAM0_RSVD0 0x000000C0
+#define BF_PXP_HIST8_PARAM0_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_HIST8_PARAM0_RSVD0)
+#define BP_PXP_HIST8_PARAM0_VALUE0      0
+#define BM_PXP_HIST8_PARAM0_VALUE0 0x0000003F
+#define BF_PXP_HIST8_PARAM0_VALUE0(v)  \
+        (((v) << 0) & BM_PXP_HIST8_PARAM0_VALUE0)
+
+#define HW_PXP_HIST8_PARAM1    (0x00002b30)
+
+#define BP_PXP_HIST8_PARAM1_RSVD7      30
+#define BM_PXP_HIST8_PARAM1_RSVD7 0xC0000000
+#define BF_PXP_HIST8_PARAM1_RSVD7(v) \
+        (((v) << 30) & BM_PXP_HIST8_PARAM1_RSVD7)
+#define BP_PXP_HIST8_PARAM1_VALUE7      24
+#define BM_PXP_HIST8_PARAM1_VALUE7 0x3F000000
+#define BF_PXP_HIST8_PARAM1_VALUE7(v)  \
+        (((v) << 24) & BM_PXP_HIST8_PARAM1_VALUE7)
+#define BP_PXP_HIST8_PARAM1_RSVD6      22
+#define BM_PXP_HIST8_PARAM1_RSVD6 0x00C00000
+#define BF_PXP_HIST8_PARAM1_RSVD6(v)  \
+        (((v) << 22) & BM_PXP_HIST8_PARAM1_RSVD6)
+#define BP_PXP_HIST8_PARAM1_VALUE6      16
+#define BM_PXP_HIST8_PARAM1_VALUE6 0x003F0000
+#define BF_PXP_HIST8_PARAM1_VALUE6(v)  \
+        (((v) << 16) & BM_PXP_HIST8_PARAM1_VALUE6)
+#define BP_PXP_HIST8_PARAM1_RSVD5      14
+#define BM_PXP_HIST8_PARAM1_RSVD5 0x0000C000
+#define BF_PXP_HIST8_PARAM1_RSVD5(v)  \
+        (((v) << 14) & BM_PXP_HIST8_PARAM1_RSVD5)
+#define BP_PXP_HIST8_PARAM1_VALUE5      8
+#define BM_PXP_HIST8_PARAM1_VALUE5 0x00003F00
+#define BF_PXP_HIST8_PARAM1_VALUE5(v)  \
+        (((v) << 8) & BM_PXP_HIST8_PARAM1_VALUE5)
+#define BP_PXP_HIST8_PARAM1_RSVD4      6
+#define BM_PXP_HIST8_PARAM1_RSVD4 0x000000C0
+#define BF_PXP_HIST8_PARAM1_RSVD4(v)  \
+        (((v) << 6) & BM_PXP_HIST8_PARAM1_RSVD4)
+#define BP_PXP_HIST8_PARAM1_VALUE4      0
+#define BM_PXP_HIST8_PARAM1_VALUE4 0x0000003F
+#define BF_PXP_HIST8_PARAM1_VALUE4(v)  \
+        (((v) << 0) & BM_PXP_HIST8_PARAM1_VALUE4)
+
+#define HW_PXP_HIST16_PARAM0   (0x00002b40)
+
+#define BP_PXP_HIST16_PARAM0_RSVD3      30
+#define BM_PXP_HIST16_PARAM0_RSVD3 0xC0000000
+#define BF_PXP_HIST16_PARAM0_RSVD3(v) \
+        (((v) << 30) & BM_PXP_HIST16_PARAM0_RSVD3)
+#define BP_PXP_HIST16_PARAM0_VALUE3      24
+#define BM_PXP_HIST16_PARAM0_VALUE3 0x3F000000
+#define BF_PXP_HIST16_PARAM0_VALUE3(v)  \
+        (((v) << 24) & BM_PXP_HIST16_PARAM0_VALUE3)
+#define BP_PXP_HIST16_PARAM0_RSVD2      22
+#define BM_PXP_HIST16_PARAM0_RSVD2 0x00C00000
+#define BF_PXP_HIST16_PARAM0_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_HIST16_PARAM0_RSVD2)
+#define BP_PXP_HIST16_PARAM0_VALUE2      16
+#define BM_PXP_HIST16_PARAM0_VALUE2 0x003F0000
+#define BF_PXP_HIST16_PARAM0_VALUE2(v)  \
+        (((v) << 16) & BM_PXP_HIST16_PARAM0_VALUE2)
+#define BP_PXP_HIST16_PARAM0_RSVD1      14
+#define BM_PXP_HIST16_PARAM0_RSVD1 0x0000C000
+#define BF_PXP_HIST16_PARAM0_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_HIST16_PARAM0_RSVD1)
+#define BP_PXP_HIST16_PARAM0_VALUE1      8
+#define BM_PXP_HIST16_PARAM0_VALUE1 0x00003F00
+#define BF_PXP_HIST16_PARAM0_VALUE1(v)  \
+        (((v) << 8) & BM_PXP_HIST16_PARAM0_VALUE1)
+#define BP_PXP_HIST16_PARAM0_RSVD0      6
+#define BM_PXP_HIST16_PARAM0_RSVD0 0x000000C0
+#define BF_PXP_HIST16_PARAM0_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_HIST16_PARAM0_RSVD0)
+#define BP_PXP_HIST16_PARAM0_VALUE0      0
+#define BM_PXP_HIST16_PARAM0_VALUE0 0x0000003F
+#define BF_PXP_HIST16_PARAM0_VALUE0(v)  \
+        (((v) << 0) & BM_PXP_HIST16_PARAM0_VALUE0)
+
+#define HW_PXP_HIST16_PARAM1   (0x00002b50)
+
+#define BP_PXP_HIST16_PARAM1_RSVD7      30
+#define BM_PXP_HIST16_PARAM1_RSVD7 0xC0000000
+#define BF_PXP_HIST16_PARAM1_RSVD7(v) \
+        (((v) << 30) & BM_PXP_HIST16_PARAM1_RSVD7)
+#define BP_PXP_HIST16_PARAM1_VALUE7      24
+#define BM_PXP_HIST16_PARAM1_VALUE7 0x3F000000
+#define BF_PXP_HIST16_PARAM1_VALUE7(v)  \
+        (((v) << 24) & BM_PXP_HIST16_PARAM1_VALUE7)
+#define BP_PXP_HIST16_PARAM1_RSVD6      22
+#define BM_PXP_HIST16_PARAM1_RSVD6 0x00C00000
+#define BF_PXP_HIST16_PARAM1_RSVD6(v)  \
+        (((v) << 22) & BM_PXP_HIST16_PARAM1_RSVD6)
+#define BP_PXP_HIST16_PARAM1_VALUE6      16
+#define BM_PXP_HIST16_PARAM1_VALUE6 0x003F0000
+#define BF_PXP_HIST16_PARAM1_VALUE6(v)  \
+        (((v) << 16) & BM_PXP_HIST16_PARAM1_VALUE6)
+#define BP_PXP_HIST16_PARAM1_RSVD5      14
+#define BM_PXP_HIST16_PARAM1_RSVD5 0x0000C000
+#define BF_PXP_HIST16_PARAM1_RSVD5(v)  \
+        (((v) << 14) & BM_PXP_HIST16_PARAM1_RSVD5)
+#define BP_PXP_HIST16_PARAM1_VALUE5      8
+#define BM_PXP_HIST16_PARAM1_VALUE5 0x00003F00
+#define BF_PXP_HIST16_PARAM1_VALUE5(v)  \
+        (((v) << 8) & BM_PXP_HIST16_PARAM1_VALUE5)
+#define BP_PXP_HIST16_PARAM1_RSVD4      6
+#define BM_PXP_HIST16_PARAM1_RSVD4 0x000000C0
+#define BF_PXP_HIST16_PARAM1_RSVD4(v)  \
+        (((v) << 6) & BM_PXP_HIST16_PARAM1_RSVD4)
+#define BP_PXP_HIST16_PARAM1_VALUE4      0
+#define BM_PXP_HIST16_PARAM1_VALUE4 0x0000003F
+#define BF_PXP_HIST16_PARAM1_VALUE4(v)  \
+        (((v) << 0) & BM_PXP_HIST16_PARAM1_VALUE4)
+
+#define HW_PXP_HIST16_PARAM2   (0x00002b60)
+
+#define BP_PXP_HIST16_PARAM2_RSVD11      30
+#define BM_PXP_HIST16_PARAM2_RSVD11 0xC0000000
+#define BF_PXP_HIST16_PARAM2_RSVD11(v) \
+        (((v) << 30) & BM_PXP_HIST16_PARAM2_RSVD11)
+#define BP_PXP_HIST16_PARAM2_VALUE11      24
+#define BM_PXP_HIST16_PARAM2_VALUE11 0x3F000000
+#define BF_PXP_HIST16_PARAM2_VALUE11(v)  \
+        (((v) << 24) & BM_PXP_HIST16_PARAM2_VALUE11)
+#define BP_PXP_HIST16_PARAM2_RSVD10      22
+#define BM_PXP_HIST16_PARAM2_RSVD10 0x00C00000
+#define BF_PXP_HIST16_PARAM2_RSVD10(v)  \
+        (((v) << 22) & BM_PXP_HIST16_PARAM2_RSVD10)
+#define BP_PXP_HIST16_PARAM2_VALUE10      16
+#define BM_PXP_HIST16_PARAM2_VALUE10 0x003F0000
+#define BF_PXP_HIST16_PARAM2_VALUE10(v)  \
+        (((v) << 16) & BM_PXP_HIST16_PARAM2_VALUE10)
+#define BP_PXP_HIST16_PARAM2_RSVD9      14
+#define BM_PXP_HIST16_PARAM2_RSVD9 0x0000C000
+#define BF_PXP_HIST16_PARAM2_RSVD9(v)  \
+        (((v) << 14) & BM_PXP_HIST16_PARAM2_RSVD9)
+#define BP_PXP_HIST16_PARAM2_VALUE9      8
+#define BM_PXP_HIST16_PARAM2_VALUE9 0x00003F00
+#define BF_PXP_HIST16_PARAM2_VALUE9(v)  \
+        (((v) << 8) & BM_PXP_HIST16_PARAM2_VALUE9)
+#define BP_PXP_HIST16_PARAM2_RSVD8      6
+#define BM_PXP_HIST16_PARAM2_RSVD8 0x000000C0
+#define BF_PXP_HIST16_PARAM2_RSVD8(v)  \
+        (((v) << 6) & BM_PXP_HIST16_PARAM2_RSVD8)
+#define BP_PXP_HIST16_PARAM2_VALUE8      0
+#define BM_PXP_HIST16_PARAM2_VALUE8 0x0000003F
+#define BF_PXP_HIST16_PARAM2_VALUE8(v)  \
+        (((v) << 0) & BM_PXP_HIST16_PARAM2_VALUE8)
+
+#define HW_PXP_HIST16_PARAM3   (0x00002b70)
+
+#define BP_PXP_HIST16_PARAM3_RSVD15      30
+#define BM_PXP_HIST16_PARAM3_RSVD15 0xC0000000
+#define BF_PXP_HIST16_PARAM3_RSVD15(v) \
+        (((v) << 30) & BM_PXP_HIST16_PARAM3_RSVD15)
+#define BP_PXP_HIST16_PARAM3_VALUE15      24
+#define BM_PXP_HIST16_PARAM3_VALUE15 0x3F000000
+#define BF_PXP_HIST16_PARAM3_VALUE15(v)  \
+        (((v) << 24) & BM_PXP_HIST16_PARAM3_VALUE15)
+#define BP_PXP_HIST16_PARAM3_RSVD14      22
+#define BM_PXP_HIST16_PARAM3_RSVD14 0x00C00000
+#define BF_PXP_HIST16_PARAM3_RSVD14(v)  \
+        (((v) << 22) & BM_PXP_HIST16_PARAM3_RSVD14)
+#define BP_PXP_HIST16_PARAM3_VALUE14      16
+#define BM_PXP_HIST16_PARAM3_VALUE14 0x003F0000
+#define BF_PXP_HIST16_PARAM3_VALUE14(v)  \
+        (((v) << 16) & BM_PXP_HIST16_PARAM3_VALUE14)
+#define BP_PXP_HIST16_PARAM3_RSVD13      14
+#define BM_PXP_HIST16_PARAM3_RSVD13 0x0000C000
+#define BF_PXP_HIST16_PARAM3_RSVD13(v)  \
+        (((v) << 14) & BM_PXP_HIST16_PARAM3_RSVD13)
+#define BP_PXP_HIST16_PARAM3_VALUE13      8
+#define BM_PXP_HIST16_PARAM3_VALUE13 0x00003F00
+#define BF_PXP_HIST16_PARAM3_VALUE13(v)  \
+        (((v) << 8) & BM_PXP_HIST16_PARAM3_VALUE13)
+#define BP_PXP_HIST16_PARAM3_RSVD12      6
+#define BM_PXP_HIST16_PARAM3_RSVD12 0x000000C0
+#define BF_PXP_HIST16_PARAM3_RSVD12(v)  \
+        (((v) << 6) & BM_PXP_HIST16_PARAM3_RSVD12)
+#define BP_PXP_HIST16_PARAM3_VALUE12      0
+#define BM_PXP_HIST16_PARAM3_VALUE12 0x0000003F
+#define BF_PXP_HIST16_PARAM3_VALUE12(v)  \
+        (((v) << 0) & BM_PXP_HIST16_PARAM3_VALUE12)
+
+#define HW_PXP_HIST32_PARAM0   (0x00002b80)
+
+#define BP_PXP_HIST32_PARAM0_RSVD3      30
+#define BM_PXP_HIST32_PARAM0_RSVD3 0xC0000000
+#define BF_PXP_HIST32_PARAM0_RSVD3(v) \
+        (((v) << 30) & BM_PXP_HIST32_PARAM0_RSVD3)
+#define BP_PXP_HIST32_PARAM0_VALUE3      24
+#define BM_PXP_HIST32_PARAM0_VALUE3 0x3F000000
+#define BF_PXP_HIST32_PARAM0_VALUE3(v)  \
+        (((v) << 24) & BM_PXP_HIST32_PARAM0_VALUE3)
+#define BP_PXP_HIST32_PARAM0_RSVD2      22
+#define BM_PXP_HIST32_PARAM0_RSVD2 0x00C00000
+#define BF_PXP_HIST32_PARAM0_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_HIST32_PARAM0_RSVD2)
+#define BP_PXP_HIST32_PARAM0_VALUE2      16
+#define BM_PXP_HIST32_PARAM0_VALUE2 0x003F0000
+#define BF_PXP_HIST32_PARAM0_VALUE2(v)  \
+        (((v) << 16) & BM_PXP_HIST32_PARAM0_VALUE2)
+#define BP_PXP_HIST32_PARAM0_RSVD1      14
+#define BM_PXP_HIST32_PARAM0_RSVD1 0x0000C000
+#define BF_PXP_HIST32_PARAM0_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_HIST32_PARAM0_RSVD1)
+#define BP_PXP_HIST32_PARAM0_VALUE1      8
+#define BM_PXP_HIST32_PARAM0_VALUE1 0x00003F00
+#define BF_PXP_HIST32_PARAM0_VALUE1(v)  \
+        (((v) << 8) & BM_PXP_HIST32_PARAM0_VALUE1)
+#define BP_PXP_HIST32_PARAM0_RSVD0      6
+#define BM_PXP_HIST32_PARAM0_RSVD0 0x000000C0
+#define BF_PXP_HIST32_PARAM0_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_HIST32_PARAM0_RSVD0)
+#define BP_PXP_HIST32_PARAM0_VALUE0      0
+#define BM_PXP_HIST32_PARAM0_VALUE0 0x0000003F
+#define BF_PXP_HIST32_PARAM0_VALUE0(v)  \
+        (((v) << 0) & BM_PXP_HIST32_PARAM0_VALUE0)
+
+#define HW_PXP_HIST32_PARAM1   (0x00002b90)
+
+#define BP_PXP_HIST32_PARAM1_RSVD7      30
+#define BM_PXP_HIST32_PARAM1_RSVD7 0xC0000000
+#define BF_PXP_HIST32_PARAM1_RSVD7(v) \
+        (((v) << 30) & BM_PXP_HIST32_PARAM1_RSVD7)
+#define BP_PXP_HIST32_PARAM1_VALUE7      24
+#define BM_PXP_HIST32_PARAM1_VALUE7 0x3F000000
+#define BF_PXP_HIST32_PARAM1_VALUE7(v)  \
+        (((v) << 24) & BM_PXP_HIST32_PARAM1_VALUE7)
+#define BP_PXP_HIST32_PARAM1_RSVD6      22
+#define BM_PXP_HIST32_PARAM1_RSVD6 0x00C00000
+#define BF_PXP_HIST32_PARAM1_RSVD6(v)  \
+        (((v) << 22) & BM_PXP_HIST32_PARAM1_RSVD6)
+#define BP_PXP_HIST32_PARAM1_VALUE6      16
+#define BM_PXP_HIST32_PARAM1_VALUE6 0x003F0000
+#define BF_PXP_HIST32_PARAM1_VALUE6(v)  \
+        (((v) << 16) & BM_PXP_HIST32_PARAM1_VALUE6)
+#define BP_PXP_HIST32_PARAM1_RSVD5      14
+#define BM_PXP_HIST32_PARAM1_RSVD5 0x0000C000
+#define BF_PXP_HIST32_PARAM1_RSVD5(v)  \
+        (((v) << 14) & BM_PXP_HIST32_PARAM1_RSVD5)
+#define BP_PXP_HIST32_PARAM1_VALUE5      8
+#define BM_PXP_HIST32_PARAM1_VALUE5 0x00003F00
+#define BF_PXP_HIST32_PARAM1_VALUE5(v)  \
+        (((v) << 8) & BM_PXP_HIST32_PARAM1_VALUE5)
+#define BP_PXP_HIST32_PARAM1_RSVD4      6
+#define BM_PXP_HIST32_PARAM1_RSVD4 0x000000C0
+#define BF_PXP_HIST32_PARAM1_RSVD4(v)  \
+        (((v) << 6) & BM_PXP_HIST32_PARAM1_RSVD4)
+#define BP_PXP_HIST32_PARAM1_VALUE4      0
+#define BM_PXP_HIST32_PARAM1_VALUE4 0x0000003F
+#define BF_PXP_HIST32_PARAM1_VALUE4(v)  \
+        (((v) << 0) & BM_PXP_HIST32_PARAM1_VALUE4)
+
+#define HW_PXP_HIST32_PARAM2   (0x00002ba0)
+
+#define BP_PXP_HIST32_PARAM2_RSVD11      30
+#define BM_PXP_HIST32_PARAM2_RSVD11 0xC0000000
+#define BF_PXP_HIST32_PARAM2_RSVD11(v) \
+        (((v) << 30) & BM_PXP_HIST32_PARAM2_RSVD11)
+#define BP_PXP_HIST32_PARAM2_VALUE11      24
+#define BM_PXP_HIST32_PARAM2_VALUE11 0x3F000000
+#define BF_PXP_HIST32_PARAM2_VALUE11(v)  \
+        (((v) << 24) & BM_PXP_HIST32_PARAM2_VALUE11)
+#define BP_PXP_HIST32_PARAM2_RSVD10      22
+#define BM_PXP_HIST32_PARAM2_RSVD10 0x00C00000
+#define BF_PXP_HIST32_PARAM2_RSVD10(v)  \
+        (((v) << 22) & BM_PXP_HIST32_PARAM2_RSVD10)
+#define BP_PXP_HIST32_PARAM2_VALUE10      16
+#define BM_PXP_HIST32_PARAM2_VALUE10 0x003F0000
+#define BF_PXP_HIST32_PARAM2_VALUE10(v)  \
+        (((v) << 16) & BM_PXP_HIST32_PARAM2_VALUE10)
+#define BP_PXP_HIST32_PARAM2_RSVD9      14
+#define BM_PXP_HIST32_PARAM2_RSVD9 0x0000C000
+#define BF_PXP_HIST32_PARAM2_RSVD9(v)  \
+        (((v) << 14) & BM_PXP_HIST32_PARAM2_RSVD9)
+#define BP_PXP_HIST32_PARAM2_VALUE9      8
+#define BM_PXP_HIST32_PARAM2_VALUE9 0x00003F00
+#define BF_PXP_HIST32_PARAM2_VALUE9(v)  \
+        (((v) << 8) & BM_PXP_HIST32_PARAM2_VALUE9)
+#define BP_PXP_HIST32_PARAM2_RSVD8      6
+#define BM_PXP_HIST32_PARAM2_RSVD8 0x000000C0
+#define BF_PXP_HIST32_PARAM2_RSVD8(v)  \
+        (((v) << 6) & BM_PXP_HIST32_PARAM2_RSVD8)
+#define BP_PXP_HIST32_PARAM2_VALUE8      0
+#define BM_PXP_HIST32_PARAM2_VALUE8 0x0000003F
+#define BF_PXP_HIST32_PARAM2_VALUE8(v)  \
+        (((v) << 0) & BM_PXP_HIST32_PARAM2_VALUE8)
+
+#define HW_PXP_HIST32_PARAM3   (0x00002bb0)
+
+#define BP_PXP_HIST32_PARAM3_RSVD15      30
+#define BM_PXP_HIST32_PARAM3_RSVD15 0xC0000000
+#define BF_PXP_HIST32_PARAM3_RSVD15(v) \
+        (((v) << 30) & BM_PXP_HIST32_PARAM3_RSVD15)
+#define BP_PXP_HIST32_PARAM3_VALUE15      24
+#define BM_PXP_HIST32_PARAM3_VALUE15 0x3F000000
+#define BF_PXP_HIST32_PARAM3_VALUE15(v)  \
+        (((v) << 24) & BM_PXP_HIST32_PARAM3_VALUE15)
+#define BP_PXP_HIST32_PARAM3_RSVD14      22
+#define BM_PXP_HIST32_PARAM3_RSVD14 0x00C00000
+#define BF_PXP_HIST32_PARAM3_RSVD14(v)  \
+        (((v) << 22) & BM_PXP_HIST32_PARAM3_RSVD14)
+#define BP_PXP_HIST32_PARAM3_VALUE14      16
+#define BM_PXP_HIST32_PARAM3_VALUE14 0x003F0000
+#define BF_PXP_HIST32_PARAM3_VALUE14(v)  \
+        (((v) << 16) & BM_PXP_HIST32_PARAM3_VALUE14)
+#define BP_PXP_HIST32_PARAM3_RSVD13      14
+#define BM_PXP_HIST32_PARAM3_RSVD13 0x0000C000
+#define BF_PXP_HIST32_PARAM3_RSVD13(v)  \
+        (((v) << 14) & BM_PXP_HIST32_PARAM3_RSVD13)
+#define BP_PXP_HIST32_PARAM3_VALUE13      8
+#define BM_PXP_HIST32_PARAM3_VALUE13 0x00003F00
+#define BF_PXP_HIST32_PARAM3_VALUE13(v)  \
+        (((v) << 8) & BM_PXP_HIST32_PARAM3_VALUE13)
+#define BP_PXP_HIST32_PARAM3_RSVD12      6
+#define BM_PXP_HIST32_PARAM3_RSVD12 0x000000C0
+#define BF_PXP_HIST32_PARAM3_RSVD12(v)  \
+        (((v) << 6) & BM_PXP_HIST32_PARAM3_RSVD12)
+#define BP_PXP_HIST32_PARAM3_VALUE12      0
+#define BM_PXP_HIST32_PARAM3_VALUE12 0x0000003F
+#define BF_PXP_HIST32_PARAM3_VALUE12(v)  \
+        (((v) << 0) & BM_PXP_HIST32_PARAM3_VALUE12)
+
+#define HW_PXP_HIST32_PARAM4   (0x00002bc0)
+
+#define BP_PXP_HIST32_PARAM4_RSVD3      30
+#define BM_PXP_HIST32_PARAM4_RSVD3 0xC0000000
+#define BF_PXP_HIST32_PARAM4_RSVD3(v) \
+        (((v) << 30) & BM_PXP_HIST32_PARAM4_RSVD3)
+#define BP_PXP_HIST32_PARAM4_VALUE19      24
+#define BM_PXP_HIST32_PARAM4_VALUE19 0x3F000000
+#define BF_PXP_HIST32_PARAM4_VALUE19(v)  \
+        (((v) << 24) & BM_PXP_HIST32_PARAM4_VALUE19)
+#define BP_PXP_HIST32_PARAM4_RSVD2      22
+#define BM_PXP_HIST32_PARAM4_RSVD2 0x00C00000
+#define BF_PXP_HIST32_PARAM4_RSVD2(v)  \
+        (((v) << 22) & BM_PXP_HIST32_PARAM4_RSVD2)
+#define BP_PXP_HIST32_PARAM4_VALUE18      16
+#define BM_PXP_HIST32_PARAM4_VALUE18 0x003F0000
+#define BF_PXP_HIST32_PARAM4_VALUE18(v)  \
+        (((v) << 16) & BM_PXP_HIST32_PARAM4_VALUE18)
+#define BP_PXP_HIST32_PARAM4_RSVD1      14
+#define BM_PXP_HIST32_PARAM4_RSVD1 0x0000C000
+#define BF_PXP_HIST32_PARAM4_RSVD1(v)  \
+        (((v) << 14) & BM_PXP_HIST32_PARAM4_RSVD1)
+#define BP_PXP_HIST32_PARAM4_VALUE17      8
+#define BM_PXP_HIST32_PARAM4_VALUE17 0x00003F00
+#define BF_PXP_HIST32_PARAM4_VALUE17(v)  \
+        (((v) << 8) & BM_PXP_HIST32_PARAM4_VALUE17)
+#define BP_PXP_HIST32_PARAM4_RSVD0      6
+#define BM_PXP_HIST32_PARAM4_RSVD0 0x000000C0
+#define BF_PXP_HIST32_PARAM4_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_HIST32_PARAM4_RSVD0)
+#define BP_PXP_HIST32_PARAM4_VALUE16      0
+#define BM_PXP_HIST32_PARAM4_VALUE16 0x0000003F
+#define BF_PXP_HIST32_PARAM4_VALUE16(v)  \
+        (((v) << 0) & BM_PXP_HIST32_PARAM4_VALUE16)
+
+#define HW_PXP_HIST32_PARAM5   (0x00002bd0)
+
+#define BP_PXP_HIST32_PARAM5_RSVD7      30
+#define BM_PXP_HIST32_PARAM5_RSVD7 0xC0000000
+#define BF_PXP_HIST32_PARAM5_RSVD7(v) \
+        (((v) << 30) & BM_PXP_HIST32_PARAM5_RSVD7)
+#define BP_PXP_HIST32_PARAM5_VALUE23      24
+#define BM_PXP_HIST32_PARAM5_VALUE23 0x3F000000
+#define BF_PXP_HIST32_PARAM5_VALUE23(v)  \
+        (((v) << 24) & BM_PXP_HIST32_PARAM5_VALUE23)
+#define BP_PXP_HIST32_PARAM5_RSVD6      22
+#define BM_PXP_HIST32_PARAM5_RSVD6 0x00C00000
+#define BF_PXP_HIST32_PARAM5_RSVD6(v)  \
+        (((v) << 22) & BM_PXP_HIST32_PARAM5_RSVD6)
+#define BP_PXP_HIST32_PARAM5_VALUE22      16
+#define BM_PXP_HIST32_PARAM5_VALUE22 0x003F0000
+#define BF_PXP_HIST32_PARAM5_VALUE22(v)  \
+        (((v) << 16) & BM_PXP_HIST32_PARAM5_VALUE22)
+#define BP_PXP_HIST32_PARAM5_RSVD5      14
+#define BM_PXP_HIST32_PARAM5_RSVD5 0x0000C000
+#define BF_PXP_HIST32_PARAM5_RSVD5(v)  \
+        (((v) << 14) & BM_PXP_HIST32_PARAM5_RSVD5)
+#define BP_PXP_HIST32_PARAM5_VALUE21      8
+#define BM_PXP_HIST32_PARAM5_VALUE21 0x00003F00
+#define BF_PXP_HIST32_PARAM5_VALUE21(v)  \
+        (((v) << 8) & BM_PXP_HIST32_PARAM5_VALUE21)
+#define BP_PXP_HIST32_PARAM5_RSVD4      6
+#define BM_PXP_HIST32_PARAM5_RSVD4 0x000000C0
+#define BF_PXP_HIST32_PARAM5_RSVD4(v)  \
+        (((v) << 6) & BM_PXP_HIST32_PARAM5_RSVD4)
+#define BP_PXP_HIST32_PARAM5_VALUE20      0
+#define BM_PXP_HIST32_PARAM5_VALUE20 0x0000003F
+#define BF_PXP_HIST32_PARAM5_VALUE20(v)  \
+        (((v) << 0) & BM_PXP_HIST32_PARAM5_VALUE20)
+
+#define HW_PXP_HIST32_PARAM6   (0x00002be0)
+
+#define BP_PXP_HIST32_PARAM6_RSVD11      30
+#define BM_PXP_HIST32_PARAM6_RSVD11 0xC0000000
+#define BF_PXP_HIST32_PARAM6_RSVD11(v) \
+        (((v) << 30) & BM_PXP_HIST32_PARAM6_RSVD11)
+#define BP_PXP_HIST32_PARAM6_VALUE27      24
+#define BM_PXP_HIST32_PARAM6_VALUE27 0x3F000000
+#define BF_PXP_HIST32_PARAM6_VALUE27(v)  \
+        (((v) << 24) & BM_PXP_HIST32_PARAM6_VALUE27)
+#define BP_PXP_HIST32_PARAM6_RSVD10      22
+#define BM_PXP_HIST32_PARAM6_RSVD10 0x00C00000
+#define BF_PXP_HIST32_PARAM6_RSVD10(v)  \
+        (((v) << 22) & BM_PXP_HIST32_PARAM6_RSVD10)
+#define BP_PXP_HIST32_PARAM6_VALUE26      16
+#define BM_PXP_HIST32_PARAM6_VALUE26 0x003F0000
+#define BF_PXP_HIST32_PARAM6_VALUE26(v)  \
+        (((v) << 16) & BM_PXP_HIST32_PARAM6_VALUE26)
+#define BP_PXP_HIST32_PARAM6_RSVD9      14
+#define BM_PXP_HIST32_PARAM6_RSVD9 0x0000C000
+#define BF_PXP_HIST32_PARAM6_RSVD9(v)  \
+        (((v) << 14) & BM_PXP_HIST32_PARAM6_RSVD9)
+#define BP_PXP_HIST32_PARAM6_VALUE25      8
+#define BM_PXP_HIST32_PARAM6_VALUE25 0x00003F00
+#define BF_PXP_HIST32_PARAM6_VALUE25(v)  \
+        (((v) << 8) & BM_PXP_HIST32_PARAM6_VALUE25)
+#define BP_PXP_HIST32_PARAM6_RSVD8      6
+#define BM_PXP_HIST32_PARAM6_RSVD8 0x000000C0
+#define BF_PXP_HIST32_PARAM6_RSVD8(v)  \
+        (((v) << 6) & BM_PXP_HIST32_PARAM6_RSVD8)
+#define BP_PXP_HIST32_PARAM6_VALUE24      0
+#define BM_PXP_HIST32_PARAM6_VALUE24 0x0000003F
+#define BF_PXP_HIST32_PARAM6_VALUE24(v)  \
+        (((v) << 0) & BM_PXP_HIST32_PARAM6_VALUE24)
+
+#define HW_PXP_HIST32_PARAM7   (0x00002bf0)
+
+#define BP_PXP_HIST32_PARAM7_RSVD15      30
+#define BM_PXP_HIST32_PARAM7_RSVD15 0xC0000000
+#define BF_PXP_HIST32_PARAM7_RSVD15(v) \
+        (((v) << 30) & BM_PXP_HIST32_PARAM7_RSVD15)
+#define BP_PXP_HIST32_PARAM7_VALUE31      24
+#define BM_PXP_HIST32_PARAM7_VALUE31 0x3F000000
+#define BF_PXP_HIST32_PARAM7_VALUE31(v)  \
+        (((v) << 24) & BM_PXP_HIST32_PARAM7_VALUE31)
+#define BP_PXP_HIST32_PARAM7_RSVD14      22
+#define BM_PXP_HIST32_PARAM7_RSVD14 0x00C00000
+#define BF_PXP_HIST32_PARAM7_RSVD14(v)  \
+        (((v) << 22) & BM_PXP_HIST32_PARAM7_RSVD14)
+#define BP_PXP_HIST32_PARAM7_VALUE30      16
+#define BM_PXP_HIST32_PARAM7_VALUE30 0x003F0000
+#define BF_PXP_HIST32_PARAM7_VALUE30(v)  \
+        (((v) << 16) & BM_PXP_HIST32_PARAM7_VALUE30)
+#define BP_PXP_HIST32_PARAM7_RSVD13      14
+#define BM_PXP_HIST32_PARAM7_RSVD13 0x0000C000
+#define BF_PXP_HIST32_PARAM7_RSVD13(v)  \
+        (((v) << 14) & BM_PXP_HIST32_PARAM7_RSVD13)
+#define BP_PXP_HIST32_PARAM7_VALUE29      8
+#define BM_PXP_HIST32_PARAM7_VALUE29 0x00003F00
+#define BF_PXP_HIST32_PARAM7_VALUE29(v)  \
+        (((v) << 8) & BM_PXP_HIST32_PARAM7_VALUE29)
+#define BP_PXP_HIST32_PARAM7_RSVD2      6
+#define BM_PXP_HIST32_PARAM7_RSVD2 0x000000C0
+#define BF_PXP_HIST32_PARAM7_RSVD2(v)  \
+        (((v) << 6) & BM_PXP_HIST32_PARAM7_RSVD2)
+#define BP_PXP_HIST32_PARAM7_VALUE28      0
+#define BM_PXP_HIST32_PARAM7_VALUE28 0x0000003F
+#define BF_PXP_HIST32_PARAM7_VALUE28(v)  \
+        (((v) << 0) & BM_PXP_HIST32_PARAM7_VALUE28)
+
+#define HW_PXP_COMP_CTRL       (0x00002c00)
+#define HW_PXP_COMP_CTRL_SET   (0x00002c04)
+#define HW_PXP_COMP_CTRL_CLR   (0x00002c08)
+#define HW_PXP_COMP_CTRL_TOG   (0x00002c0c)
+
+#define BP_PXP_COMP_CTRL_RSVD0      9
+#define BM_PXP_COMP_CTRL_RSVD0 0xFFFFFE00
+#define BF_PXP_COMP_CTRL_RSVD0(v) \
+        (((v) << 9) & BM_PXP_COMP_CTRL_RSVD0)
+#define BM_PXP_COMP_CTRL_SW_RESET 0x00000100
+#define BF_PXP_COMP_CTRL_SW_RESET(v)  \
+        (((v) << 8) & BM_PXP_COMP_CTRL_SW_RESET)
+#define BP_PXP_COMP_CTRL_RSVD1      1
+#define BM_PXP_COMP_CTRL_RSVD1 0x000000FE
+#define BF_PXP_COMP_CTRL_RSVD1(v)  \
+        (((v) << 1) & BM_PXP_COMP_CTRL_RSVD1)
+#define BM_PXP_COMP_CTRL_START 0x00000001
+#define BF_PXP_COMP_CTRL_START(v)  \
+        (((v) << 0) & BM_PXP_COMP_CTRL_START)
+
+#define HW_PXP_COMP_FORMAT0    (0x00002c10)
+#define HW_PXP_COMP_FORMAT0_SET        (0x00002c14)
+#define HW_PXP_COMP_FORMAT0_CLR        (0x00002c18)
+#define HW_PXP_COMP_FORMAT0_TOG        (0x00002c1c)
+
+#define BP_PXP_COMP_FORMAT0_RSVD0      28
+#define BM_PXP_COMP_FORMAT0_RSVD0 0xF0000000
+#define BF_PXP_COMP_FORMAT0_RSVD0(v) \
+        (((v) << 28) & BM_PXP_COMP_FORMAT0_RSVD0)
+#define BP_PXP_COMP_FORMAT0_PIXEL_PITCH_64B      16
+#define BM_PXP_COMP_FORMAT0_PIXEL_PITCH_64B 0x0FFF0000
+#define BF_PXP_COMP_FORMAT0_PIXEL_PITCH_64B(v)  \
+        (((v) << 16) & BM_PXP_COMP_FORMAT0_PIXEL_PITCH_64B)
+#define BP_PXP_COMP_FORMAT0_RSVD1      10
+#define BM_PXP_COMP_FORMAT0_RSVD1 0x0000FC00
+#define BF_PXP_COMP_FORMAT0_RSVD1(v)  \
+        (((v) << 10) & BM_PXP_COMP_FORMAT0_RSVD1)
+#define BP_PXP_COMP_FORMAT0_MASK_INDEX      8
+#define BM_PXP_COMP_FORMAT0_MASK_INDEX 0x00000300
+#define BF_PXP_COMP_FORMAT0_MASK_INDEX(v)  \
+        (((v) << 8) & BM_PXP_COMP_FORMAT0_MASK_INDEX)
+#define BP_PXP_COMP_FORMAT0_RSVD2      6
+#define BM_PXP_COMP_FORMAT0_RSVD2 0x000000C0
+#define BF_PXP_COMP_FORMAT0_RSVD2(v)  \
+        (((v) << 6) & BM_PXP_COMP_FORMAT0_RSVD2)
+#define BP_PXP_COMP_FORMAT0_FIELD_NUM      4
+#define BM_PXP_COMP_FORMAT0_FIELD_NUM 0x00000030
+#define BF_PXP_COMP_FORMAT0_FIELD_NUM(v)  \
+        (((v) << 4) & BM_PXP_COMP_FORMAT0_FIELD_NUM)
+#define BP_PXP_COMP_FORMAT0_RSVD3      1
+#define BM_PXP_COMP_FORMAT0_RSVD3 0x0000000E
+#define BF_PXP_COMP_FORMAT0_RSVD3(v)  \
+        (((v) << 1) & BM_PXP_COMP_FORMAT0_RSVD3)
+#define BM_PXP_COMP_FORMAT0_FLAG_32B 0x00000001
+#define BF_PXP_COMP_FORMAT0_FLAG_32B(v)  \
+        (((v) << 0) & BM_PXP_COMP_FORMAT0_FLAG_32B)
+
+#define HW_PXP_COMP_FORMAT1    (0x00002c20)
+
+#define BP_PXP_COMP_FORMAT1_D_LEN      29
+#define BM_PXP_COMP_FORMAT1_D_LEN 0xE0000000
+#define BF_PXP_COMP_FORMAT1_D_LEN(v) \
+        (((v) << 29) & BM_PXP_COMP_FORMAT1_D_LEN)
+#define BP_PXP_COMP_FORMAT1_D_OFFSET      24
+#define BM_PXP_COMP_FORMAT1_D_OFFSET 0x1F000000
+#define BF_PXP_COMP_FORMAT1_D_OFFSET(v)  \
+        (((v) << 24) & BM_PXP_COMP_FORMAT1_D_OFFSET)
+#define BP_PXP_COMP_FORMAT1_C_LEN      21
+#define BM_PXP_COMP_FORMAT1_C_LEN 0x00E00000
+#define BF_PXP_COMP_FORMAT1_C_LEN(v)  \
+        (((v) << 21) & BM_PXP_COMP_FORMAT1_C_LEN)
+#define BP_PXP_COMP_FORMAT1_C_OFFSET      16
+#define BM_PXP_COMP_FORMAT1_C_OFFSET 0x001F0000
+#define BF_PXP_COMP_FORMAT1_C_OFFSET(v)  \
+        (((v) << 16) & BM_PXP_COMP_FORMAT1_C_OFFSET)
+#define BP_PXP_COMP_FORMAT1_B_LEN      13
+#define BM_PXP_COMP_FORMAT1_B_LEN 0x0000E000
+#define BF_PXP_COMP_FORMAT1_B_LEN(v)  \
+        (((v) << 13) & BM_PXP_COMP_FORMAT1_B_LEN)
+#define BP_PXP_COMP_FORMAT1_B_OFFSET      8
+#define BM_PXP_COMP_FORMAT1_B_OFFSET 0x00001F00
+#define BF_PXP_COMP_FORMAT1_B_OFFSET(v)  \
+        (((v) << 8) & BM_PXP_COMP_FORMAT1_B_OFFSET)
+#define BP_PXP_COMP_FORMAT1_A_LEN      5
+#define BM_PXP_COMP_FORMAT1_A_LEN 0x000000E0
+#define BF_PXP_COMP_FORMAT1_A_LEN(v)  \
+        (((v) << 5) & BM_PXP_COMP_FORMAT1_A_LEN)
+#define BP_PXP_COMP_FORMAT1_A_OFFSET      0
+#define BM_PXP_COMP_FORMAT1_A_OFFSET 0x0000001F
+#define BF_PXP_COMP_FORMAT1_A_OFFSET(v)  \
+        (((v) << 0) & BM_PXP_COMP_FORMAT1_A_OFFSET)
+
+#define HW_PXP_COMP_FORMAT2    (0x00002c30)
+
+#define BP_PXP_COMP_FORMAT2_RSVD      16
+#define BM_PXP_COMP_FORMAT2_RSVD 0xFFFF0000
+#define BF_PXP_COMP_FORMAT2_RSVD(v) \
+        (((v) << 16) & BM_PXP_COMP_FORMAT2_RSVD)
+#define BP_PXP_COMP_FORMAT2_D_RUNLEN      12
+#define BM_PXP_COMP_FORMAT2_D_RUNLEN 0x0000F000
+#define BF_PXP_COMP_FORMAT2_D_RUNLEN(v)  \
+        (((v) << 12) & BM_PXP_COMP_FORMAT2_D_RUNLEN)
+#define BP_PXP_COMP_FORMAT2_C_RUNLEN      8
+#define BM_PXP_COMP_FORMAT2_C_RUNLEN 0x00000F00
+#define BF_PXP_COMP_FORMAT2_C_RUNLEN(v)  \
+        (((v) << 8) & BM_PXP_COMP_FORMAT2_C_RUNLEN)
+#define BP_PXP_COMP_FORMAT2_B_RUNLEN      4
+#define BM_PXP_COMP_FORMAT2_B_RUNLEN 0x000000F0
+#define BF_PXP_COMP_FORMAT2_B_RUNLEN(v)  \
+        (((v) << 4) & BM_PXP_COMP_FORMAT2_B_RUNLEN)
+#define BP_PXP_COMP_FORMAT2_A_RUNLEN      0
+#define BM_PXP_COMP_FORMAT2_A_RUNLEN 0x0000000F
+#define BF_PXP_COMP_FORMAT2_A_RUNLEN(v)  \
+        (((v) << 0) & BM_PXP_COMP_FORMAT2_A_RUNLEN)
+
+#define HW_PXP_COMP_MASK0      (0x00002c40)
+
+#define BP_PXP_COMP_MASK0_VLD_MASK_LOW      0
+#define BM_PXP_COMP_MASK0_VLD_MASK_LOW 0xFFFFFFFF
+#define BF_PXP_COMP_MASK0_VLD_MASK_LOW(v)   (v)
+
+#define HW_PXP_COMP_MASK1      (0x00002c50)
+
+#define BP_PXP_COMP_MASK1_VLD_MASK_HIGH      0
+#define BM_PXP_COMP_MASK1_VLD_MASK_HIGH 0xFFFFFFFF
+#define BF_PXP_COMP_MASK1_VLD_MASK_HIGH(v)   (v)
+
+#define HW_PXP_COMP_BUFFER_SIZE        (0x00002c60)
+
+#define BP_PXP_COMP_BUFFER_SIZE_RSVD0      29
+#define BM_PXP_COMP_BUFFER_SIZE_RSVD0 0xE0000000
+#define BF_PXP_COMP_BUFFER_SIZE_RSVD0(v) \
+        (((v) << 29) & BM_PXP_COMP_BUFFER_SIZE_RSVD0)
+#define BP_PXP_COMP_BUFFER_SIZE_PIXEL_WIDTH      16
+#define BM_PXP_COMP_BUFFER_SIZE_PIXEL_WIDTH 0x1FFF0000
+#define BF_PXP_COMP_BUFFER_SIZE_PIXEL_WIDTH(v)  \
+        (((v) << 16) & BM_PXP_COMP_BUFFER_SIZE_PIXEL_WIDTH)
+#define BP_PXP_COMP_BUFFER_SIZE_RSVD1      13
+#define BM_PXP_COMP_BUFFER_SIZE_RSVD1 0x0000E000
+#define BF_PXP_COMP_BUFFER_SIZE_RSVD1(v)  \
+        (((v) << 13) & BM_PXP_COMP_BUFFER_SIZE_RSVD1)
+#define BP_PXP_COMP_BUFFER_SIZE_PIXEL_LENGTH      0
+#define BM_PXP_COMP_BUFFER_SIZE_PIXEL_LENGTH 0x00001FFF
+#define BF_PXP_COMP_BUFFER_SIZE_PIXEL_LENGTH(v)  \
+        (((v) << 0) & BM_PXP_COMP_BUFFER_SIZE_PIXEL_LENGTH)
+
+#define HW_PXP_COMP_SOURCE     (0x00002c70)
+
+#define BP_PXP_COMP_SOURCE_SOURCE_ADDR      0
+#define BM_PXP_COMP_SOURCE_SOURCE_ADDR 0xFFFFFFFF
+#define BF_PXP_COMP_SOURCE_SOURCE_ADDR(v)   (v)
+
+#define HW_PXP_COMP_TARGET     (0x00002c80)
+
+#define BP_PXP_COMP_TARGET_TARGET_ADDR      0
+#define BM_PXP_COMP_TARGET_TARGET_ADDR 0xFFFFFFFF
+#define BF_PXP_COMP_TARGET_TARGET_ADDR(v)   (v)
+
+#define HW_PXP_COMP_BUFFER_A   (0x00002c90)
+
+#define BP_PXP_COMP_BUFFER_A_A_SRAM_ADDR      0
+#define BM_PXP_COMP_BUFFER_A_A_SRAM_ADDR 0xFFFFFFFF
+#define BF_PXP_COMP_BUFFER_A_A_SRAM_ADDR(v)   (v)
+
+#define HW_PXP_COMP_BUFFER_B   (0x00002ca0)
+
+#define BP_PXP_COMP_BUFFER_B_B_SRAM_ADDR      0
+#define BM_PXP_COMP_BUFFER_B_B_SRAM_ADDR 0xFFFFFFFF
+#define BF_PXP_COMP_BUFFER_B_B_SRAM_ADDR(v)   (v)
+
+#define HW_PXP_COMP_BUFFER_C   (0x00002cb0)
+
+#define BP_PXP_COMP_BUFFER_C_C_SRAM_ADDR      0
+#define BM_PXP_COMP_BUFFER_C_C_SRAM_ADDR 0xFFFFFFFF
+#define BF_PXP_COMP_BUFFER_C_C_SRAM_ADDR(v)   (v)
+
+#define HW_PXP_COMP_BUFFER_D   (0x00002cc0)
+
+#define BP_PXP_COMP_BUFFER_D_D_SRAM_ADDR      0
+#define BM_PXP_COMP_BUFFER_D_D_SRAM_ADDR 0xFFFFFFFF
+#define BF_PXP_COMP_BUFFER_D_D_SRAM_ADDR(v)   (v)
+
+#define HW_PXP_COMP_DEBUG      (0x00002cd0)
+
+#define BP_PXP_COMP_DEBUG_DEBUG_VALUE      8
+#define BM_PXP_COMP_DEBUG_DEBUG_VALUE 0xFFFFFF00
+#define BF_PXP_COMP_DEBUG_DEBUG_VALUE(v) \
+        (((v) << 8) & BM_PXP_COMP_DEBUG_DEBUG_VALUE)
+#define BP_PXP_COMP_DEBUG_DEBUG_SEL      0
+#define BM_PXP_COMP_DEBUG_DEBUG_SEL 0x000000FF
+#define BF_PXP_COMP_DEBUG_DEBUG_SEL(v)  \
+        (((v) << 0) & BM_PXP_COMP_DEBUG_DEBUG_SEL)
+
+#define HW_PXP_BUS_MUX (0x00002ce0)
+
+#define BP_PXP_BUS_MUX_RSVD1      24
+#define BM_PXP_BUS_MUX_RSVD1 0xFF000000
+#define BF_PXP_BUS_MUX_RSVD1(v) \
+        (((v) << 24) & BM_PXP_BUS_MUX_RSVD1)
+#define BP_PXP_BUS_MUX_WR_SEL      16
+#define BM_PXP_BUS_MUX_WR_SEL 0x00FF0000
+#define BF_PXP_BUS_MUX_WR_SEL(v)  \
+        (((v) << 16) & BM_PXP_BUS_MUX_WR_SEL)
+#define BP_PXP_BUS_MUX_RSVD0      8
+#define BM_PXP_BUS_MUX_RSVD0 0x0000FF00
+#define BF_PXP_BUS_MUX_RSVD0(v)  \
+        (((v) << 8) & BM_PXP_BUS_MUX_RSVD0)
+#define BP_PXP_BUS_MUX_RD_SEL      0
+#define BM_PXP_BUS_MUX_RD_SEL 0x000000FF
+#define BF_PXP_BUS_MUX_RD_SEL(v)  \
+        (((v) << 0) & BM_PXP_BUS_MUX_RD_SEL)
+
+#define HW_PXP_HANDSHAKE_READY_MUX0    (0x00002cf0)
+
+#define BP_PXP_HANDSHAKE_READY_MUX0_HSK7      28
+#define BM_PXP_HANDSHAKE_READY_MUX0_HSK7 0xF0000000
+#define BF_PXP_HANDSHAKE_READY_MUX0_HSK7(v) \
+        (((v) << 28) & BM_PXP_HANDSHAKE_READY_MUX0_HSK7)
+#define BP_PXP_HANDSHAKE_READY_MUX0_HSK6      24
+#define BM_PXP_HANDSHAKE_READY_MUX0_HSK6 0x0F000000
+#define BF_PXP_HANDSHAKE_READY_MUX0_HSK6(v)  \
+        (((v) << 24) & BM_PXP_HANDSHAKE_READY_MUX0_HSK6)
+#define BP_PXP_HANDSHAKE_READY_MUX0_HSK5      20
+#define BM_PXP_HANDSHAKE_READY_MUX0_HSK5 0x00F00000
+#define BF_PXP_HANDSHAKE_READY_MUX0_HSK5(v)  \
+        (((v) << 20) & BM_PXP_HANDSHAKE_READY_MUX0_HSK5)
+#define BP_PXP_HANDSHAKE_READY_MUX0_HSK4      16
+#define BM_PXP_HANDSHAKE_READY_MUX0_HSK4 0x000F0000
+#define BF_PXP_HANDSHAKE_READY_MUX0_HSK4(v)  \
+        (((v) << 16) & BM_PXP_HANDSHAKE_READY_MUX0_HSK4)
+#define BP_PXP_HANDSHAKE_READY_MUX0_HSK3      12
+#define BM_PXP_HANDSHAKE_READY_MUX0_HSK3 0x0000F000
+#define BF_PXP_HANDSHAKE_READY_MUX0_HSK3(v)  \
+        (((v) << 12) & BM_PXP_HANDSHAKE_READY_MUX0_HSK3)
+#define BP_PXP_HANDSHAKE_READY_MUX0_HSK2      8
+#define BM_PXP_HANDSHAKE_READY_MUX0_HSK2 0x00000F00
+#define BF_PXP_HANDSHAKE_READY_MUX0_HSK2(v)  \
+        (((v) << 8) & BM_PXP_HANDSHAKE_READY_MUX0_HSK2)
+#define BP_PXP_HANDSHAKE_READY_MUX0_HSK1      4
+#define BM_PXP_HANDSHAKE_READY_MUX0_HSK1 0x000000F0
+#define BF_PXP_HANDSHAKE_READY_MUX0_HSK1(v)  \
+        (((v) << 4) & BM_PXP_HANDSHAKE_READY_MUX0_HSK1)
+#define BP_PXP_HANDSHAKE_READY_MUX0_HSK0      0
+#define BM_PXP_HANDSHAKE_READY_MUX0_HSK0 0x0000000F
+#define BF_PXP_HANDSHAKE_READY_MUX0_HSK0(v)  \
+        (((v) << 0) & BM_PXP_HANDSHAKE_READY_MUX0_HSK0)
+
+#define HW_PXP_HANDSHAKE_READY_MUX1    (0x00002d00)
+
+#define BP_PXP_HANDSHAKE_READY_MUX1_HSK15      28
+#define BM_PXP_HANDSHAKE_READY_MUX1_HSK15 0xF0000000
+#define BF_PXP_HANDSHAKE_READY_MUX1_HSK15(v) \
+        (((v) << 28) & BM_PXP_HANDSHAKE_READY_MUX1_HSK15)
+#define BP_PXP_HANDSHAKE_READY_MUX1_HSK14      24
+#define BM_PXP_HANDSHAKE_READY_MUX1_HSK14 0x0F000000
+#define BF_PXP_HANDSHAKE_READY_MUX1_HSK14(v)  \
+        (((v) << 24) & BM_PXP_HANDSHAKE_READY_MUX1_HSK14)
+#define BP_PXP_HANDSHAKE_READY_MUX1_HSK13      20
+#define BM_PXP_HANDSHAKE_READY_MUX1_HSK13 0x00F00000
+#define BF_PXP_HANDSHAKE_READY_MUX1_HSK13(v)  \
+        (((v) << 20) & BM_PXP_HANDSHAKE_READY_MUX1_HSK13)
+#define BP_PXP_HANDSHAKE_READY_MUX1_HSK12      16
+#define BM_PXP_HANDSHAKE_READY_MUX1_HSK12 0x000F0000
+#define BF_PXP_HANDSHAKE_READY_MUX1_HSK12(v)  \
+        (((v) << 16) & BM_PXP_HANDSHAKE_READY_MUX1_HSK12)
+#define BP_PXP_HANDSHAKE_READY_MUX1_HSK11      12
+#define BM_PXP_HANDSHAKE_READY_MUX1_HSK11 0x0000F000
+#define BF_PXP_HANDSHAKE_READY_MUX1_HSK11(v)  \
+        (((v) << 12) & BM_PXP_HANDSHAKE_READY_MUX1_HSK11)
+#define BP_PXP_HANDSHAKE_READY_MUX1_HSK10      8
+#define BM_PXP_HANDSHAKE_READY_MUX1_HSK10 0x00000F00
+#define BF_PXP_HANDSHAKE_READY_MUX1_HSK10(v)  \
+        (((v) << 8) & BM_PXP_HANDSHAKE_READY_MUX1_HSK10)
+#define BP_PXP_HANDSHAKE_READY_MUX1_HSK9      4
+#define BM_PXP_HANDSHAKE_READY_MUX1_HSK9 0x000000F0
+#define BF_PXP_HANDSHAKE_READY_MUX1_HSK9(v)  \
+        (((v) << 4) & BM_PXP_HANDSHAKE_READY_MUX1_HSK9)
+#define BP_PXP_HANDSHAKE_READY_MUX1_HSK8      0
+#define BM_PXP_HANDSHAKE_READY_MUX1_HSK8 0x0000000F
+#define BF_PXP_HANDSHAKE_READY_MUX1_HSK8(v)  \
+        (((v) << 0) & BM_PXP_HANDSHAKE_READY_MUX1_HSK8)
+
+#define HW_PXP_HANDSHAKE_DONE_MUX0     (0x00002d10)
+
+#define BP_PXP_HANDSHAKE_DONE_MUX0_HSK7      28
+#define BM_PXP_HANDSHAKE_DONE_MUX0_HSK7 0xF0000000
+#define BF_PXP_HANDSHAKE_DONE_MUX0_HSK7(v) \
+        (((v) << 28) & BM_PXP_HANDSHAKE_DONE_MUX0_HSK7)
+#define BP_PXP_HANDSHAKE_DONE_MUX0_HSK6      24
+#define BM_PXP_HANDSHAKE_DONE_MUX0_HSK6 0x0F000000
+#define BF_PXP_HANDSHAKE_DONE_MUX0_HSK6(v)  \
+        (((v) << 24) & BM_PXP_HANDSHAKE_DONE_MUX0_HSK6)
+#define BP_PXP_HANDSHAKE_DONE_MUX0_HSK5      20
+#define BM_PXP_HANDSHAKE_DONE_MUX0_HSK5 0x00F00000
+#define BF_PXP_HANDSHAKE_DONE_MUX0_HSK5(v)  \
+        (((v) << 20) & BM_PXP_HANDSHAKE_DONE_MUX0_HSK5)
+#define BP_PXP_HANDSHAKE_DONE_MUX0_HSK4      16
+#define BM_PXP_HANDSHAKE_DONE_MUX0_HSK4 0x000F0000
+#define BF_PXP_HANDSHAKE_DONE_MUX0_HSK4(v)  \
+        (((v) << 16) & BM_PXP_HANDSHAKE_DONE_MUX0_HSK4)
+#define BP_PXP_HANDSHAKE_DONE_MUX0_HSK3      12
+#define BM_PXP_HANDSHAKE_DONE_MUX0_HSK3 0x0000F000
+#define BF_PXP_HANDSHAKE_DONE_MUX0_HSK3(v)  \
+        (((v) << 12) & BM_PXP_HANDSHAKE_DONE_MUX0_HSK3)
+#define BP_PXP_HANDSHAKE_DONE_MUX0_HSK2      8
+#define BM_PXP_HANDSHAKE_DONE_MUX0_HSK2 0x00000F00
+#define BF_PXP_HANDSHAKE_DONE_MUX0_HSK2(v)  \
+        (((v) << 8) & BM_PXP_HANDSHAKE_DONE_MUX0_HSK2)
+#define BP_PXP_HANDSHAKE_DONE_MUX0_HSK1      4
+#define BM_PXP_HANDSHAKE_DONE_MUX0_HSK1 0x000000F0
+#define BF_PXP_HANDSHAKE_DONE_MUX0_HSK1(v)  \
+        (((v) << 4) & BM_PXP_HANDSHAKE_DONE_MUX0_HSK1)
+#define BP_PXP_HANDSHAKE_DONE_MUX0_HSK0      0
+#define BM_PXP_HANDSHAKE_DONE_MUX0_HSK0 0x0000000F
+#define BF_PXP_HANDSHAKE_DONE_MUX0_HSK0(v)  \
+        (((v) << 0) & BM_PXP_HANDSHAKE_DONE_MUX0_HSK0)
+
+#define HW_PXP_HANDSHAKE_DONE_MUX1     (0x00002d20)
+
+#define BP_PXP_HANDSHAKE_DONE_MUX1_HSK15      28
+#define BM_PXP_HANDSHAKE_DONE_MUX1_HSK15 0xF0000000
+#define BF_PXP_HANDSHAKE_DONE_MUX1_HSK15(v) \
+        (((v) << 28) & BM_PXP_HANDSHAKE_DONE_MUX1_HSK15)
+#define BP_PXP_HANDSHAKE_DONE_MUX1_HSK14      24
+#define BM_PXP_HANDSHAKE_DONE_MUX1_HSK14 0x0F000000
+#define BF_PXP_HANDSHAKE_DONE_MUX1_HSK14(v)  \
+        (((v) << 24) & BM_PXP_HANDSHAKE_DONE_MUX1_HSK14)
+#define BP_PXP_HANDSHAKE_DONE_MUX1_HSK13      20
+#define BM_PXP_HANDSHAKE_DONE_MUX1_HSK13 0x00F00000
+#define BF_PXP_HANDSHAKE_DONE_MUX1_HSK13(v)  \
+        (((v) << 20) & BM_PXP_HANDSHAKE_DONE_MUX1_HSK13)
+#define BP_PXP_HANDSHAKE_DONE_MUX1_HSK12      16
+#define BM_PXP_HANDSHAKE_DONE_MUX1_HSK12 0x000F0000
+#define BF_PXP_HANDSHAKE_DONE_MUX1_HSK12(v)  \
+        (((v) << 16) & BM_PXP_HANDSHAKE_DONE_MUX1_HSK12)
+#define BP_PXP_HANDSHAKE_DONE_MUX1_HSK11      12
+#define BM_PXP_HANDSHAKE_DONE_MUX1_HSK11 0x0000F000
+#define BF_PXP_HANDSHAKE_DONE_MUX1_HSK11(v)  \
+        (((v) << 12) & BM_PXP_HANDSHAKE_DONE_MUX1_HSK11)
+#define BP_PXP_HANDSHAKE_DONE_MUX1_HSK10      8
+#define BM_PXP_HANDSHAKE_DONE_MUX1_HSK10 0x00000F00
+#define BF_PXP_HANDSHAKE_DONE_MUX1_HSK10(v)  \
+        (((v) << 8) & BM_PXP_HANDSHAKE_DONE_MUX1_HSK10)
+#define BP_PXP_HANDSHAKE_DONE_MUX1_HSK9      4
+#define BM_PXP_HANDSHAKE_DONE_MUX1_HSK9 0x000000F0
+#define BF_PXP_HANDSHAKE_DONE_MUX1_HSK9(v)  \
+        (((v) << 4) & BM_PXP_HANDSHAKE_DONE_MUX1_HSK9)
+#define BP_PXP_HANDSHAKE_DONE_MUX1_HSK8      0
+#define BM_PXP_HANDSHAKE_DONE_MUX1_HSK8 0x0000000F
+#define BF_PXP_HANDSHAKE_DONE_MUX1_HSK8(v)  \
+        (((v) << 0) & BM_PXP_HANDSHAKE_DONE_MUX1_HSK8)
+
+#define HW_PXP_HANDSHAKE_CPU_FETCH     (0x00002d30)
+#define HW_PXP_HANDSHAKE_CPU_FETCH_SET (0x00002d34)
+#define HW_PXP_HANDSHAKE_CPU_FETCH_CLR (0x00002d38)
+#define HW_PXP_HANDSHAKE_CPU_FETCH_TOG (0x00002d3c)
+
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW1_HSK_EN 0x80000000
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW1_HSK_EN(v) \
+        (((v) << 31) & BM_PXP_HANDSHAKE_CPU_FETCH_SW1_HSK_EN)
+#define BP_PXP_HANDSHAKE_CPU_FETCH_RSVD1      22
+#define BM_PXP_HANDSHAKE_CPU_FETCH_RSVD1 0x7FC00000
+#define BF_PXP_HANDSHAKE_CPU_FETCH_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_HANDSHAKE_CPU_FETCH_RSVD1)
+#define BP_PXP_HANDSHAKE_CPU_FETCH_SW1_BUF_LINES      20
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW1_BUF_LINES 0x00300000
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW1_BUF_LINES(v)  \
+        (((v) << 20) & BM_PXP_HANDSHAKE_CPU_FETCH_SW1_BUF_LINES)
+#define BV_PXP_HANDSHAKE_CPU_FETCH_SW1_BUF_LINES__LINE_4  0x0
+#define BV_PXP_HANDSHAKE_CPU_FETCH_SW1_BUF_LINES__LINE_8  0x1
+#define BV_PXP_HANDSHAKE_CPU_FETCH_SW1_BUF_LINES__LINE_16 0x2
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW1_B1_DONE 0x00080000
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW1_B1_DONE(v)  \
+        (((v) << 19) & BM_PXP_HANDSHAKE_CPU_FETCH_SW1_B1_DONE)
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW1_B0_DONE 0x00040000
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW1_B0_DONE(v)  \
+        (((v) << 18) & BM_PXP_HANDSHAKE_CPU_FETCH_SW1_B0_DONE)
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW1_B1_READY 0x00020000
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW1_B1_READY(v)  \
+        (((v) << 17) & BM_PXP_HANDSHAKE_CPU_FETCH_SW1_B1_READY)
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW1_B0_READY 0x00010000
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW1_B0_READY(v)  \
+        (((v) << 16) & BM_PXP_HANDSHAKE_CPU_FETCH_SW1_B0_READY)
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW0_HSK_EN 0x00008000
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW0_HSK_EN(v)  \
+        (((v) << 15) & BM_PXP_HANDSHAKE_CPU_FETCH_SW0_HSK_EN)
+#define BP_PXP_HANDSHAKE_CPU_FETCH_RSVD0      6
+#define BM_PXP_HANDSHAKE_CPU_FETCH_RSVD0 0x00007FC0
+#define BF_PXP_HANDSHAKE_CPU_FETCH_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_HANDSHAKE_CPU_FETCH_RSVD0)
+#define BP_PXP_HANDSHAKE_CPU_FETCH_SW0_BUF_LINES      4
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW0_BUF_LINES 0x00000030
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW0_BUF_LINES(v)  \
+        (((v) << 4) & BM_PXP_HANDSHAKE_CPU_FETCH_SW0_BUF_LINES)
+#define BV_PXP_HANDSHAKE_CPU_FETCH_SW0_BUF_LINES__LINE_4  0x0
+#define BV_PXP_HANDSHAKE_CPU_FETCH_SW0_BUF_LINES__LINE_8  0x1
+#define BV_PXP_HANDSHAKE_CPU_FETCH_SW0_BUF_LINES__LINE_16 0x2
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW0_B1_DONE 0x00000008
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW0_B1_DONE(v)  \
+        (((v) << 3) & BM_PXP_HANDSHAKE_CPU_FETCH_SW0_B1_DONE)
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW0_B0_DONE 0x00000004
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW0_B0_DONE(v)  \
+        (((v) << 2) & BM_PXP_HANDSHAKE_CPU_FETCH_SW0_B0_DONE)
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW0_B1_READY 0x00000002
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW0_B1_READY(v)  \
+        (((v) << 1) & BM_PXP_HANDSHAKE_CPU_FETCH_SW0_B1_READY)
+#define BM_PXP_HANDSHAKE_CPU_FETCH_SW0_B0_READY 0x00000001
+#define BF_PXP_HANDSHAKE_CPU_FETCH_SW0_B0_READY(v)  \
+        (((v) << 0) & BM_PXP_HANDSHAKE_CPU_FETCH_SW0_B0_READY)
+
+#define HW_PXP_HANDSHAKE_CPU_STORE     (0x00002d40)
+#define HW_PXP_HANDSHAKE_CPU_STORE_SET (0x00002d44)
+#define HW_PXP_HANDSHAKE_CPU_STORE_CLR (0x00002d48)
+#define HW_PXP_HANDSHAKE_CPU_STORE_TOG (0x00002d4c)
+
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW1_HSK_EN 0x80000000
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW1_HSK_EN(v) \
+        (((v) << 31) & BM_PXP_HANDSHAKE_CPU_STORE_SW1_HSK_EN)
+#define BP_PXP_HANDSHAKE_CPU_STORE_RSVD1      22
+#define BM_PXP_HANDSHAKE_CPU_STORE_RSVD1 0x7FC00000
+#define BF_PXP_HANDSHAKE_CPU_STORE_RSVD1(v)  \
+        (((v) << 22) & BM_PXP_HANDSHAKE_CPU_STORE_RSVD1)
+#define BP_PXP_HANDSHAKE_CPU_STORE_SW1_BUF_LINES      20
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW1_BUF_LINES 0x00300000
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW1_BUF_LINES(v)  \
+        (((v) << 20) & BM_PXP_HANDSHAKE_CPU_STORE_SW1_BUF_LINES)
+#define BV_PXP_HANDSHAKE_CPU_STORE_SW1_BUF_LINES__LINE_4  0x0
+#define BV_PXP_HANDSHAKE_CPU_STORE_SW1_BUF_LINES__LINE_8  0x1
+#define BV_PXP_HANDSHAKE_CPU_STORE_SW1_BUF_LINES__LINE_16 0x2
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW1_B1_DONE 0x00080000
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW1_B1_DONE(v)  \
+        (((v) << 19) & BM_PXP_HANDSHAKE_CPU_STORE_SW1_B1_DONE)
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW1_B0_DONE 0x00040000
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW1_B0_DONE(v)  \
+        (((v) << 18) & BM_PXP_HANDSHAKE_CPU_STORE_SW1_B0_DONE)
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW1_B1_READY 0x00020000
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW1_B1_READY(v)  \
+        (((v) << 17) & BM_PXP_HANDSHAKE_CPU_STORE_SW1_B1_READY)
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW1_B0_READY 0x00010000
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW1_B0_READY(v)  \
+        (((v) << 16) & BM_PXP_HANDSHAKE_CPU_STORE_SW1_B0_READY)
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW0_HSK_EN 0x00008000
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW0_HSK_EN(v)  \
+        (((v) << 15) & BM_PXP_HANDSHAKE_CPU_STORE_SW0_HSK_EN)
+#define BP_PXP_HANDSHAKE_CPU_STORE_RSVD0      6
+#define BM_PXP_HANDSHAKE_CPU_STORE_RSVD0 0x00007FC0
+#define BF_PXP_HANDSHAKE_CPU_STORE_RSVD0(v)  \
+        (((v) << 6) & BM_PXP_HANDSHAKE_CPU_STORE_RSVD0)
+#define BP_PXP_HANDSHAKE_CPU_STORE_SW0_BUF_LINES      4
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW0_BUF_LINES 0x00000030
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW0_BUF_LINES(v)  \
+        (((v) << 4) & BM_PXP_HANDSHAKE_CPU_STORE_SW0_BUF_LINES)
+#define BV_PXP_HANDSHAKE_CPU_STORE_SW0_BUF_LINES__LINE_4  0x0
+#define BV_PXP_HANDSHAKE_CPU_STORE_SW0_BUF_LINES__LINE_8  0x1
+#define BV_PXP_HANDSHAKE_CPU_STORE_SW0_BUF_LINES__LINE_16 0x2
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW0_B1_DONE 0x00000008
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW0_B1_DONE(v)  \
+        (((v) << 3) & BM_PXP_HANDSHAKE_CPU_STORE_SW0_B1_DONE)
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW0_B0_DONE 0x00000004
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW0_B0_DONE(v)  \
+        (((v) << 2) & BM_PXP_HANDSHAKE_CPU_STORE_SW0_B0_DONE)
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW0_B1_READY 0x00000002
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW0_B1_READY(v)  \
+        (((v) << 1) & BM_PXP_HANDSHAKE_CPU_STORE_SW0_B1_READY)
+#define BM_PXP_HANDSHAKE_CPU_STORE_SW0_B0_READY 0x00000001
+#define BF_PXP_HANDSHAKE_CPU_STORE_SW0_B0_READY(v)  \
+        (((v) << 0) & BM_PXP_HANDSHAKE_CPU_STORE_SW0_B0_READY)
+#endif /* __ARCH_ARM___PXP_H */

diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h
index 7d964e7..63fe0a0 100644 (file)
--- a/include/linux/platform_data/dma-imx.h
+++ b/include/linux/platform_data/dma-imx.h
@@ -62,6 +62,11 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan)
        return !strcmp(dev_name(chan->device->dev), "ipu-core");
 }
 
+static inline int imx_dma_is_pxp(struct dma_chan *chan)
+{
+        return strstr(dev_name(chan->device->dev), "pxp") != NULL;
+}
+
 static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
 {
        return !strcmp(chan->device->dev->driver->name, "imx-sdma") ||

diff --git a/include/linux/pxp_device.h b/include/linux/pxp_device.h
new file mode 100644 (file)
index 0000000..df185c4
--- /dev/null
+++ b/include/linux/pxp_device.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+#ifndef _PXP_DEVICE
+#define _PXP_DEVICE
+
+#include <linux/idr.h>
+#include <linux/hash.h>
+#include <uapi/linux/pxp_device.h>
+
+struct pxp_irq_info {
+       wait_queue_head_t waitq;
+       atomic_t irq_pending;
+       int hist_status;
+};
+
+struct pxp_buffer_hash {
+       struct hlist_head *hash_table;
+       u32 order;
+       spinlock_t hash_lock;
+};
+
+struct pxp_buf_obj {
+       uint32_t handle;
+
+       uint32_t size;
+       uint32_t mem_type;
+
+       unsigned long offset;
+       void *virtual;
+
+       struct hlist_node item;
+};
+
+struct pxp_chan_obj {
+       uint32_t handle;
+       struct dma_chan *chan;
+};
+
+/* File private data */
+struct pxp_file {
+       struct file *filp;
+
+       /* record allocated dma buffer */
+       struct idr buffer_idr;
+       spinlock_t buffer_lock;
+
+       /* record allocated dma channel */
+       struct idr channel_idr;
+       spinlock_t channel_lock;
+};
+
+#endif

diff --git a/include/linux/pxp_dma.h b/include/linux/pxp_dma.h
new file mode 100644 (file)
index 0000000..61e38a7
--- /dev/null
+++ b/include/linux/pxp_dma.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+#ifndef _PXP_DMA
+#define _PXP_DMA
+
+#include <uapi/linux/pxp_dma.h>
+
+struct pxp_tx_desc {
+       struct dma_async_tx_descriptor txd;
+       struct list_head tx_list;
+       struct list_head list;
+       int len;
+       union {
+               struct pxp_layer_param s0_param;
+               struct pxp_layer_param out_param;
+               struct pxp_layer_param ol_param;
+               struct pxp_layer_param processing_param;
+       } layer_param;
+       struct pxp_proc_data proc_data;
+
+       u32 hist_status;        /* Histogram output status */
+
+       struct pxp_tx_desc *next;
+};
+
+struct pxp_channel {
+       struct dma_chan dma_chan;
+       dma_cookie_t completed; /* last completed cookie */
+       enum pxp_channel_status status;
+       void *client;           /* Only one client per channel */
+       unsigned int n_tx_desc;
+       struct pxp_tx_desc *desc;       /* allocated tx-descriptors */
+       struct list_head active_list;   /* active tx-descriptors */
+       struct list_head free_list;     /* free tx-descriptors */
+       struct list_head queue; /* queued tx-descriptors */
+       struct list_head list;  /* track queued channel number */
+       spinlock_t lock;        /* protects sg[0,1], queue */
+       struct mutex chan_mutex;        /* protects status, cookie, free_list */
+       int active_buffer;
+       unsigned int eof_irq;
+       char eof_name[16];      /* EOF IRQ name for request_irq()  */
+};
+
+#define to_tx_desc(tx) container_of(tx, struct pxp_tx_desc, txd)
+#define to_pxp_channel(d) container_of(d, struct pxp_channel, dma_chan)
+
+void pxp_txd_ack(struct dma_async_tx_descriptor *txd,
+                struct pxp_channel *pxp_chan);
+
+#ifdef CONFIG_MXC_PXP_CLIENT_DEVICE
+int register_pxp_device(void);
+void unregister_pxp_device(void);
+#else
+int register_pxp_device(void) { return 0; }
+void unregister_pxp_device(void) {}
+#endif
+void pxp_fill(
+        u32 bpp,
+        u32 value,
+        u32 width,
+        u32 height,
+        u32 output_buffer,
+        u32 output_pitch);
+
+void m4_process(void);
+#endif

diff --git a/include/uapi/linux/pxp_device.h b/include/uapi/linux/pxp_device.h
new file mode 100644 (file)
index 0000000..fce89ce
--- /dev/null
+++ b/include/uapi/linux/pxp_device.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+#ifndef _UAPI_PXP_DEVICE
+#define _UAPI_PXP_DEVICE
+
+#include <linux/pxp_dma.h>
+
+struct pxp_chan_handle {
+       unsigned int handle;
+       int hist_status;
+};
+
+struct pxp_mem_desc {
+       unsigned int handle;
+       unsigned int size;
+       dma_addr_t phys_addr;
+       unsigned int virt_uaddr;                /* virtual user space address */
+       unsigned int mtype;
+};
+
+struct pxp_mem_flush {
+       unsigned int handle;
+       unsigned int type;
+};
+
+#define PXP_IOC_MAGIC  'P'
+
+#define PXP_IOC_GET_CHAN      _IOR(PXP_IOC_MAGIC, 0, struct pxp_mem_desc)
+#define PXP_IOC_PUT_CHAN      _IOW(PXP_IOC_MAGIC, 1, struct pxp_mem_desc)
+#define PXP_IOC_CONFIG_CHAN   _IOW(PXP_IOC_MAGIC, 2, struct pxp_mem_desc)
+#define PXP_IOC_START_CHAN    _IOW(PXP_IOC_MAGIC, 3, struct pxp_mem_desc)
+#define PXP_IOC_GET_PHYMEM    _IOWR(PXP_IOC_MAGIC, 4, struct pxp_mem_desc)
+#define PXP_IOC_PUT_PHYMEM    _IOW(PXP_IOC_MAGIC, 5, struct pxp_mem_desc)
+#define PXP_IOC_WAIT4CMPLT    _IOWR(PXP_IOC_MAGIC, 6, struct pxp_mem_desc)
+#define PXP_IOC_FLUSH_PHYMEM   _IOR(PXP_IOC_MAGIC, 7, struct pxp_mem_flush)
+
+/* Memory types supported*/
+#define MEMORY_TYPE_UNCACHED 0x0
+#define MEMORY_TYPE_WC      0x1
+#define MEMORY_TYPE_CACHED   0x2
+
+/* Cache flush operations */
+#define CACHE_CLEAN      0x1
+#define CACHE_INVALIDATE 0x2
+#define CACHE_FLUSH      0x4
+
+#endif

diff --git a/include/uapi/linux/pxp_dma.h b/include/uapi/linux/pxp_dma.h
new file mode 100644 (file)
index 0000000..6aa0139
--- /dev/null
+++ b/include/uapi/linux/pxp_dma.h
@@ -0,0 +1,283 @@
+/*
+ * Copyright (C) 2013-2015 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+#ifndef _UAPI_PXP_DMA
+#define _UAPI_PXP_DMA
+
+#include <linux/posix_types.h>
+#include <linux/types.h>
+
+#ifndef __KERNEL__
+typedef unsigned long dma_addr_t;
+typedef unsigned char bool;
+#endif
+
+/*  PXP Pixel format definitions */
+/*  Four-character-code (FOURCC) */
+#define fourcc(a, b, c, d)\
+       (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
+
+/*!
+ * @name PXP Pixel Formats
+ *
+ * Pixel formats are defined with ASCII FOURCC code. The pixel format codes are
+ * the same used by V4L2 API.
+ */
+
+/*! @} */
+/*! @name RGB Formats */
+/*! @{ */
+#define PXP_PIX_FMT_RGB332  fourcc('R', 'G', 'B', '1') /*!<  8  RGB-3-3-2    */
+#define PXP_PIX_FMT_RGB555  fourcc('R', 'G', 'B', 'O') /*!< 16  RGB-5-5-5    */
+#define PXP_PIX_FMT_RGB565  fourcc('R', 'G', 'B', 'P') /*!< 1 6  RGB-5-6-5   */
+#define PXP_PIX_FMT_RGB666  fourcc('R', 'G', 'B', '6') /*!< 18  RGB-6-6-6    */
+#define PXP_PIX_FMT_BGR666  fourcc('B', 'G', 'R', '6') /*!< 18  BGR-6-6-6    */
+#define PXP_PIX_FMT_BGR24   fourcc('B', 'G', 'R', '3') /*!< 24  BGR-8-8-8    */
+#define PXP_PIX_FMT_RGB24   fourcc('R', 'G', 'B', '3') /*!< 24  RGB-8-8-8    */
+#define PXP_PIX_FMT_BGR32   fourcc('B', 'G', 'R', '4') /*!< 32  BGR-8-8-8-8  */
+#define PXP_PIX_FMT_BGRA32  fourcc('B', 'G', 'R', 'A') /*!< 32  BGR-8-8-8-8  */
+#define PXP_PIX_FMT_RGB32   fourcc('R', 'G', 'B', '4') /*!< 32  RGB-8-8-8-8  */
+#define PXP_PIX_FMT_RGBA32  fourcc('R', 'G', 'B', 'A') /*!< 32  RGB-8-8-8-8  */
+#define PXP_PIX_FMT_ABGR32  fourcc('A', 'B', 'G', 'R') /*!< 32  ABGR-8-8-8-8 */
+/*! @} */
+/*! @name YUV Interleaved Formats */
+/*! @{ */
+#define PXP_PIX_FMT_YUYV    fourcc('Y', 'U', 'Y', 'V') /*!< 16 YUV 4:2:2 */
+#define PXP_PIX_FMT_UYVY    fourcc('U', 'Y', 'V', 'Y') /*!< 16 YUV 4:2:2 */
+#define PXP_PIX_FMT_VYUY    fourcc('V', 'Y', 'U', 'Y')  /*!< 16 YVU 4:2:2 */
+#define PXP_PIX_FMT_YVYU    fourcc('Y', 'V', 'Y', 'U')  /*!< 16 YVU 4:2:2 */
+#define PXP_PIX_FMT_Y41P    fourcc('Y', '4', '1', 'P') /*!< 12 YUV 4:1:1 */
+#define PXP_PIX_FMT_VUY444  fourcc('V', 'U', 'Y', 'A') /*!< 32 VUYA 8:8:8 */
+/* two planes -- one Y, one Cb + Cr interleaved  */
+#define PXP_PIX_FMT_NV12    fourcc('N', 'V', '1', '2') /* 12  Y/CbCr 4:2:0  */
+#define PXP_PIX_FMT_NV21    fourcc('N', 'V', '2', '1') /* 12  Y/CbCr 4:2:0  */
+#define PXP_PIX_FMT_NV16    fourcc('N', 'V', '1', '6') /* 12  Y/CbCr 4:2:2  */
+#define PXP_PIX_FMT_NV61    fourcc('N', 'V', '6', '1') /* 12  Y/CbCr 4:2:2  */
+/*! @} */
+/*! @name YUV Planar Formats */
+/*! @{ */
+#define PXP_PIX_FMT_GREY    fourcc('G', 'R', 'E', 'Y') /*!< 8  Greyscale */
+#define PXP_PIX_FMT_GY04    fourcc('G', 'Y', '0', '4') /*!< 4  Greyscale */
+#define PXP_PIX_FMT_YVU410P fourcc('Y', 'V', 'U', '9') /*!< 9  YVU 4:1:0 */
+#define PXP_PIX_FMT_YUV410P fourcc('Y', 'U', 'V', '9') /*!< 9  YUV 4:1:0 */
+#define PXP_PIX_FMT_YVU420P fourcc('Y', 'V', '1', '2') /*!< 12 YVU 4:2:0 */
+#define PXP_PIX_FMT_YUV420P fourcc('I', '4', '2', '0') /*!< 12 YUV 4:2:0 */
+#define PXP_PIX_FMT_YUV420P2 fourcc('Y', 'U', '1', '2')        /*!< 12 YUV 4:2:0 */
+#define PXP_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6') /*!< 16 YVU 4:2:2 */
+#define PXP_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P') /*!< 16 YUV 4:2:2 */
+/*! @} */
+
+#define PXP_LUT_NONE                   0x0
+#define PXP_LUT_INVERT                 0x1
+#define PXP_LUT_BLACK_WHITE            0x2
+#define PXP_LUT_USE_CMAP               0x4
+
+/* dithering modes enum */
+#define PXP_DITHER_PASS_THROUGH 0
+#define PXP_DITHER_FLOYD       1
+#define PXP_DITHER_ATKINSON    2
+#define PXP_DITHER_ORDERED     3
+#define PXP_DITHER_QUANT_ONLY  4
+
+#define NR_PXP_VIRT_CHANNEL    16
+
+#define PXP_IOC_MAGIC  'P'
+
+#define PXP_IOC_GET_CHAN      _IOR(PXP_IOC_MAGIC, 0, struct pxp_mem_desc)
+#define PXP_IOC_PUT_CHAN      _IOW(PXP_IOC_MAGIC, 1, struct pxp_mem_desc)
+#define PXP_IOC_CONFIG_CHAN   _IOW(PXP_IOC_MAGIC, 2, struct pxp_mem_desc)
+#define PXP_IOC_START_CHAN    _IOW(PXP_IOC_MAGIC, 3, struct pxp_mem_desc)
+#define PXP_IOC_GET_PHYMEM    _IOWR(PXP_IOC_MAGIC, 4, struct pxp_mem_desc)
+#define PXP_IOC_PUT_PHYMEM    _IOW(PXP_IOC_MAGIC, 5, struct pxp_mem_desc)
+#define PXP_IOC_WAIT4CMPLT    _IOWR(PXP_IOC_MAGIC, 6, struct pxp_mem_desc)
+
+#define PXP_IOC_FILL_DATA    _IOWR(PXP_IOC_MAGIC, 7, struct pxp_mem_desc)
+
+/* Order significant! */
+enum pxp_channel_status {
+       PXP_CHANNEL_FREE,
+       PXP_CHANNEL_INITIALIZED,
+       PXP_CHANNEL_READY,
+};
+
+enum pxp_working_mode {
+       PXP_MODE_LEGACY                 = 0x1,
+       PXP_MODE_STANDARD               = 0x2,
+       PXP_MODE_ADVANCED               = 0x4,
+};
+
+enum pxp_buffer_flag {
+       PXP_BUF_FLAG_WFE_A_FETCH0       = 0x0001,
+       PXP_BUF_FLAG_WFE_A_FETCH1       = 0x0002,
+       PXP_BUF_FLAG_WFE_A_STORE0       = 0x0004,
+       PXP_BUF_FLAG_WFE_A_STORE1       = 0x0008,
+       PXP_BUF_FLAG_WFE_B_FETCH0       = 0x0010,
+       PXP_BUF_FLAG_WFE_B_FETCH1       = 0x0020,
+       PXP_BUF_FLAG_WFE_B_STORE0       = 0x0040,
+       PXP_BUF_FLAG_WFE_B_STORE1       = 0x0080,
+       PXP_BUF_FLAG_DITHER_FETCH0      = 0x0100,
+       PXP_BUF_FLAG_DITHER_FETCH1      = 0x0200,
+       PXP_BUF_FLAG_DITHER_STORE0      = 0x0400,
+       PXP_BUF_FLAG_DITHER_STORE1      = 0x0800,
+};
+
+enum pxp_engine_ctrl {
+       PXP_ENABLE_ROTATE0              = 0x001,
+       PXP_ENABLE_ROTATE1              = 0x002,
+       PXP_ENABLE_LUT                  = 0x004,
+       PXP_ENABLE_CSC2                 = 0x008,
+       PXP_ENABLE_ALPHA_B              = 0x010,
+       PXP_ENABLE_INPUT_FETCH_SOTRE    = 0x020,
+       PXP_ENABLE_WFE_B                = 0x040,
+       PXP_ENABLE_WFE_A                = 0x080,
+       PXP_ENABLE_DITHER               = 0x100,
+       PXP_ENABLE_PS_AS_OUT            = 0x200,
+       PXP_ENABLE_COLLISION_DETECT     = 0x400,
+       PXP_ENABLE_HANDSHAKE            = 0x1000,
+       PXP_ENABLE_DITHER_BYPASS        = 0x2000,
+};
+
+struct rect {
+       int top;                /* Upper left coordinate of rectangle */
+       int left;
+       int width;
+       int height;
+};
+
+struct pxp_layer_param {
+       unsigned short left;
+       unsigned short top;
+       unsigned short width;
+       unsigned short height;
+       unsigned short stride; /* aka pitch */
+       unsigned int pixel_fmt;
+
+       unsigned int flag;
+       /* layers combining parameters
+        * (these are ignored for S0 and output
+        * layers, and only apply for OL layer)
+        */
+       bool combine_enable;
+       unsigned int color_key_enable;
+       unsigned int color_key;
+       bool global_alpha_enable;
+       /* global alpha is either override or multiply */
+       bool global_override;
+       unsigned char global_alpha;
+       bool alpha_invert;
+       bool local_alpha_enable;
+       int comp_mask;
+
+       dma_addr_t paddr;
+};
+
+struct pxp_collision_info {
+       unsigned int pixel_cnt;
+       unsigned int rect_min_x;
+       unsigned int rect_min_y;
+       unsigned int rect_max_x;
+       unsigned int rect_max_y;
+       unsigned int victim_luts[2];
+};
+
+struct pxp_proc_data {
+       /* S0 Transformation Info */
+       int scaling;
+       int hflip;
+       int vflip;
+       int rotate;
+       int rot_pos;
+       int yuv;
+
+       /* Source rectangle (srect) defines the sub-rectangle
+        * within S0 to undergo processing.
+        */
+       struct rect srect;
+       /* Dest rect (drect) defines how to position the processed
+        * source rectangle (after resizing) within the output frame,
+        * whose dimensions are defined in pxp->pxp_conf_state.out_param
+        */
+       struct rect drect;
+
+       /* Current S0 configuration */
+       unsigned int bgcolor;
+
+       /* Output overlay support */
+       int overlay_state;
+
+       /* LUT transformation on Y data */
+       int lut_transform;
+       unsigned char *lut_map; /* 256 entries */
+       bool lut_map_updated; /* Map recently changed */
+       bool combine_enable;
+
+       /* the mode pxp's working against */
+       enum pxp_working_mode working_mode;
+       enum pxp_engine_ctrl engine_enable;
+
+       /* wfe */
+/*
+ * partial:
+ *         0 - full update
+ *         1 - partial update
+ * alpha_en:
+ *         0 - upd is {Y4[3:0],4'b0000} format
+ *         1 - upd is {Y4[3:0],3'b000,alpha} format
+ * reagl_en:
+ *         0 - use normal waveform algorithm
+ *         1 - enable reagl/-d waveform algorithm
+ * detection_only:
+ *         0 - write working buffer
+ *         1 - do no write working buffer, detection only
+ * lut:
+ *         valid value 0-63
+ *         set to the lut used for next update
+ */
+       bool partial_update;
+       bool alpha_en;
+       bool lut_update;
+       bool reagl_en;          /* enable reagl/-d */
+       bool reagl_d_en;        /* enable reagl or reagl-d */
+       bool detection_only;
+       int lut;
+       unsigned int lut_status_1;
+       unsigned int lut_status_2;
+
+       /* Dithering specific data */
+       int dither_mode;
+       unsigned int quant_bit;
+};
+
+struct pxp_config_data {
+       struct pxp_layer_param s0_param;
+       struct pxp_layer_param ol_param[8];
+       struct pxp_layer_param out_param;
+       struct pxp_layer_param wfe_a_fetch_param[2];
+       struct pxp_layer_param wfe_a_store_param[2];
+       struct pxp_layer_param wfe_b_fetch_param[2];
+       struct pxp_layer_param wfe_b_store_param[2];
+       struct pxp_layer_param dither_fetch_param[2];
+       struct pxp_layer_param dither_store_param[2];
+       struct pxp_proc_data proc_data;
+       int layer_nr;
+
+       /* Users don't touch */
+       int handle;
+};
+
+#endif