ARM: 9004/1: debug: Split waituart to CTS and TXRDY

This patch was triggered by a remark from Russell that
introducing a call to the waituart (needed to fix debug prints
on the Qualcomm platforms) was dangerous because in some cases
this will involve waiting for a modem CTS (clear to send)
signal, and debug messages would maybe not work on platforms
with no modem connected to the UART port: they will just
hang waiting for the modem to assert CTS and this might never
happen.

Looking through all UART debug drivers implementing the waituart
macro I discovered that all users except two actually use this
macro to check if the UART is ready for TX, let's call this
TXRDY.

Only two debug UART drivers actually check for CTS:
- arch/arm/include/debug/8250.S
- arch/arm/include/debug/tegra.S

The former is very significant since the 8250 is possibly
the most common UART on the planet.

We have the following problem: the semantics of waituart are
ambiguous making it dangerous to introduce the macro to debug
code fixing debug prints for Qualcomm. To start to pry this
problem apart, this patch does the following:

- Convert all debug UART drivers to define two macros:

  - waituartcts with the clear semantic to wait for CTS
    to be asserted

  - waituarttxrdy with the clear semantic to wait for the TX
    capability of the UART to be ready

- When doing this take care to assign the right function to
  each drivers macro, so they now do exactly the above.

- Update the three sites in the kernel invoking the waituart
  macro to call waituartcts/waituarttxrdy in sequence, so that
  the functional impact on the kernel should be zero.

After this we can start to change the code sites using this
code to do the right thing.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

diff --git a/arch/arm/boot/compressed/debug.S b/arch/arm/boot/compressed/debug.S
index 6bf2917..97f4e74 100644 (file)
--- a/arch/arm/boot/compressed/debug.S
+++ b/arch/arm/boot/compressed/debug.S
@@ -8,7 +8,8 @@
 
 ENTRY(putc)
        addruart r1, r2, r3
-       waituart r3, r1
+       waituartcts r3, r1
+       waituarttxrdy r3, r1
        senduart r0, r1
        busyuart r3, r1
        mov      pc, lr

diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S
index e4a036f..769246d 100644 (file)
--- a/arch/arm/include/debug/8250.S
+++ b/arch/arm/include/debug/8250.S
@@ -45,7 +45,10 @@
                bne     1002b
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituarttxrdy,rd,rx
+               .endm
+
+               .macro  waituartcts,rd,rx
 #ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL
 1001:          load    \rd, [\rx, #UART_MSR << UART_SHIFT]
                tst     \rd, #UART_MSR_CTS

diff --git a/arch/arm/include/debug/asm9260.S b/arch/arm/include/debug/asm9260.S
index 0da1eb6..5a0ce14 100644 (file)
--- a/arch/arm/include/debug/asm9260.S
+++ b/arch/arm/include/debug/asm9260.S
@@ -11,7 +11,10 @@
                ldr     \rv, = CONFIG_DEBUG_UART_VIRT
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituarttxrdy,rd,rx
+               .endm
+
+               .macro  waituartcts,rd,rx
                .endm
 
                .macro  senduart,rd,rx

diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
index 6c91cba..1772282 100644 (file)
--- a/arch/arm/include/debug/at91.S
+++ b/arch/arm/include/debug/at91.S
@@ -19,12 +19,15 @@
        strb    \rd, [\rx, #(AT91_DBGU_THR)]            @ Write to Transmitter Holding Register
        .endm
 
-       .macro  waituart,rd,rx
+       .macro  waituarttxrdy,rd,rx
 1001:  ldr     \rd, [\rx, #(AT91_DBGU_SR)]             @ Read Status Register
        tst     \rd, #AT91_DBGU_TXRDY                   @ DBGU_TXRDY = 1 when ready to transmit
        beq     1001b
        .endm
 
+       .macro  waituartcts,rd,rx
+       .endm
+
        .macro  busyuart,rd,rx
 1001:  ldr     \rd, [\rx, #(AT91_DBGU_SR)]             @ Read Status Register
        tst     \rd, #AT91_DBGU_TXEMPTY                 @ DBGU_TXEMPTY = 1 when transmission complete

diff --git a/arch/arm/include/debug/bcm63xx.S b/arch/arm/include/debug/bcm63xx.S
index 06a8962..da65abb 100644 (file)
--- a/arch/arm/include/debug/bcm63xx.S
+++ b/arch/arm/include/debug/bcm63xx.S
@@ -17,12 +17,15 @@
        strb    \rd, [\rx, #UART_FIFO_REG]
        .endm
 
-       .macro  waituart, rd, rx
+       .macro  waituarttxrdy, rd, rx
 1001:  ldr     \rd, [\rx, #UART_IR_REG]
        tst     \rd, #(1 << UART_IR_TXEMPTY)
        beq     1001b
        .endm
 
+       .macro  waituartcts, rd, rx
+       .endm
+
        .macro  busyuart, rd, rx
 1002:  ldr     \rd, [\rx, #UART_IR_REG]
        tst     \rd, #(1 << UART_IR_TXTRESH)

diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index 132a20c..7ffe669 100644 (file)
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -142,7 +142,10 @@ ARM_BE8(   rev     \rd, \rd )
                bne     1002b
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituarttxrdy,rd,rx
+               .endm
+
+               .macro  waituartcts,rd,rx
                .endm
 
 /*

diff --git a/arch/arm/include/debug/clps711x.S b/arch/arm/include/debug/clps711x.S
index 774a67a..a983d12 100644 (file)
--- a/arch/arm/include/debug/clps711x.S
+++ b/arch/arm/include/debug/clps711x.S
@@ -20,7 +20,10 @@
        ldr     \rp, =CLPS711X_UART_PADDR
        .endm
 
-       .macro  waituart,rd,rx
+       .macro  waituartcts,rd,rx
+       .endm
+
+       .macro  waituarttxrdy,rd,rx
        .endm
 
        .macro  senduart,rd,rx

diff --git a/arch/arm/include/debug/dc21285.S b/arch/arm/include/debug/dc21285.S
index d7e8c71..4ec0e5e 100644 (file)
--- a/arch/arm/include/debug/dc21285.S
+++ b/arch/arm/include/debug/dc21285.S
@@ -34,5 +34,8 @@
                bne     1001b
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituartcts,rd,rx
+               .endm
+
+               .macro  waituarttxrdy,rd,rx
                .endm

diff --git a/arch/arm/include/debug/digicolor.S b/arch/arm/include/debug/digicolor.S
index 256f5f4..443674c 100644 (file)
--- a/arch/arm/include/debug/digicolor.S
+++ b/arch/arm/include/debug/digicolor.S
@@ -21,7 +21,10 @@
                strb    \rd, [\rx, #UA0_EMI_REC]
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituartcts,rd,rx
+               .endm
+
+               .macro  waituarttxrdy,rd,rx
                .endm
 
        .macro  busyuart,rd,rx

diff --git a/arch/arm/include/debug/efm32.S b/arch/arm/include/debug/efm32.S
index 5ed5028..b0083d6 100644 (file)
--- a/arch/arm/include/debug/efm32.S
+++ b/arch/arm/include/debug/efm32.S
@@ -29,7 +29,10 @@
                strb    \rd, [\rx, #UARTn_TXDATA]
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituartcts,rd,rx
+               .endm
+
+               .macro  waituarttxrdy,rd,rx
 1001:          ldr     \rd, [\rx, #UARTn_STATUS]
                tst     \rd, #UARTn_STATUS_TXBL
                beq     1001b

diff --git a/arch/arm/include/debug/icedcc.S b/arch/arm/include/debug/icedcc.S
index 74a0dd0..d5e65da 100644 (file)
--- a/arch/arm/include/debug/icedcc.S
+++ b/arch/arm/include/debug/icedcc.S
@@ -23,7 +23,10 @@
                beq     1001b
                .endm
 
-               .macro  waituart, rd, rx
+               .macro  waituartcts, rd, rx
+               .endm
+
+               .macro  waituarttxrdy, rd, rx
                mov     \rd, #0x2000000
 1001:
                subs    \rd, \rd, #1
@@ -47,7 +50,10 @@
                beq     1001b
                .endm
 
-               .macro  waituart, rd, rx
+               .macro  waituartcts, rd, rx
+               .endm
+
+               .macro  waituarttxrdy, rd, rx
                mov     \rd, #0x10000000
 1001:
                subs    \rd, \rd, #1
@@ -72,7 +78,10 @@
 
                .endm
 
-               .macro  waituart, rd, rx
+               .macro  waituartcts, rd, rx
+               .endm
+
+               .macro  waituarttxrdy, rd, rx
                mov     \rd, #0x2000000
 1001:
                subs    \rd, \rd, #1

diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S
index 1c1b9d1..bb7b955 100644 (file)
--- a/arch/arm/include/debug/imx.S
+++ b/arch/arm/include/debug/imx.S
@@ -35,7 +35,10 @@
                str     \rd, [\rx, #0x40]       @ TXDATA
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituartcts,rd,rx
+               .endm
+
+               .macro  waituarttxrdy,rd,rx
                .endm
 
                .macro  busyuart,rd,rx

diff --git a/arch/arm/include/debug/meson.S b/arch/arm/include/debug/meson.S
index 1e501a0..7b60e44 100644 (file)
--- a/arch/arm/include/debug/meson.S
+++ b/arch/arm/include/debug/meson.S
@@ -25,7 +25,10 @@
        beq     1002b
        .endm
 
-       .macro  waituart,rd,rx
+       .macro  waituartcts,rd,rx
+       .endm
+
+       .macro  waituarttxrdy,rd,rx
 1001:  ldr     \rd, [\rx, #MESON_AO_UART_STATUS]
        tst     \rd, #MESON_AO_UART_TX_FIFO_FULL
        bne     1001b

diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
index 9405b71..530edc7 100644 (file)
--- a/arch/arm/include/debug/msm.S
+++ b/arch/arm/include/debug/msm.S
@@ -17,7 +17,10 @@ ARM_BE8(rev  \rd, \rd )
        str     \rd, [\rx, #0x70]
        .endm
 
-       .macro  waituart, rd, rx
+       .macro  waituartcts,rd,rx
+       .endm
+
+       .macro  waituarttxrdy, rd, rx
        @ check for TX_EMT in UARTDM_SR
        ldr     \rd, [\rx, #0x08]
 ARM_BE8(rev     \rd, \rd )

diff --git a/arch/arm/include/debug/omap2plus.S b/arch/arm/include/debug/omap2plus.S
index b5696a3..0680be6 100644 (file)
--- a/arch/arm/include/debug/omap2plus.S
+++ b/arch/arm/include/debug/omap2plus.S
@@ -75,5 +75,8 @@ omap_uart_lsr:        .word   0
                bne     1001b
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituartcts,rd,rx
+               .endm
+
+               .macro  waituarttxrdy,rd,rx
                .endm

diff --git a/arch/arm/include/debug/pl01x.S b/arch/arm/include/debug/pl01x.S
index a2a553a..0c7bfa4 100644 (file)
--- a/arch/arm/include/debug/pl01x.S
+++ b/arch/arm/include/debug/pl01x.S
@@ -26,7 +26,10 @@
                strb    \rd, [\rx, #UART01x_DR]
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituartcts,rd,rx
+               .endm
+
+               .macro  waituarttxrdy,rd,rx
 1001:          ldr     \rd, [\rx, #UART01x_FR]
  ARM_BE8(      rev     \rd, \rd )
                tst     \rd, #UART01x_FR_TXFF

diff --git a/arch/arm/include/debug/renesas-scif.S b/arch/arm/include/debug/renesas-scif.S
index 25f0666..8e433e9 100644 (file)
--- a/arch/arm/include/debug/renesas-scif.S
+++ b/arch/arm/include/debug/renesas-scif.S
@@ -33,7 +33,10 @@
        ldr     \rv, =SCIF_VIRT
        .endm
 
-       .macro  waituart, rd, rx
+       .macro  waituartcts,rd,rx
+       .endm
+
+       .macro  waituarttxrdy, rd, rx
 1001:  ldrh    \rd, [\rx, #FSR]
        tst     \rd, #TDFE
        beq     1001b

diff --git a/arch/arm/include/debug/sa1100.S b/arch/arm/include/debug/sa1100.S
index 6109e60..7968ea5 100644 (file)
--- a/arch/arm/include/debug/sa1100.S
+++ b/arch/arm/include/debug/sa1100.S
@@ -51,7 +51,10 @@
                str     \rd, [\rx, #UTDR]
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituartcts,rd,rx
+               .endm
+
+               .macro  waituarttxrdy,rd,rx
 1001:          ldr     \rd, [\rx, #UTSR1]
                tst     \rd, #UTSR1_TNF
                beq     1001b

diff --git a/arch/arm/include/debug/samsung.S b/arch/arm/include/debug/samsung.S
index 69201d7..ab474d5 100644 (file)
--- a/arch/arm/include/debug/samsung.S
+++ b/arch/arm/include/debug/samsung.S
@@ -69,7 +69,10 @@ ARM_BE8(rev \rd, \rd)
 1002:          @ exit busyuart
        .endm
 
-       .macro  waituart,rd,rx
+       .macro  waituartcts,rd,rx
+       .endm
+
+       .macro  waituarttxrdy,rd,rx
                ldr     \rd, [\rx, # S3C2410_UFCON]
 ARM_BE8(rev \rd, \rd)
                tst     \rd, #S3C2410_UFCON_FIFOMODE    @ fifo enabled?

diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S
index e73e4de..3612c7b 100644 (file)
--- a/arch/arm/include/debug/sirf.S
+++ b/arch/arm/include/debug/sirf.S
@@ -29,7 +29,10 @@
        .macro  busyuart,rd,rx
        .endm
 
-       .macro  waituart,rd,rx
+       .macro  waituartcts,rd,rx
+       .endm
+
+       .macro  waituarttxrdy,rd,rx
 1001:  ldr     \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
        tst     \rd, #SIRF_LLUART_TXFIFO_EMPTY
        beq     1001b

diff --git a/arch/arm/include/debug/sti.S b/arch/arm/include/debug/sti.S
index 6b42c91..72d0525 100644 (file)
--- a/arch/arm/include/debug/sti.S
+++ b/arch/arm/include/debug/sti.S
@@ -45,7 +45,10 @@
                 strb    \rd, [\rx, #ASC_TX_BUF_OFF]
                 .endm
 
-                .macro  waituart,rd,rx
+               .macro  waituartcts,rd,rx
+               .endm
+
+                .macro  waituarttxrdy,rd,rx
 1001:           ldr     \rd, [\rx, #ASC_STA_OFF]
                 tst     \rd, #ASC_STA_TX_FULL
                 bne     1001b

diff --git a/arch/arm/include/debug/stm32.S b/arch/arm/include/debug/stm32.S
index f3c4a37..b6d9df3 100644 (file)
--- a/arch/arm/include/debug/stm32.S
+++ b/arch/arm/include/debug/stm32.S
@@ -27,7 +27,10 @@
        strb    \rd, [\rx, #STM32_USART_TDR_OFF]
 .endm
 
-.macro  waituart,rd,rx
+.macro waituartcts,rd,rx
+.endm
+
+.macro  waituarttxrdy,rd,rx
 1001:  ldr     \rd, [\rx, #(STM32_USART_SR_OFF)]       @ Read Status Register
        tst     \rd, #STM32_USART_TXE                   @ TXE = 1 = tx empty
        beq     1001b

diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index 2148d0f..2bca635 100644 (file)
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -178,7 +178,7 @@
 1002:
                .endm
 
-               .macro  waituart, rd, rx
+               .macro  waituartcts, rd, rx
 #ifdef FLOW_CONTROL
                cmp     \rx, #0
                beq     1002f
@@ -189,6 +189,9 @@
 #endif
                .endm
 
+               .macro  waituarttxrdy,rd,rx
+               .endm
+
 /*
  * Storage for the state maintained by the macros above.
  *

diff --git a/arch/arm/include/debug/vf.S b/arch/arm/include/debug/vf.S
index 854d9bd..035bcbf 100644 (file)
--- a/arch/arm/include/debug/vf.S
+++ b/arch/arm/include/debug/vf.S
@@ -29,5 +29,8 @@
        beq     1001b                   @ wait until transmit done
        .endm
 
-       .macro  waituart,rd,rx
+       .macro  waituartcts,rd,rx
+       .endm
+
+       .macro  waituarttxrdy,rd,rx
        .endm

diff --git a/arch/arm/include/debug/vt8500.S b/arch/arm/include/debug/vt8500.S
index 8dc1df2..d01094f 100644 (file)
--- a/arch/arm/include/debug/vt8500.S
+++ b/arch/arm/include/debug/vt8500.S
@@ -28,7 +28,10 @@
        bne     1001b
        .endm
 
-       .macro  waituart,rd,rx
+       .macro  waituartcts,rd,rx
+       .endm
+
+       .macro  waituarttxrdy,rd,rx
        .endm
 
 #endif

diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S
index 58d77c9..5d42cc3 100644 (file)
--- a/arch/arm/include/debug/zynq.S
+++ b/arch/arm/include/debug/zynq.S
@@ -33,7 +33,10 @@
                strb    \rd, [\rx, #UART_FIFO_OFFSET]   @ TXDATA
                .endm
 
-               .macro  waituart,rd,rx
+               .macro  waituartcts,rd,rx
+               .endm
+
+               .macro  waituarttxrdy,rd,rx
 1001:          ldr     \rd, [\rx, #UART_SR_OFFSET]
 ARM_BE8(       rev     \rd, \rd )
                tst     \rd, #UART_SR_TXEMPTY

diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index e112072..e7c8752 100644 (file)
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -89,11 +89,13 @@ ENTRY(printascii)
 2:             teq     r1, #'\n'
                bne     3f
                mov     r1, #'\r'
-               waituart r2, r3
+               waituartcts r2, r3
+               waituarttxrdy r2, r3
                senduart r1, r3
                busyuart r2, r3
                mov     r1, #'\n'
-3:             waituart r2, r3
+3:             waituartcts r2, r3
+               waituarttxrdy r2, r3
                senduart r1, r3
                busyuart r2, r3
                b       1b