select DM
select SUPPORT_SPL
imply CMD_DM
+ select IMX_SEC_INIT if HAS_CAAM
config ARCH_IMXRT
bool "NXP i.MXRT platform"
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select ROM_UNIFIED_SECTIONS
+ select IMX_SEC_INIT if HAS_CAAM
imply MXC_GPIO
imply SYS_THUMB_BUILD
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
imply BOARD_EARLY_INIT_F
+ select IMX_SEC_INIT if HAS_CAAM
imply MXC_GPIO
imply SYS_THUMB_BUILD
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
+ select IMX_SEC_INIT if HAS_CAAM
imply MXC_GPIO
imply SYS_THUMB_BUILD
config GPT_TIMER
bool
+config FSL_CAAM_KB
+ bool
+
+config IMX_SEC_INIT
+ bool
+ help
+ In most of i.MX board with CAAM this option is used
+ to init RNG from U-Boot
+ select FSL_CAAM_KB
+ select SPL_CRYPTO_SUPPORT if SPL
+
config IMX_RDC
bool "i.MX Resource domain controller driver"
depends on ARCH_MX6 || ARCH_MX7
obj-$(CONFIG_GPT_TIMER) += timer.o
obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
endif
-ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs imx8m imx8 imxrt))
+ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs mx7ulp imx8m imx8 imxrt))
obj-y += misc.o
obj-$(CONFIG_SPL_BUILD) += spl.o
endif
#include <imx_sip.h>
#include <linux/arm-smccc.h>
#include <linux/bitops.h>
+#ifdef CONFIG_IMX_SEC_INIT
+#include <fsl_caam.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
}
}
+#ifdef CONFIG_IMX_SEC_INIT
+ /* Secure init function such RNG */
+ imx_sec_init();
+#endif
+
if (is_imx8mq()) {
clock_enable(CCGR_OCOTP, 1);
if (readl(&ocotp->ctrl) & 0x200)
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2013 Stefan Roese <sr@denx.de>
+ * Copyright 2018 NXP
*/
#include <common.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/mach-imx/regs-common.h>
+#include <fsl_caam.h>
DECLARE_GLOBAL_DATA_PTR;
break;
}
}
+
+void imx_sec_init(void)
+{
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL)
+ caam_open();
+#endif
+}
#include <fsl_sec.h>
#include <imx_thermal.h>
#include <mmc.h>
+#ifdef CONFIG_IMX_SEC_INIT
+#include <fsl_caam.h>
+#endif
#define has_err007805() \
(is_mx6sl() || is_mx6dl() || is_mx6solo() || is_mx6ull())
if (is_mx6dqp())
noc_setup();
#endif
+
+#ifdef CONFIG_IMX_SEC_INIT
+ /* Secure init function such RNG */
+ imx_sec_init();
+#endif
+
return 0;
}
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP
*/
#include <common.h>
#define BM_GPC_PGC_ACK_SEL_A7_DUMMY_PDN_ACK 0x8000
#define BM_GPC_PGC_CORE_PUPSCR 0x7fff80
+#ifdef CONFIG_IMX_SEC_INIT
+#include <fsl_caam.h>
+#endif
#if defined(CONFIG_IMX_THERMAL)
static const struct imx_thermal_plat imx7_thermal_plat = {
init_snvs();
imx_gpcv2_init();
+#ifdef CONFIG_IMX_SEC_INIT
+ /* Secure init function such RNG */
+ imx_sec_init();
+#endif
return 0;
}
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/hab.h>
#include <linux/bitops.h>
+#ifdef CONFIG_IMX_SEC_INIT
+#include <fsl_caam.h>
+#endif
#define PMC0_BASE_ADDR 0x410a1000
#define PMC0_CTRL 0x28
int arch_cpu_init(void)
{
+#ifdef CONFIG_IMX_SEC_INIT
+ /* Secure init function such RNG */
+ imx_sec_init();
+#endif
+
return 0;
}
//!
////////////////////////////////////////////////////////////////////////////////
void caam_open(void);
+void imx_sec_init(void);
////////////////////////////////////////////////////////////////////////////////
//! @brief Generate a blob of a secure key.