MLK-14498-9 dts: imx6/imx7: add modem device reset node
authorAndy Duan <fugang.duan@nxp.com>
Tue, 21 Mar 2017 10:08:04 +0000 (18:08 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:21:40 +0000 (15:21 -0500)
Add BT modem device reset node.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
arch/arm/boot/dts/imx6qdl-sabresd-btwifi.dtsi
arch/arm/boot/dts/imx6sl-evk-btwifi.dts
arch/arm/boot/dts/imx6sll-evk-btwifi.dts
arch/arm/boot/dts/imx6sx-sdb-btwifi.dts
arch/arm/boot/dts/imx6ul-14x14-evk.dts
arch/arm/boot/dts/imx6ul-evk-btwifi.dtsi
arch/arm/boot/dts/imx7d-sdb.dts

index 5e697a0..7164a9e 100644 (file)
                status = "disabled";
        };
 
+       modem_reset: modem-reset {
+               compatible = "gpio-reset";
+               reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+               reset-delay-us = <1000>;
+               #reset-cells = <0>;
+       };
+
        regulators {
                wlreg_on: fixedregulator@100 {
                        compatible = "regulator-fixed";
 
 &iomuxc {
        imx6qdl-sabresd-murata-v2 {
+               pinctrl_btreg: btreggrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
+                       >;
+               };
+
                /* add MUXing entry for SD2 4-bit interface and configure control pins */
                pinctrl_wifi: wifigrp {
                        fsl,pins = <
        };
 };
 
+&pinctrl_gpio_leds {
+       fsl,pins = <
+       >;
+};
+
 &uart5 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart5_1>;
+       pinctrl-0 = <&pinctrl_uart5_1
+                    &pinctrl_btreg>;
        fsl,uart-has-rtscts;
+       resets = <&modem_reset>;
        status = "okay";
        /* for DTE mode, add below change */
        /* fsl,dte-mode; */
index cd05925..4eac83e 100644 (file)
 #include "imx6sl-evk.dts"
 
 / {
+       modem_reset: modem-reset {
+               compatible = "gpio-reset";
+               reset-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
+               reset-delay-us = <1000>;
+               #reset-cells = <0>;
+       };
+
        regulators {
                wlreg_on: fixedregulator@100 {
                        compatible = "regulator-fixed";
 &iomuxc {
        imx6sl-evk-murata-v1_sdext {
                /* Only MUX SD1_DAT0..3 lines so UART4 can be MUXed on higher data lines. */
+               pinctrl_btreg: btreggrp {
+                       fsl,pins = <
+                               MX6SL_PAD_SD3_DAT3__GPIO5_IO17          0x13069 /* BT_REG_ON */
+                       >;
+               };
+
                pinctrl_wifi: wifigrp {
                        fsl,pins = <
                                MX6SL_PAD_SD1_CMD__SD1_CMD              0x17059
 /* Murata: declare UART4 interface for Bluetooth. */
 &uart4 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart4_1>;
+       pinctrl-0 = <&pinctrl_uart4_1
+                    &pinctrl_btreg>;
        fsl,uart-has-rtscts;
+       resets = <&modem_reset>;
        status = "okay";
        /* for DTE mode, add below change */
        /* fsl,dte-mode; */
        /* pinctrl-0 = <&pinctrl_uart4dte_1>; */
 };
 
-&pinctrl_uart4_1 {
-       fsl,pins = <
-               MX6SL_PAD_SD3_DAT3__GPIO5_IO17          0x13069 /* BT_REG_ON */
-       >;
-};
-
 &usdhc1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_wifi>;
index 91da501..3cfa327 100644 (file)
 #include "imx6sll-evk.dts"
 
 / {
+       modem_reset: modem-reset {
+               compatible = "gpio-reset";
+               reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
+               reset-delay-us = <1000>;
+               #reset-cells = <0>;
+       };
+
        regulators {
                wlreg_on: fixedregulator@100 {
                        compatible = "regulator-fixed";
@@ -54,6 +61,7 @@
 };
 
 &uart5 {
+       resets = <&modem_reset>;
        status = "okay";
 };
 
index ba5512e..698e49e 100644 (file)
 #include "imx6sx-sdb.dts"
 
 / {
+       modem_reset: modem-reset {
+               compatible = "gpio-reset";
+               reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+               reset-delay-us = <1000>;
+               #reset-cells = <0>;
+       };
+
        regulators {
                wlreg_on: fixedregulator@100 {
                        compatible = "regulator-fixed";
@@ -86,6 +93,7 @@
        pinctrl-0 = <&pinctrl_uart3
                     &pinctrl_bt>;
        fsl,uart-has-rtscts;
+       resets = <&modem_reset>;
        status = "okay";
 };
 
index 785f5bb..4e77bd8 100644 (file)
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart2>;
        uart-has-rtscts;
+       /* for DTE mode, add below change */
+       /* fsl,dte-mode; */
+       /* pinctrl-0 = <&pinctrl_uart2dte>; */
        status = "okay";
 };
 
index d5b6c19..d4810bd 100644 (file)
  */
 
 / {
+       modem_reset: modem-reset {
+               compatible = "gpio-reset";
+               reset-gpios = <&gpio_spi 4 GPIO_ACTIVE_LOW>;
+               reset-delay-us = <1000>;
+               #reset-cells = <0>;
+       };
+
        regulators {
                wlreg_on: fixedregulator@100 {
                        compatible = "regulator-fixed";
        regulator-always-on;
 };
 
+&uart2 {
+       resets = <&modem_reset>;
+};
+
 &usdhc1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_wifi>;
index 0325be9..29387d5 100644 (file)
                reg = <0x80000000 0x80000000>;
        };
 
+       modem_reset: modem-reset {
+               compatible = "gpio-reset";
+               reset-gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
+               reset-delay-us = <1000>;
+               #reset-cells = <0>;
+       };
+
        regulators {
                compatible = "simple-bus";
                #address-cells = <1>;
        assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
        assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
        fsl,uart-has-rtscts;
+       resets = <&modem_reset>;
        status = "okay";
 };
 
 
                pinctrl_hog_1: hoggrp-1 {
                        fsl,pins = <
-                               MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x19  /* BIT_REG_ON */
                                MX7D_PAD_EPDC_BDR0__GPIO2_IO28  0x59 /* headphone detect */
                        >;
                };
                                MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX      0x79
                                MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS      0x79
                                MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS     0x79
+                               MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x19  /* BT_REG_ON */
                        >;
                };