HSM-24 arm64: dtx: imx8qm: enable more seco MU users

enable all SECO MUs and increase number of users on the first one.

Signed-off-by: Stéphane Dion <stephane.dion_1@nxp.com>
(cherry picked from commit 2197e1f3a75fe9d9832cff3aa979aa4235a1e7a7)

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
index 33d4540..f261256 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
@@ -159,6 +159,8 @@
                reg = <0x0 0x31560000 0x0 0x10000>;
                power-domains = <&pd_seco_mu_2>;
                interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>;
+               fsl,seco_mu_id = <1>;
+               fsl,seco_max_users = <4>;
                status = "okay";
        };
 
@@ -167,7 +169,9 @@
                reg = <0x0 0x31570000 0x0 0x10000>;
                power-domains = <&pd_seco_mu_3>;
                interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>;
-               status = "disabled";
+               fsl,seco_mu_id = <2>;
+               fsl,seco_max_users = <2>;
+               status = "okay";
        };
 
        mu_seco4: mu@31580000 {
@@ -175,7 +179,9 @@
                reg = <0x0 0x31580000 0x0 0x10000>;
                power-domains = <&pd_seco_mu_4>;
                interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>;
-               status = "disabled";
+               fsl,seco_mu_id = <3>;
+               fsl,seco_max_users = <2>;
+               status = "okay";
        };
 
        mu13: mu13@5d280000 {