MLK-14890 i2c: Enable I2C force idle bus
authorYe Li <ye.li@nxp.com>
Mon, 15 May 2017 09:04:07 +0000 (04:04 -0500)
committerYe Li <ye.li@nxp.com>
Mon, 15 May 2017 09:08:54 +0000 (04:08 -0500)
This patch enables the I2C force idle bus for all i.MX6 and i.MX7 boards to avoid
i2c bus problem during reboot. To use it, we must add some i2c properties in DTB file
and the GPIO pinctrl for i2c.

For mx6qsabreauto, mx6slevk, mx6sxsabresd and mx6sxscm, these boards call the
setup_i2c. To remove conflict, change to use "setup_i2c" only for non-DM i2c driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
26 files changed:
arch/arm/dts/imx6qdl-sabreauto.dtsi
arch/arm/dts/imx6qdl-sabresd.dtsi
arch/arm/dts/imx6sl-evk.dts
arch/arm/dts/imx6sll-evk.dts
arch/arm/dts/imx6sll-lpddr3-arm2.dts
arch/arm/dts/imx6sx-14x14-arm2.dts
arch/arm/dts/imx6sx-17x17-arm2.dts
arch/arm/dts/imx6sx-19x19-arm2.dts
arch/arm/dts/imx6sx-sabreauto.dts
arch/arm/dts/imx6sx-sdb.dtsi
arch/arm/dts/imx6ul-14x14-ddr3-arm2.dts
arch/arm/dts/imx6ul-14x14-evk.dts
arch/arm/dts/imx6ul-9x9-evk.dts
arch/arm/dts/imx6ull-14x14-ddr3-arm2.dts
arch/arm/dts/imx6ull-14x14-evk.dts
arch/arm/dts/imx6ull-9x9-evk.dts
arch/arm/dts/imx7d-12x12-ddr3-arm2.dts
arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts
arch/arm/dts/imx7d-19x19-ddr3-arm2.dts
arch/arm/dts/imx7d-19x19-lpddr2-arm2.dts
arch/arm/dts/imx7d-19x19-lpddr3-arm2.dts
arch/arm/dts/imx7d-sdb.dts
board/freescale/mx6qsabreauto/mx6qsabreauto.c
board/freescale/mx6slevk/mx6slevk.c
board/freescale/mx6sxsabresd/mx6sxsabresd.c
board/freescale/mx6sxscm/mx6sxscm.c

index 711cc63..992ee81 100644 (file)
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        egalax_ts@04 {
 };
 
 &i2c3 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        adv7180: adv7180@21 {
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2grp_gpio {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_EB2__GPIO2_IO30    0x1b8b1
+                               MX6QDL_PAD_KEY_ROW3__GPIO4_IO13   0x1b8b1
+                       >;
+               };
+
                pinctrl_ipu1_1: ipu1grp-1 { /* parallel port 16-bit */
                        fsl,pins = <
                                MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04   0x80000000
                        >;
                };
 
+               pinctrl_i2c3_gpio: i2c3grp_gpio {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_3__GPIO1_IO03  0x1b8b1
+                               MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x1b8b1
+                       >;
+               };
+
                pinctrl_mlb: mlb {
                        fsl,pins = <
                                MX6QDL_PAD_ENET_TXD1__MLB_CLK 0x80000000
index 04ad185..93c154b 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: wm8962@1a {
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        egalax_ts@04 {
 
 &i2c3 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        egalax_ts@04 {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26        0x1b8b1
+                               MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27        0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2grp_gpio {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL3__GPIO4_IO12         0x1b8b1
+                               MX6QDL_PAD_KEY_ROW3__GPIO4_IO13         0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c3: i2c3grp {
                        fsl,pins = <
                                MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
                        >;
                };
 
+               pinctrl_i2c3_gpio: i2c3grp_gpio {
+                        fsl,pins = <
+                                MX6QDL_PAD_GPIO_3__GPIO1_IO03           0x1b8b1
+                                MX6QDL_PAD_GPIO_6__GPIO1_IO06           0x1b8b1
+                        >;
+                };
+
                pinctrl_ipu1: ipu1grp {
                        fsl,pins = <
                                MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
index 6a7e9aa..d22623d 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze100@08 {
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: wm8962@1a {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6SL_PAD_I2C1_SCL__GPIO3_IO12  0x1b8b1
+                               MX6SL_PAD_I2C1_SDA__GPIO3_IO13  0x1b8b1
+                       >;
+               };
 
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2grp_gpio {
+                       fsl,pins = <
+                               MX6SL_PAD_I2C2_SCL__GPIO3_IO14  0x1b8b1
+                               MX6SL_PAD_I2C2_SDA__GPIO3_IO15  0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c3: i2c3grp {
                        fsl,pins = <
                                MX6SL_PAD_EPDC_SDCE2__I2C3_SCL 0x4001b8b1
index ee72b86..a254b48 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze100@08 {
 
 &i2c3 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: wm8962@1a {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6SLL_PAD_I2C1_SCL__GPIO3_IO12  0x1b8b1
+                               MX6SLL_PAD_I2C1_SDA__GPIO3_IO13  0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c3: i2c3grp {
                        fsl,pins = <
                                MX6SLL_PAD_AUD_RXFS__I2C3_SCL  0x4041b8b1
                        >;
                };
 
+               pinctrl_i2c3_gpio: i2c3grp_gpio {
+                       fsl,pins = <
+                               MX6SLL_PAD_AUD_RXFS__GPIO1_IO00  0x41b8b1
+                               MX6SLL_PAD_AUD_RXC__GPIO1_IO01   0x41b8b1
+                       >;
+               };
+
                pinctrl_pwm1: pmw1grp {
                        fsl,pins = <
                                MX6SLL_PAD_PWM1__PWM1_OUT   0x110b0
index 17381f7..ad2106e 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze100@08 {
 
 &i2c3 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+        scl-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+        sda-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: wm8962@1a {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6SLL_PAD_I2C1_SCL__GPIO3_IO12    0x1b8b1
+                               MX6SLL_PAD_I2C1_SDA__GPIO3_IO13    0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c3: i2c3grp {
                        fsl,pins = <
                                MX6SLL_PAD_EPDC_SDCE2__I2C3_SCL  0x4041b8b1
                        >;
                };
 
+               pinctrl_i2c3_gpio: i2c3grp_gpio {
+                       fsl,pins = <
+                               MX6SLL_PAD_EPDC_SDCE2__GPIO1_IO29  0x41b8b1
+                               MX6SLL_PAD_EPDC_SDCE3__GPIO1_IO30  0x41b8b1
+                       >;
+               };
+
                pinctrl_pwm1: pmw1grp {
                        fsl,pins = <
                                MX6SLL_PAD_PWM1__PWM1_OUT   0x110b0
index 7b770f1..ec48b7d 100644 (file)
 };
 
 &i2c1 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c1_1>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c1_1>;
+       pinctrl-1 = <&pinctrl_i2c1_1_gpio>;
+       scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 
        pmic: pfuze100@08 {
                compatible = "fsl,pfuze200";
 };
 
 &i2c2 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c2_1>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c2_1>;
+       pinctrl-1 = <&pinctrl_i2c2_1_gpio>;
+       scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 
        max7322_1: gpio@68 {
                compatible = "maxim,max7322";
 
 
 &i2c3 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c3_1>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c3_1>;
+       pinctrl-1 = <&pinctrl_i2c3_1_gpio>;
+       scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 };
 
 &i2c4 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c4_1>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c4_1>;
+       pinctrl-1 = <&pinctrl_i2c4_1_gpio>;
+       scl-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 };
 
 &iomuxc {
                        >;
                };
 
+               pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1        0x1b8b1
+                               MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0        0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c1_2: i2c1grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_CSI_DATA01__I2C1_SDA          0x4001b8b1
                                MX6SX_PAD_GPIO1_IO02__I2C2_SCL          0x4001b8b1
                        >;
                };
+
+               pinctrl_i2c2_1_gpio: i2c2grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3        0x1b8b1
+                               MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2        0x1b8b1
+                       >;
+               };
        };
 
        i2c3 {
                        >;
                };
 
+               pinctrl_i2c3_1_gpio: i2c3grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9      0x1b8b1
+                               MX6SX_PAD_KEY_COL4__GPIO2_IO_14         0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c3_2: i2c3grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_KEY_ROW4__I2C3_SDA            0x4001b8b1
                                MX6SX_PAD_CSI_DATA06__I2C4_SCL          0x4001b8b1
                        >;
                };
+
+               pinctrl_i2c4_1_gpio: i2c4grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_CSI_DATA07__GPIO1_IO_21       0x1b8b1
+                               MX6SX_PAD_CSI_DATA06__GPIO1_IO_20       0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c4_2: i2c4grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_SD3_DATA1__I2C4_SDA           0x4001b8b1
index 40b381e..d29143b 100644 (file)
 };
 
 &i2c1 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c1_1>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c1_1>;
+       pinctrl-1 = <&pinctrl_i2c1_1_gpio>;
+       scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 
        pmic: pfuze100@08 {
                compatible = "fsl,pfuze100";
 };
 
 &i2c2 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c2_1>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c2_1>;
+       pinctrl-1 = <&pinctrl_i2c2_1_gpio>;
+       scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 
        max7322_1: gpio@68 {
                compatible = "maxim,max7322";
 
 
 &i2c3 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c3_1>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c3_1>;
+       pinctrl-1 = <&pinctrl_i2c3_1_gpio>;
+       scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 };
 
 &i2c4 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c4_1>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c4_1>;
+       pinctrl-1 = <&pinctrl_i2c4_1_gpio>;
+       scl-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 };
 
 &iomuxc {
                        >;
                };
 
+               pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1        0x1b8b1
+                               MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0        0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c1_2: i2c1grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_CSI_DATA01__I2C1_SDA          0x4001b8b1
                                MX6SX_PAD_GPIO1_IO02__I2C2_SCL          0x4001b8b1
                        >;
                };
+
+               pinctrl_i2c2_1_gpio: i2c2grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3        0x1b8b1
+                               MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2        0x1b8b1
+                       >;
+               };
        };
 
        i2c3 {
                        >;
                };
 
+               pinctrl_i2c3_1_gpio: i2c3grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9      0x1b8b1
+                               MX6SX_PAD_KEY_COL4__GPIO2_IO_14         0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c3_2: i2c3grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_KEY_ROW4__I2C3_SDA            0x4001b8b1
                                MX6SX_PAD_CSI_DATA06__I2C4_SCL          0x4001b8b1
                        >;
                };
+
+               pinctrl_i2c4_1_gpio: i2c4grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_CSI_DATA07__GPIO1_IO_21       0x1b8b1
+                               MX6SX_PAD_CSI_DATA06__GPIO1_IO_20       0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c4_2: i2c4grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_SD3_DATA1__I2C4_SDA           0x4001b8b1
index 36f11a7..14eef73 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1_1>;
+       pinctrl-1 = <&pinctrl_i2c1_1_gpio>;
+       scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze100@08 {
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2_1>;
+       pinctrl-1 = <&pinctrl_i2c2_1_gpio>;
+       scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        max7322_1: gpio@68 {
 
 &i2c3 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3_1>;
+       pinctrl-1 = <&pinctrl_i2c3_1_gpio>;
+       scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
 &i2c4 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4_2>;
+       pinctrl-1 = <&pinctrl_i2c4_2_gpio>;
+       scl-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        sgtl5000: sgtl5000@0a {
                        >;
                };
 
+               pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1        0x1b8b1
+                               MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0        0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c1_2: i2c1grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_CSI_DATA01__I2C1_SDA          0x4001b8b1
                                MX6SX_PAD_GPIO1_IO02__I2C2_SCL          0x4001b8b1
                        >;
                };
+
+               pinctrl_i2c2_1_gpio: i2c2grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3        0x1b8b1
+                               MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2        0x1b8b1
+                       >;
+               };
        };
 
        i2c3 {
                        >;
                };
 
+               pinctrl_i2c3_1_gpio: i2c3grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9      0x1b8b1
+                               MX6SX_PAD_KEY_COL4__GPIO2_IO_14         0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c3_2: i2c3grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_KEY_ROW4__I2C3_SDA            0x4001b8b1
                                MX6SX_PAD_CSI_DATA06__I2C4_SCL          0x4001b8b1
                        >;
                };
+
                pinctrl_i2c4_2: i2c4grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_SD3_DATA1__I2C4_SDA           0x4001b8b1
                                MX6SX_PAD_SD3_DATA0__I2C4_SCL           0x4001b8b1
                        >;
                };
+
+               pinctrl_i2c4_2_gpio: i2c4grp-2-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_SD3_DATA1__GPIO7_IO_3         0x1b8b1
+                               MX6SX_PAD_SD3_DATA0__GPIO7_IO_2         0x1b8b1
+                       >;
+               };
        };
 
        lcdif1 {
index bd8c9d7..39438a7 100644 (file)
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2_1>;
+       pinctrl-1 = <&pinctrl_i2c2_1_gpio>;
+       scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: cs42888@048 {
 
 &i2c3 {
         clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3_2>;
+       pinctrl-1 = <&pinctrl_i2c3_2_gpio>;
+       scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        max7310_a: gpio@30 {
                        >;
                };
 
+               pinctrl_i2c2_1_gpio: i2c2grp-1-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3        0x1b8b1
+                               MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2        0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c3_2: i2c3grp-2 {
                        fsl,pins = <
                                MX6SX_PAD_KEY_ROW4__I2C3_SDA            0x4001b8b1
                        >;
                };
 
+               pinctrl_i2c3_2_gpio: i2c3grp-2-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_KEY_ROW4__GPIO2_IO_19         0x1b8b1
+                               MX6SX_PAD_KEY_COL4__GPIO2_IO_14         0x1b8b1
+                       >;
+               };
+
                pinctrl_mlb_2: mlbgrp-2 {
                        fsl,pins = <
                                MX6SX_PAD_ENET2_RX_CLK__MLB_DATA        0x31
index 523dfdb..9781adc 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze100@08 {
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        egalax_ts@04 {
 
 &i2c3 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        isl29023@44 {
 };
 
 &i2c4 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c4>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 
        codec: wm8962@1a {
                compatible = "wlf,wm8962";
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1        0x1b8b1
+                               MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0        0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2grp-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3        0x1b8b1
+                               MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2        0x1b8b1
+                       >;
+               };
                pinctrl_i2c3: i2c3grp {
                        fsl,pins = <
                                MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
                        >;
                };
 
+               pinctrl_i2c3_gpio: i2c3grp-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_KEY_ROW4__GPIO2_IO_19         0x1b8b1
+                               MX6SX_PAD_KEY_COL4__GPIO2_IO_14         0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c4: i2c4grp {
                        fsl,pins = <
                                MX6SX_PAD_CSI_DATA07__I2C4_SDA          0x4001b8b1
                        >;
                };
 
+               pinctrl_i2c4_gpio: i2c4grp-gpio {
+                       fsl,pins = <
+                               MX6SX_PAD_CSI_DATA07__GPIO1_IO_21       0x1b8b1
+                               MX6SX_PAD_CSI_DATA06__GPIO1_IO_20       0x1b8b1
+                       >;
+               };
+
                pinctrl_lcd: lcdgrp {
                        fsl,pins = <
                                MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
index d7df567..7bb4f26 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze100@08 {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_GPIO1_IO03__GPIO1_IO03  0x1b8b1
+                               MX6UL_PAD_GPIO1_IO02__GPIO1_IO02  0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c4: i2c4grp {
                        fsl,pins = <
                                MX6UL_PAD_UART2_TX_DATA__I2C4_SCL       0x4001b8b0
index f2b3ec3..c160f7e 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        mag3110@0e {
 
 &i2c2 {
        clock_frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: wm8960@1a {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0
+                               MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0
+                               MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0
+                       >;
+               };
+
                pinctrl_lcdif_dat: lcdifdatgrp {
                        fsl,pins = <
                                MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
index 04a562b..cc4e83a 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze3000@08 {
 
 &i2c2 {
        clock_frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: wm8960@1a {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0
+                               MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0
+                               MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0
+                       >;
+               };
+
                pinctrl_lcdif_ctrl: lcdifctrlgrp {
                        fsl,pins = <
                                MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x79
index 4a30557..3194cb2 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze100@08 {
 
 &i2c4 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        max17135: max17135@48 {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_GPIO1_IO03__GPIO1_IO03  0x1b8b1
+                               MX6UL_PAD_GPIO1_IO02__GPIO1_IO02  0x1b8b1
+                       >;
+               };
+
                pinctrl_i2c4: i2c4grp {
                        fsl,pins = <
                                MX6UL_PAD_UART2_TX_DATA__I2C4_SCL       0x4001b8b0
                        >;
                };
 
+               pinctrl_i2c4_gpio: i2c4grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20     0x1b8b0
+                               MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21     0x1b8b0
+                       >;
+               };
+
                pinctrl_lcdif_dat: lcdifdatgrp {
                        fsl,pins = <
                                MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
index 113a084..ae544f0 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        mag3110@0e {
 
 &i2c2 {
        clock_frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: wm8960@1a {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0
+                               MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0
+                               MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0
+                       >;
+               };
+
                pinctrl_lcdif_dat: lcdifdatgrp {
                        fsl,pins = <
                                MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
index 003a206..9377b1f 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze3000@08 {
 
 &i2c2 {
        clock_frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: wm8960@1a {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0
+                               MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2grp_gpio {
+                       fsl,pins = <
+                               MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0
+                               MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0
+                       >;
+               };
+
                pinctrl_lcdif_ctrl: lcdifctrlgrp {
                        fsl,pins = <
                                MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x79
index f29da2b..725dd16 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1_1>;
+       pinctrl-1 = <&pinctrl_i2c1_1_gpio>;
+       scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze3000@08 {
 
 &i2c3 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3_1>;
+       pinctrl-1 = <&pinctrl_i2c3_1_gpio>;
+       scl-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
                        >;
                };
 
+               pinctrl_i2c3_1_gpio: i2c3grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x7f
+                               MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x7f
+                       >;
+               };
+
                pinctrl_i2c4_1: i2c4grp-1 {
                        fsl,pins = <
                                MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f
                        >;
                };
 
+               pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_GPIO1_IO05__GPIO1_IO5  0x7f
+                               MX7D_PAD_GPIO1_IO06__GPIO1_IO6   0x7f
+                       >;
+               };
+
                pinctrl_i2c2_1: i2c2grp-1 {
                        fsl,pins = <
                                MX7D_PAD_GPIO1_IO06__I2C2_SCL   0x4000007f
index eb4af7d..e74707b 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default", "sleep";
+       pinctrl-names = "default", "sleep", "gpio";
        pinctrl-0 = <&pinctrl_i2c1_1>;
        pinctrl-1 = <&pinctrl_i2c1_1>;
+       pinctrl-2 = <&pinctrl_i2c1_1_gpio>;
+       scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze3000@08 {
 
 &i2c3 {
        clock-frequency = <100000>;
-       pinctrl-names = "default", "sleep";
+       pinctrl-names = "default", "sleep", "gpio";
        pinctrl-0 = <&pinctrl_i2c3_1>;
        pinctrl-1 = <&pinctrl_i2c3_1>;
+       pinctrl-2 = <&pinctrl_i2c3_1_gpio>;
+       scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        max7322: gpio@68 {
                        >;
                };
 
+               pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C1_SDA__GPIO4_IO9          0x7f
+                               MX7D_PAD_I2C1_SCL__GPIO4_IO8          0x7f
+                       >;
+               };
+
                pinctrl_i2c2_1: i2c2grp-1 {
                        fsl,pins = <
                                MX7D_PAD_I2C2_SDA__I2C2_SDA          0x4000007f
                        >;
                };
 
+               pinctrl_i2c3_1_gpio: i2c3grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C3_SDA__GPIO4_IO13          0x7f
+                               MX7D_PAD_I2C3_SCL__GPIO4_IO12          0x7f
+                       >;
+               };
+
                pinctrl_i2c4_1: i2c4grp-1 {
                        fsl,pins = <
                                MX7D_PAD_I2C4_SDA__I2C4_SDA          0x4000007f
index d487d13..58b5e31 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1_1>;
+       pinctrl-1 = <&pinctrl_i2c1_1_gpio>;
+       scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze3000@08 {
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2_1>;
+       pinctrl-1 = <&pinctrl_i2c2_1_gpio>;
+       scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
 &i2c3 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3_1>;
+       pinctrl-1 = <&pinctrl_i2c3_1_gpio>;
+       scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        max7322: gpio@68 {
                        >;
                };
 
+               pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C1_SDA__GPIO4_IO9          0x7f
+                               MX7D_PAD_I2C1_SCL__GPIO4_IO8          0x7f
+                       >;
+               };
+
                pinctrl_i2c2_1: i2c2grp-1 {
                        fsl,pins = <
                                MX7D_PAD_I2C2_SDA__I2C2_SDA          0x4000007f
                        >;
                };
 
+               pinctrl_i2c2_1_gpio: i2c2grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C2_SDA__GPIO4_IO11          0x7f
+                               MX7D_PAD_I2C2_SCL__GPIO4_IO10          0x7f
+                       >;
+               };
+
                pinctrl_i2c3_1: i2c3grp-1 {
                        fsl,pins = <
                                MX7D_PAD_I2C3_SDA__I2C3_SDA          0x4000007f
                        >;
                };
 
+               pinctrl_i2c3_1_gpio: i2c3grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C3_SDA__GPIO4_IO13          0x7f
+                               MX7D_PAD_I2C3_SCL__GPIO4_IO12          0x7f
+                       >;
+               };
+
                pinctrl_i2c4_1: i2c4grp-1 {
                        fsl,pins = <
                                MX7D_PAD_I2C4_SDA__I2C4_SDA          0x4000007f
index 2af374c..8541551 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1_1>;
+       pinctrl-1 = <&pinctrl_i2c1_1_gpio>;
+       scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze3000@08 {
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2_1>;
+       pinctrl-1 = <&pinctrl_i2c2_1_gpio>;
+       scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
                        >;
                };
 
+               pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C1_SDA__GPIO4_IO9          0x7f
+                               MX7D_PAD_I2C1_SCL__GPIO4_IO8          0x7f
+                       >;
+               };
+
                pinctrl_i2c2_1: i2c2grp-1 {
                        fsl,pins = <
                                MX7D_PAD_I2C2_SDA__I2C2_SDA          0x4000007f
                        >;
                };
 
+               pinctrl_i2c2_1_gpio: i2c2grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C2_SDA__GPIO4_IO11          0x7f
+                               MX7D_PAD_I2C2_SCL__GPIO4_IO10          0x7f
+                       >;
+               };
+
                pinctrl_weim_cs0_1: weim_cs0grp-1 {
                        fsl,pins = <
                                MX7D_PAD_EPDC_DATA10__EIM_CS0_B      0x71
index 35f1bf7..8c000da 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1_1>;
+       pinctrl-1 = <&pinctrl_i2c1_1_gpio>;
+       scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze3000@08 {
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2_1>;
+       pinctrl-1 = <&pinctrl_i2c2_1_gpio>;
+       scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
                        >;
                };
 
+               pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C1_SDA__GPIO4_IO9          0x7f
+                               MX7D_PAD_I2C1_SCL__GPIO4_IO8          0x7f
+                       >;
+               };
+
                pinctrl_i2c2_1: i2c2grp-1 {
                        fsl,pins = <
                                MX7D_PAD_I2C2_SDA__I2C2_SDA          0x4000007f
                        >;
                };
 
+               pinctrl_i2c2_1_gpio: i2c2grp-1-gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C2_SDA__GPIO4_IO11          0x7f
+                               MX7D_PAD_I2C2_SCL__GPIO4_IO10          0x7f
+                       >;
+               };
+
                pinctrl_weim_cs0_1: weim_cs0grp-1 {
                        fsl,pins = <
                                MX7D_PAD_EPDC_DATA10__EIM_CS0_B      0x71
index 5b882bb..9be4d48 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        pmic: pfuze3000@08 {
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        fxas2100x@20 {
 
 &i2c3 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        sii902x: sii902x@39 {
 
 &i2c4 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        codec: wm8960@1a {
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1grp_gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C1_SDA__GPIO4_IO9    0x7f
+                               MX7D_PAD_I2C1_SCL__GPIO4_IO8    0x7f
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX7D_PAD_I2C2_SDA__I2C2_SDA     0x4000007f
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2grp_gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C2_SDA__GPIO4_IO11   0x7f
+                               MX7D_PAD_I2C2_SCL__GPIO4_IO10   0x7f
+                       >;
+               };
+
                pinctrl_i2c3: i2c3grp {
                        fsl,pins = <
                                MX7D_PAD_I2C3_SDA__I2C3_SDA          0x4000007f
                        >;
                };
 
+               pinctrl_i2c3_gpio: i2c3grp_gpio {
+                       fsl,pins = <
+                               MX7D_PAD_I2C3_SDA__GPIO4_IO13          0x7f
+                               MX7D_PAD_I2C3_SCL__GPIO4_IO12          0x7f
+                       >;
+               };
+
                pinctrl_i2c4: i2c4grp {
                        fsl,pins = <
                                MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA         0x4000007f
                        >;
                };
 
+               pinctrl_i2c4_gpio: i2c4grp_gpio {
+                       fsl,pins = <
+                               MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17               0x7f
+                               MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16               0x7f
+                       >;
+               };
+
                pinctrl_lcdif_dat: lcdifdatgrp {
                        fsl,pins = <
                                MX7D_PAD_LCD_DATA00__LCD_DATA0  0x79
index 3565780..159d9f3 100644 (file)
@@ -130,7 +130,6 @@ static struct i2c_pads_info i2c_pad_info1 = {
                .gp = IMX_GPIO_NR(4, 13)
        }
 };
-#endif
 
 #ifndef CONFIG_SYS_FLASH_CFI
 /*
@@ -150,6 +149,7 @@ static struct i2c_pads_info i2c_pad_info2 = {
        }
 };
 #endif
+#endif
 
 static iomux_v3_cfg_t const i2c3_pads[] = {
        MX6_PAD_EIM_A24__GPIO5_IO04             | MUX_PAD_CTRL(NO_PAD_CTRL),
@@ -819,16 +819,15 @@ int board_init(void)
 #ifdef CONFIG_SYS_I2C
        /* I2C 2 and 3 setup - I2C 3 hw mux with EIM */
        setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+#ifndef CONFIG_SYS_FLASH_CFI
+       setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
+#endif
 #endif
 
        /* I2C 3 Steer */
        gpio_request(IMX_GPIO_NR(5, 4), "steer logic");
        gpio_direction_output(IMX_GPIO_NR(5, 4), 1);
        imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
-       
-#ifndef CONFIG_SYS_FLASH_CFI
-       setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
-#endif
 
        gpio_request(IMX_GPIO_NR(1, 15), "expander en");
        gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
index 108305e..f541425 100644 (file)
@@ -362,6 +362,7 @@ int board_mmc_init(bd_t *bis)
 #endif
 }
 
+#ifdef CONFIG_SYS_I2C
 #define PC     MUX_PAD_CTRL(I2C_PAD_CTRL)
 /* I2C1 for PMIC */
 struct i2c_pads_info i2c_pad_info1 = {
@@ -376,6 +377,7 @@ struct i2c_pads_info i2c_pad_info1 = {
                .gp = IMX_GPIO_NR(3, 12),
        },
 };
+#endif
 
 #ifdef CONFIG_POWER
 int power_init_board(void)
@@ -817,11 +819,12 @@ int board_init(void)
        /* address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_SYS_I2C
        setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-       setup_elan_pads();
 #endif
 
+       setup_elan_pads();
+
 #ifdef CONFIG_FEC_MXC
        setup_fec();
 #endif
index 9563acf..f99048a 100644 (file)
@@ -269,6 +269,7 @@ int board_eth_init(bd_t *bis)
        return cpu_eth_init(bis);
 }
 
+#ifdef CONFIG_SYS_I2C
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 /* I2C1 for PMIC */
 static struct i2c_pads_info i2c_pad_info1 = {
@@ -297,6 +298,7 @@ struct i2c_pads_info i2c_pad_info2 = {
                .gp = IMX_GPIO_NR(1, 3),
        },
 };
+#endif
 
 #ifdef CONFIG_POWER
 int power_init_board(void)
@@ -927,7 +929,7 @@ int board_init(void)
        gpio_request(IMX_GPIO_NR(4, 16), "peri_3v3");
        gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
 
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_SYS_I2C
        setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
        setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
 #endif
index a5a559b..36d527d 100644 (file)
@@ -271,6 +271,7 @@ int mx6_rgmii_rework(struct phy_device *phydev)
        return 0;
 }
 
+#ifdef CONFIG_SYS_I2C
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 /* I2C1 for PMIC */
 static struct i2c_pads_info i2c_pad_info1 = {
@@ -313,6 +314,7 @@ struct i2c_pads_info i2c_pad_info4 = {
                .gp = IMX_GPIO_NR(1, 21),
        },
 };
+#endif
 
 #ifdef CONFIG_POWER
 int power_init_board(void)
@@ -907,7 +909,7 @@ int board_init(void)
        gpio_request(IMX_GPIO_NR(4, 16), "peri_3v3");
        gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
 
-#ifdef CONFIG_SYS_I2C_MXC
+#ifdef CONFIG_SYS_I2C
        setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
        setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
        setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info4);