imx8mp-somdevices: arm: dts: Add imx8mp-somdevices-u-boot.dtsi copying imx8mp-evk...

Signed-off-by: Josep Orga <jorga@somdevices.com>

diff --git a/arch/arm/dts/imx8mp-somdevices-u-boot.dtsi b/arch/arm/dts/imx8mp-somdevices-u-boot.dtsi
new file mode 100644 (file)
index 0000000..20ae101
--- /dev/null
+++ b/arch/arm/dts/imx8mp-somdevices-u-boot.dtsi
@@ -0,0 +1,219 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+/ {
+       wdt-reboot {
+               compatible = "wdt-reboot";
+               wdt = <&wdog1>;
+               u-boot,dm-spl;
+       };
+
+       firmware {
+               optee {
+                       compatible = "linaro,optee-tz";
+                       method = "smc";
+               };
+       };
+};
+
+&{/soc@0} {
+       u-boot,dm-pre-reloc;
+       u-boot,dm-spl;
+};
+
+&clk {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+       /delete-property/ assigned-clocks;
+       /delete-property/ assigned-clock-parents;
+       /delete-property/ assigned-clock-rates;
+
+};
+
+&osc_32k {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&osc_24m {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&aips1 {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&aips2 {
+       u-boot,dm-spl;
+};
+
+&aips3 {
+       u-boot,dm-spl;
+};
+
+&iomuxc {
+       u-boot,dm-spl;
+};
+
+&pinctrl_reg_usdhc2_vmmc {
+       u-boot,dm-spl;
+};
+
+&reg_usdhc2_vmmc {
+       u-boot,dm-spl;
+       u-boot,off-on-delay-us = <20000>;
+};
+
+&pinctrl_uart2 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2_gpio {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc3 {
+       u-boot,dm-spl;
+};
+
+&gpio1 {
+       u-boot,dm-spl;
+};
+
+&gpio2 {
+       u-boot,dm-spl;
+};
+
+&gpio3 {
+       u-boot,dm-spl;
+};
+
+&gpio4 {
+       u-boot,dm-spl;
+};
+
+&gpio5 {
+       u-boot,dm-spl;
+};
+
+&uart2 {
+       u-boot,dm-spl;
+};
+
+&crypto {
+       u-boot,dm-spl;
+};
+
+&sec_jr0 {
+       u-boot,dm-spl;
+};
+
+&sec_jr1 {
+       u-boot,dm-spl;
+};
+
+&sec_jr2 {
+       u-boot,dm-spl;
+};
+
+&i2c1 {
+       u-boot,dm-spl;
+};
+
+&i2c2 {
+       u-boot,dm-spl;
+};
+
+&i2c3 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_i2c1 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_i2c1_gpio {
+       u-boot,dm-spl;
+};
+
+&usdhc1 {
+       u-boot,dm-spl;
+       assigned-clocks = <&clk IMX8MP_CLK_USDHC1>;
+       assigned-clock-rates = <400000000>;
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
+};
+
+&usdhc2 {
+       u-boot,dm-spl;
+       sd-uhs-sdr104;
+       sd-uhs-ddr50;
+       assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
+       assigned-clock-rates = <400000000>;
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
+};
+
+&usdhc3 {
+       u-boot,dm-spl;
+       mmc-hs400-1_8v;
+       mmc-hs400-enhanced-strobe;
+       assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
+       assigned-clock-rates = <400000000>;
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
+};
+
+&wdog1 {
+       u-boot,dm-spl;
+};
+
+&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} {
+       u-boot,dm-spl;
+};
+
+&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} {
+       u-boot,dm-spl;
+};
+
+&pinctrl_pmic {
+       u-boot,dm-spl;
+};
+
+&eqos {
+       compatible = "fsl,imx-eqos";
+       /delete-property/ assigned-clocks;
+       /delete-property/ assigned-clock-parents;
+       /delete-property/ assigned-clock-rates;
+
+       phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+       phy-reset-duration = <15>;
+       phy-reset-post-delay = <100>;
+};
+
+&fec {
+       phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
+       phy-reset-duration = <15>;
+       phy-reset-post-delay = <100>;
+};
+
+&flexspi {
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
+};
+
+&lcdif1 {
+       /delete-property/ assigned-clocks;
+       /delete-property/ assigned-clock-parents;
+       /delete-property/ assigned-clock-rates;
+};
+
+&mipi_dsi {
+       /delete-property/ assigned-clocks;
+       /delete-property/ assigned-clock-parents;
+       /delete-property/ assigned-clock-rates;
+};