{"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"mt25qu02g", INFO(0x20bb22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
{"mt25ql02g", INFO(0x20ba22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
- {"mt35xu512aba", INFO(0x2c5b1a, 0x0, 128 * 1024, 512, E_FSR | SECT_4K) },
+ {"mt35xu512aba", INFO(0x2c5b1a, 0x0, 128 * 1024, 512, E_FSR) },
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
{"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },